1 /*
2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include <debug.h>
32 #include <tzc400.h>
33 #include "juno_def.h"
34
35 /*******************************************************************************
36 * Initialize the TrustZone Controller. Configure Region 0 with Secure RW access
37 * and allow Non-Secure masters full access
38 ******************************************************************************/
init_tzc400(void)39 static void init_tzc400(void)
40 {
41 tzc_init(TZC400_BASE);
42
43 /* Disable filters. */
44 tzc_disable_filters();
45
46 /* Region 1 set to cover Non-Secure DRAM at 0x8000_0000. Apply the
47 * same configuration to all filters in the TZC. */
48 tzc_configure_region(REG_ATTR_FILTER_BIT_ALL, 1,
49 DRAM_NS_BASE, DRAM_NS_BASE + DRAM_NS_SIZE - 1,
50 TZC_REGION_S_NONE,
51 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CCI400) |
52 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_PCIE) |
53 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD0) |
54 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD1) |
55 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_USB) |
56 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_DMA330) |
57 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_THINLINKS) |
58 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_AP) |
59 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_GPU) |
60 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CORESIGHT));
61
62 /* Region 2 set to cover Secure DRAM */
63 tzc_configure_region(REG_ATTR_FILTER_BIT_ALL, 2,
64 DRAM_SEC_BASE, DRAM_SEC_BASE + DRAM_SEC_SIZE - 1,
65 TZC_REGION_S_RDWR,
66 0);
67
68 /* Region 3 set to cover DRAM used by SCP for DDR retraining */
69 tzc_configure_region(REG_ATTR_FILTER_BIT_ALL, 3,
70 DRAM_SCP_BASE, DRAM_SCP_BASE + DRAM_SCP_SIZE - 1,
71 TZC_REGION_S_NONE,
72 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_SCP));
73
74 /* Region 4 set to cover Non-Secure DRAM at 0x8_8000_0000 */
75 tzc_configure_region(REG_ATTR_FILTER_BIT_ALL, 4,
76 DRAM2_BASE, DRAM2_BASE + DRAM2_SIZE - 1,
77 TZC_REGION_S_NONE,
78 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CCI400) |
79 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_PCIE) |
80 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD0) |
81 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD1) |
82 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_USB) |
83 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_DMA330) |
84 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_THINLINKS) |
85 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_AP) |
86 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_GPU) |
87 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CORESIGHT));
88
89 /* Raise an exception if a NS device tries to access secure memory */
90 tzc_set_action(TZC_ACTION_ERR);
91
92 /* Enable filters. */
93 tzc_enable_filters();
94 }
95
96 /*******************************************************************************
97 * Initialize the secure environment. At this moment only the TrustZone
98 * Controller is initialized.
99 ******************************************************************************/
plat_security_setup(void)100 void plat_security_setup(void)
101 {
102 /* Initialize the TrustZone Controller */
103 init_tzc400();
104 }
105