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1#
2#  Copyright (c) 2014, ARM Limited. All rights reserved.
3#
4#  This program and the accompanying materials are licensed and made available
5#  under the terms and conditions of the BSD License which accompanies this
6#  distribution. The full text of the license may be found at
7#  http://opensource.org/licenses/bsd-license.php
8#
9#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11#
12#
13
14#include <AsmMacroIoLib.h>
15#include <Library/ArmLib.h>
16
17// For the moment we assume this will run in SVC mode on ARMv7
18
19.text
20.align 2
21
22GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
23GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
24GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
25GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
26GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
27GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
28GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
29GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
30
31//UINT32
32//EFIAPI
33//ArmGicGetControlSystemRegisterEnable (
34//  VOID
35//  );
36ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
37        mrc     p15, 0, r0, c12, c12, 5 // ICC_SRE
38        bx      lr
39
40//VOID
41//EFIAPI
42//ArmGicSetControlSystemRegisterEnable (
43//  IN UINT32         ControlSystemRegisterEnable
44//  );
45ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
46        mcr     p15, 0, r0, c12, c12, 5 // ICC_SRE
47        isb
48        bx      lr
49
50//VOID
51//ArmGicV3EnableInterruptInterface (
52//  VOID
53//  );
54ASM_PFX(ArmGicV3EnableInterruptInterface):
55        mov     r0, #1
56        mcr     p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
57        bx      lr
58
59//VOID
60//ArmGicV3DisableInterruptInterface (
61//  VOID
62//  );
63ASM_PFX(ArmGicV3DisableInterruptInterface):
64        mov     r0, #0
65        mcr     p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
66        bx      lr
67
68//VOID
69//ArmGicV3EndOfInterrupt (
70//  IN UINTN InterruptId
71//  );
72ASM_PFX(ArmGicV3EndOfInterrupt):
73        mcr     p15, 0, r0, c12, c12, 1 //ICC_EOIR1
74        bx      lr
75
76//UINTN
77//ArmGicV3AcknowledgeInterrupt (
78//  VOID
79//  );
80ASM_PFX(ArmGicV3AcknowledgeInterrupt):
81        mrc     p15, 0, r0, c12, c8, 0 //ICC_IAR1
82        bx      lr
83
84//VOID
85//ArmGicV3SetPriorityMask (
86//  IN UINTN                  Priority
87//  );
88ASM_PFX(ArmGicV3SetPriorityMask):
89        mcr     p15, 0, r0, c4, c6, 0 //ICC_PMR
90        bx      lr
91
92//VOID
93//ArmGicV3SetBinaryPointer (
94//  IN UINTN                  BinaryPoint
95//  );
96ASM_PFX(ArmGicV3SetBinaryPointer):
97        mcr     p15, 0, r0, c12, c12, 3 //ICC_BPR1
98        bx      lr
99