1#------------------------------------------------------------------------------ 2# 3# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved. 4# 5# This program and the accompanying materials 6# are licensed and made available under the terms and conditions of the BSD License 7# which accompanies this distribution. The full text of the license may be found at 8# http://opensource.org/licenses/bsd-license.php 9# 10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12# 13#------------------------------------------------------------------------------ 14 15.text 16.align 2 17 18GCC_ASM_EXPORT(ArmReadCntFrq) 19GCC_ASM_EXPORT(ArmWriteCntFrq) 20GCC_ASM_EXPORT(ArmReadCntPct) 21GCC_ASM_EXPORT(ArmReadCntkCtl) 22GCC_ASM_EXPORT(ArmWriteCntkCtl) 23GCC_ASM_EXPORT(ArmReadCntpTval) 24GCC_ASM_EXPORT(ArmWriteCntpTval) 25GCC_ASM_EXPORT(ArmReadCntpCtl) 26GCC_ASM_EXPORT(ArmWriteCntpCtl) 27GCC_ASM_EXPORT(ArmReadCntvTval) 28GCC_ASM_EXPORT(ArmWriteCntvTval) 29GCC_ASM_EXPORT(ArmReadCntvCtl) 30GCC_ASM_EXPORT(ArmWriteCntvCtl) 31GCC_ASM_EXPORT(ArmReadCntvCt) 32GCC_ASM_EXPORT(ArmReadCntpCval) 33GCC_ASM_EXPORT(ArmWriteCntpCval) 34GCC_ASM_EXPORT(ArmReadCntvCval) 35GCC_ASM_EXPORT(ArmWriteCntvCval) 36GCC_ASM_EXPORT(ArmReadCntvOff) 37GCC_ASM_EXPORT(ArmWriteCntvOff) 38 39ASM_PFX(ArmReadCntFrq): 40 mrs x0, cntfrq_el0 // Read CNTFRQ 41 ret 42 43 44# NOTE - Can only write while at highest implemented EL level (EL3 on model). Else ReadOnly (EL2, EL1, EL0) 45ASM_PFX(ArmWriteCntFrq): 46 msr cntfrq_el0, x0 // Write to CNTFRQ 47 ret 48 49 50ASM_PFX(ArmReadCntPct): 51 mrs x0, cntpct_el0 // Read CNTPCT (Physical counter register) 52 ret 53 54 55ASM_PFX(ArmReadCntkCtl): 56 mrs x0, cntkctl_el1 // Read CNTK_CTL (Timer PL1 Control Register) 57 ret 58 59 60ASM_PFX(ArmWriteCntkCtl): 61 msr cntkctl_el1, x0 // Write to CNTK_CTL (Timer PL1 Control Register) 62 ret 63 64 65ASM_PFX(ArmReadCntpTval): 66 mrs x0, cntp_tval_el0 // Read CNTP_TVAL (PL1 physical timer value register) 67 ret 68 69 70ASM_PFX(ArmWriteCntpTval): 71 msr cntp_tval_el0, x0 // Write to CNTP_TVAL (PL1 physical timer value register) 72 ret 73 74 75ASM_PFX(ArmReadCntpCtl): 76 mrs x0, cntp_ctl_el0 // Read CNTP_CTL (PL1 Physical Timer Control Register) 77 ret 78 79 80ASM_PFX(ArmWriteCntpCtl): 81 msr cntp_ctl_el0, x0 // Write to CNTP_CTL (PL1 Physical Timer Control Register) 82 ret 83 84 85ASM_PFX(ArmReadCntvTval): 86 mrs x0, cntv_tval_el0 // Read CNTV_TVAL (Virtual Timer Value register) 87 ret 88 89 90ASM_PFX(ArmWriteCntvTval): 91 msr cntv_tval_el0, x0 // Write to CNTV_TVAL (Virtual Timer Value register) 92 ret 93 94 95ASM_PFX(ArmReadCntvCtl): 96 mrs x0, cntv_ctl_el0 // Read CNTV_CTL (Virtual Timer Control Register) 97 ret 98 99 100ASM_PFX(ArmWriteCntvCtl): 101 msr cntv_ctl_el0, x0 // Write to CNTV_CTL (Virtual Timer Control Register) 102 ret 103 104 105ASM_PFX(ArmReadCntvCt): 106 mrs x0, cntvct_el0 // Read CNTVCT (Virtual Count Register) 107 ret 108 109 110ASM_PFX(ArmReadCntpCval): 111 mrs x0, cntp_cval_el0 // Read CNTP_CTVAL (Physical Timer Compare Value Register) 112 ret 113 114 115ASM_PFX(ArmWriteCntpCval): 116 msr cntp_cval_el0, x0 // Write to CNTP_CTVAL (Physical Timer Compare Value Register) 117 ret 118 119 120ASM_PFX(ArmReadCntvCval): 121 mrs x0, cntv_cval_el0 // Read CNTV_CTVAL (Virtual Timer Compare Value Register) 122 ret 123 124 125ASM_PFX(ArmWriteCntvCval): 126 msr cntv_cval_el0, x0 // write to CNTV_CTVAL (Virtual Timer Compare Value Register) 127 ret 128 129 130ASM_PFX(ArmReadCntvOff): 131 mrs x0, cntvoff_el2 // Read CNTVOFF (virtual Offset register) 132 ret 133 134 135ASM_PFX(ArmWriteCntvOff): 136 msr cntvoff_el2, x0 // Write to CNTVOFF (Virtual Offset register) 137 ret 138 139 140ASM_FUNCTION_REMOVE_IF_UNREFERENCED 141