1/** @file 2CPU T-state control methods 3 4Copyright (c) 2013-2015 Intel Corporation. 5 6This program and the accompanying materials 7are licensed and made available under the terms and conditions of the BSD License 8which accompanies this distribution. The full text of the license may be found at 9http://opensource.org/licenses/bsd-license.php 10 11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14**/ 15 16DefinitionBlock ( 17 "CPU0TST.aml", 18 "SSDT", 19 0x01, 20 "SsgPmm", 21 "Cpu0Tst", 22 0x0013 23 ) 24{ 25 External (PDC0, IntObj) 26 External (CFGD, FieldUnitObj) 27 External(\_PR.CPU0, DeviceObj) 28 External(_PSS) 29 30 Scope(\_PR.CPU0) 31 { 32 Method(_TPC,0) 33 { 34 Return(ZERO) // Return All States Available. 35 } 36 37 Name(TPTC, ResourceTemplate() 38 { 39 Memory32Fixed(ReadOnly, 0, 0, FIX1) // IO APIC 40 }) 41 42 // 43 // If OSPM is capable of direct access to on demand throttling MSR, 44 // we use MSR method;otherwise we use IO method. 45 // 46 // 47 // PDCx[2] = Indicates whether OSPM is capable of direct access to 48 // on demand throttling MSR. 49 // 50 Method(_PTC, 0) 51 { 52 If(And(PDC0, 0x0004)) 53 { 54 Return(Package() // MSR Method 55 { 56 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)}, 57 ResourceTemplate(){Register(FFixedHW, 0, 0, 0)} 58 } 59 ) 60 } 61 Return(Package() // IO Method 62 { 63 // 64 // PM IO base ("PMBALVL0" will be updated at runtime) 65 // 66 ResourceTemplate(){Register(SystemIO, 4, 1, 0x304C564C41424D50)}, 67 ResourceTemplate(){Register(SystemIO, 4, 1, 0x304C564C41424D50)} 68 } 69 ) 70 } 71 72 // 73 // _TSS returned package for IO Method 74 // 75 Name(TSSI, Package() 76 { 77 Package(){100, 1000, 0, 0x00, 0} 78 } 79 ) 80 // 81 // _TSS returned package for MSR Method 82 // 83 Name(TSSM, Package() 84 { 85 Package(){100, 1000, 0, 0x00, 0} 86 } 87 ) 88 89 Method(_TSS, 0) 90 { 91 // 92 // If OSPM is capable of direct access to on demand throttling MSR, 93 // we report TSSM;otherwise report TSSI. 94 // 95 If(And(PDC0, 0x0004)) 96 { 97 Return(TSSM) 98 } 99 Return(TSSI) 100 } 101 102 Method(_TSD, 0) 103 { 104 // 105 // If CMP is suppored, we report the dependency with two processors 106 // 107 If(LAnd(And(CFGD, 0x1000000), LNot(And(PDC0, 4)))) 108 { 109 Return(Package() 110 { 111 Package() 112 { 113 5, // # entries. 114 0, // Revision. 115 0, // Domain #. 116 0xFD, // Coord Type- SW_ANY 117 2 // # processors. 118 } 119 } 120 ) 121 } 122 // 123 // Otherwise, we report the dependency with one processor 124 // 125 Return(Package() 126 { 127 Package() 128 { 129 5, // # entries. 130 0, // Revision. 131 0, // Domain #. 132 0xFC, // Coord Type- SW_ALL 133 1 // # processors. 134 } 135 } 136 ) 137 } 138 } 139} 140