1 /** @file
2
3 Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
4
5
6 This program and the accompanying materials are licensed and made available under
7
8 the terms and conditions of the BSD License that accompanies this distribution.
9
10 The full text of the license may be found at
11
12 http://opensource.org/licenses/bsd-license.php.
13
14
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17
18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19
20
21
22
23
24 Module Name:
25
26 IdeBus.h
27
28 Abstract:
29
30 System reset Library Services. This library class provides a set of
31 methods to reset whole system with manipulate ICH.
32
33 **/
34
35
36 #include <Base.h>
37
38
39 #include <Library/ResetSystemLib.h>
40 #include <Library/BaseLib.h>
41 #include <Library/IoLib.h>
42 #include <Library/DebugLib.h>
43 #include <Library/PciLib.h>
PlatformResetHook(UINT8 ResetType)44
45 #include "PchRegs.h"
46 #include "Rsci.h"
47 #include "Platform.h"
48
49 #define RESET_GENERATOR_PORT R_PCH_RST_CNT
50
51 VOID
52 EFIAPI
53 PlatformResetHook (
54 UINT8 ResetType
55 )
56 {
57 //
58 // Platform need to save OS reset request/types for next Android boot
59 //
60 IoWrite8 (0x72, CMOS_RESET_TYPE_BY_OS);
61 IoWrite8 (0x73, ResetType);
62 }
63
64 /**
65 Calling this function causes a system-wide reset. This sets
ResetCold(VOID)66 all circuitry within the system to its initial state. This type of reset
67 is asynchronous to system operation and operates without regard to
68 cycle boundaries.
69
70 System reset should not return, if it returns, it means the system does
71 not support cold reset.
72 **/
73 VOID
74 EFIAPI
75 ResetCold (
76 VOID
77 )
78 {
79 PlatformResetHook(COLD_RESET);
80 IoWrite8 (RESET_GENERATOR_PORT, 0x2);
81 IoWrite8 (RESET_GENERATOR_PORT, 0x6);
82 }
83
ResetWarm(VOID)84 /**
85 Calling this function causes a system-wide initialization. The processors
86 are set to their initial state, and pending cycles are not corrupted.
87
88 System reset should not return, if it returns, it means the system does
89 not support warm reset.
90 **/
91 VOID
92 EFIAPI
93 ResetWarm (
94 VOID
95 )
96 {
97 PlatformResetHook(WARM_RESET);
98 IoWrite8 (RESET_GENERATOR_PORT, 0x0);
99 IoWrite8 (RESET_GENERATOR_PORT, 0x4);
100 }
101
ResetShutdown(VOID)102 /**
103 Calling this function causes the system to enter a power state equivalent
104 to the ACPI G2/S5 or G3 states.
105
106 System shutdown should not return, if it returns, it means the system does
107 not support shut down reset.
108 **/
109 VOID
110 EFIAPI
111 ResetShutdown (
112 VOID
113 )
114 {
115 UINT16 PchPmioBase;
116 UINT16 Data16;
117 UINT32 Data32;
118
119 PchPmioBase = (UINT16) (PciRead16 (PCI_LIB_ADDRESS(0, PCI_DEVICE_NUMBER_PCH_LPC, 0, R_PCH_LPC_ACPI_BASE)) & ~BIT0);
120
121 //
122 // Then, GPE0_EN should be disabled to avoid any GPI waking up the system from S5
123 //
124 Data16 = 0;
125 IoWrite16 (
126 (UINTN)(PchPmioBase + R_PCH_ACPI_GPE0a_EN),
127 (UINT16)Data16
128 );
129
130 //
131 // Clear Sleep SMI Status
132 //
133 IoWrite16 (PchPmioBase + R_PCH_SMI_STS,
134 (UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_STS) | B_PCH_SMI_STS_ON_SLP_EN));
135 //
136 // Clear Sleep Type Enable
137 //
138 IoWrite16 (PchPmioBase + R_PCH_SMI_EN,
139 (UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_EN) & (~B_PCH_SMI_EN_ON_SLP_EN)));
140 //
141 // Clear Power Button Status
142 //
143 IoWrite16(PchPmioBase + R_PCH_ACPI_PM1_STS, B_PCH_ACPI_PM1_STS_PWRBTN);
144
145 //
146 // Secondly, Power Button Status bit must be cleared
147 //
148 // Write a "1" to bit[8] of power button status register at
149 // (ABASE + PM1_STS) to clear this bit
150 // Clear it through SMI Status register
151 //
152 Data16 = B_PCH_SMI_STS_PM1_STS_REG;
153 IoWrite16 ((UINTN) (PchPmioBase + R_PCH_SMI_STS), Data16);
154
155 //
156 // Finally, transform system into S5 sleep state
157 //
158 Data32 = IoRead32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT));
159
160 Data32 = (UINT32) ((Data32 &~(B_PCH_ACPI_PM1_CNT_SLP_TYP + B_PCH_ACPI_PM1_CNT_SLP_EN)) | V_PCH_ACPI_PM1_CNT_S5);
161
162 IoWrite32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT), Data32);
163
164 Data32 = Data32 | B_PCH_ACPI_PM1_CNT_SLP_EN;
165
166 IoWrite32 ((UINTN) (PchPmioBase + R_PCH_ACPI_PM1_CNT), Data32);
167
168 return;
169 }
170
171 /**
EnterS3WithImmediateWake(VOID)172 Calling this function causes the system to enter a power state for capsule
173 update.
174
175 Reset update should not return, if it returns, it means the system does
176 not support capsule update.
177
178 **/
179 VOID
180 EFIAPI
181 EnterS3WithImmediateWake (
182 VOID
183 )
184 {
185 ASSERT (FALSE);
186 }
187
188