1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #ifndef V8_ARM_MACRO_ASSEMBLER_ARM_H_
6 #define V8_ARM_MACRO_ASSEMBLER_ARM_H_
7
8 #include "src/assembler.h"
9 #include "src/bailout-reason.h"
10 #include "src/frames.h"
11 #include "src/globals.h"
12
13 namespace v8 {
14 namespace internal {
15
16 // Give alias names to registers for calling conventions.
17 const Register kReturnRegister0 = {Register::kCode_r0};
18 const Register kReturnRegister1 = {Register::kCode_r1};
19 const Register kReturnRegister2 = {Register::kCode_r2};
20 const Register kJSFunctionRegister = {Register::kCode_r1};
21 const Register kContextRegister = {Register::kCode_r7};
22 const Register kAllocateSizeRegister = {Register::kCode_r1};
23 const Register kInterpreterAccumulatorRegister = {Register::kCode_r0};
24 const Register kInterpreterBytecodeOffsetRegister = {Register::kCode_r5};
25 const Register kInterpreterBytecodeArrayRegister = {Register::kCode_r6};
26 const Register kInterpreterDispatchTableRegister = {Register::kCode_r8};
27 const Register kJavaScriptCallArgCountRegister = {Register::kCode_r0};
28 const Register kJavaScriptCallNewTargetRegister = {Register::kCode_r3};
29 const Register kRuntimeCallFunctionRegister = {Register::kCode_r1};
30 const Register kRuntimeCallArgCountRegister = {Register::kCode_r0};
31
32 // ----------------------------------------------------------------------------
33 // Static helper functions
34
35 // Generate a MemOperand for loading a field from an object.
FieldMemOperand(Register object,int offset)36 inline MemOperand FieldMemOperand(Register object, int offset) {
37 return MemOperand(object, offset - kHeapObjectTag);
38 }
39
40
41 // Give alias names to registers
42 const Register cp = {Register::kCode_r7}; // JavaScript context pointer.
43 const Register pp = {Register::kCode_r8}; // Constant pool pointer.
44 const Register kRootRegister = {Register::kCode_r10}; // Roots array pointer.
45
46 // Flags used for AllocateHeapNumber
47 enum TaggingMode {
48 // Tag the result.
49 TAG_RESULT,
50 // Don't tag
51 DONT_TAG_RESULT
52 };
53
54
55 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
56 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
57 enum PointersToHereCheck {
58 kPointersToHereMaybeInteresting,
59 kPointersToHereAreAlwaysInteresting
60 };
61 enum LinkRegisterStatus { kLRHasNotBeenSaved, kLRHasBeenSaved };
62
63
64 Register GetRegisterThatIsNotOneOf(Register reg1,
65 Register reg2 = no_reg,
66 Register reg3 = no_reg,
67 Register reg4 = no_reg,
68 Register reg5 = no_reg,
69 Register reg6 = no_reg);
70
71
72 #ifdef DEBUG
73 bool AreAliased(Register reg1,
74 Register reg2,
75 Register reg3 = no_reg,
76 Register reg4 = no_reg,
77 Register reg5 = no_reg,
78 Register reg6 = no_reg,
79 Register reg7 = no_reg,
80 Register reg8 = no_reg);
81 #endif
82
83
84 enum TargetAddressStorageMode {
85 CAN_INLINE_TARGET_ADDRESS,
86 NEVER_INLINE_TARGET_ADDRESS
87 };
88
89 // MacroAssembler implements a collection of frequently used macros.
90 class MacroAssembler: public Assembler {
91 public:
92 MacroAssembler(Isolate* isolate, void* buffer, int size,
93 CodeObjectRequired create_code_object);
94
95
96 // Returns the size of a call in instructions. Note, the value returned is
97 // only valid as long as no entries are added to the constant pool between
98 // checking the call size and emitting the actual call.
99 static int CallSize(Register target, Condition cond = al);
100 int CallSize(Address target, RelocInfo::Mode rmode, Condition cond = al);
101 int CallStubSize(CodeStub* stub,
102 TypeFeedbackId ast_id = TypeFeedbackId::None(),
103 Condition cond = al);
104
105 // Jump, Call, and Ret pseudo instructions implementing inter-working.
106 void Jump(Register target, Condition cond = al);
107 void Jump(Address target, RelocInfo::Mode rmode, Condition cond = al);
108 void Jump(Handle<Code> code, RelocInfo::Mode rmode, Condition cond = al);
109 void Call(Register target, Condition cond = al);
110 void Call(Address target, RelocInfo::Mode rmode,
111 Condition cond = al,
112 TargetAddressStorageMode mode = CAN_INLINE_TARGET_ADDRESS);
113 void Call(Handle<Code> code, RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
114 TypeFeedbackId ast_id = TypeFeedbackId::None(), Condition cond = al,
115 TargetAddressStorageMode mode = CAN_INLINE_TARGET_ADDRESS);
116 int CallSize(Handle<Code> code,
117 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
118 TypeFeedbackId ast_id = TypeFeedbackId::None(),
119 Condition cond = al);
120 void Ret(Condition cond = al);
121
122 // Used for patching in calls to the deoptimizer.
123 void CallDeoptimizer(Address target);
124 static int CallDeoptimizerSize();
125
126 // Emit code that loads |parameter_index|'th parameter from the stack to
127 // the register according to the CallInterfaceDescriptor definition.
128 // |sp_to_caller_sp_offset_in_words| specifies the number of words pushed
129 // below the caller's sp.
130 template <class Descriptor>
131 void LoadParameterFromStack(
132 Register reg, typename Descriptor::ParameterIndices parameter_index,
133 int sp_to_ra_offset_in_words = 0) {
134 DCHECK(Descriptor::kPassLastArgsOnStack);
135 UNIMPLEMENTED();
136 }
137
138 // Emit code to discard a non-negative number of pointer-sized elements
139 // from the stack, clobbering only the sp register.
140 void Drop(int count, Condition cond = al);
141 void Drop(Register count, Condition cond = al);
142
143 void Ret(int drop, Condition cond = al);
144
145 // Swap two registers. If the scratch register is omitted then a slightly
146 // less efficient form using xor instead of mov is emitted.
147 void Swap(Register reg1,
148 Register reg2,
149 Register scratch = no_reg,
150 Condition cond = al);
151
152 void Mls(Register dst, Register src1, Register src2, Register srcA,
153 Condition cond = al);
154 void And(Register dst, Register src1, const Operand& src2,
155 Condition cond = al);
156 void Ubfx(Register dst, Register src, int lsb, int width,
157 Condition cond = al);
158 void Sbfx(Register dst, Register src, int lsb, int width,
159 Condition cond = al);
160 // The scratch register is not used for ARMv7.
161 // scratch can be the same register as src (in which case it is trashed), but
162 // not the same as dst.
163 void Bfi(Register dst,
164 Register src,
165 Register scratch,
166 int lsb,
167 int width,
168 Condition cond = al);
169 void Bfc(Register dst, Register src, int lsb, int width, Condition cond = al);
170
171 void Call(Label* target);
Push(Register src)172 void Push(Register src) { push(src); }
Pop(Register dst)173 void Pop(Register dst) { pop(dst); }
174
175 // Register move. May do nothing if the registers are identical.
Move(Register dst,Smi * smi)176 void Move(Register dst, Smi* smi) { mov(dst, Operand(smi)); }
177 void Move(Register dst, Handle<Object> value);
178 void Move(Register dst, Register src, Condition cond = al);
179 void Move(Register dst, const Operand& src, SBit sbit = LeaveCC,
180 Condition cond = al) {
181 if (!src.is_reg() || !src.rm().is(dst) || sbit != LeaveCC) {
182 mov(dst, src, sbit, cond);
183 }
184 }
185 void Move(SwVfpRegister dst, SwVfpRegister src, Condition cond = al);
186 void Move(DwVfpRegister dst, DwVfpRegister src, Condition cond = al);
187
188 void Load(Register dst, const MemOperand& src, Representation r);
189 void Store(Register src, const MemOperand& dst, Representation r);
190
191 // Load an object from the root table.
192 void LoadRoot(Register destination,
193 Heap::RootListIndex index,
194 Condition cond = al);
195 // Store an object to the root table.
196 void StoreRoot(Register source,
197 Heap::RootListIndex index,
198 Condition cond = al);
199
200 // ---------------------------------------------------------------------------
201 // GC Support
202
203 void IncrementalMarkingRecordWriteHelper(Register object,
204 Register value,
205 Register address);
206
207 enum RememberedSetFinalAction {
208 kReturnAtEnd,
209 kFallThroughAtEnd
210 };
211
212 // Record in the remembered set the fact that we have a pointer to new space
213 // at the address pointed to by the addr register. Only works if addr is not
214 // in new space.
215 void RememberedSetHelper(Register object, // Used for debug code.
216 Register addr,
217 Register scratch,
218 SaveFPRegsMode save_fp,
219 RememberedSetFinalAction and_then);
220
221 void CheckPageFlag(Register object,
222 Register scratch,
223 int mask,
224 Condition cc,
225 Label* condition_met);
226
227 // Check if object is in new space. Jumps if the object is not in new space.
228 // The register scratch can be object itself, but scratch will be clobbered.
JumpIfNotInNewSpace(Register object,Register scratch,Label * branch)229 void JumpIfNotInNewSpace(Register object,
230 Register scratch,
231 Label* branch) {
232 InNewSpace(object, scratch, eq, branch);
233 }
234
235 // Check if object is in new space. Jumps if the object is in new space.
236 // The register scratch can be object itself, but it will be clobbered.
JumpIfInNewSpace(Register object,Register scratch,Label * branch)237 void JumpIfInNewSpace(Register object,
238 Register scratch,
239 Label* branch) {
240 InNewSpace(object, scratch, ne, branch);
241 }
242
243 // Check if an object has a given incremental marking color.
244 void HasColor(Register object,
245 Register scratch0,
246 Register scratch1,
247 Label* has_color,
248 int first_bit,
249 int second_bit);
250
251 void JumpIfBlack(Register object,
252 Register scratch0,
253 Register scratch1,
254 Label* on_black);
255
256 // Checks the color of an object. If the object is white we jump to the
257 // incremental marker.
258 void JumpIfWhite(Register value, Register scratch1, Register scratch2,
259 Register scratch3, Label* value_is_white);
260
261 // Notify the garbage collector that we wrote a pointer into an object.
262 // |object| is the object being stored into, |value| is the object being
263 // stored. value and scratch registers are clobbered by the operation.
264 // The offset is the offset from the start of the object, not the offset from
265 // the tagged HeapObject pointer. For use with FieldMemOperand(reg, off).
266 void RecordWriteField(
267 Register object,
268 int offset,
269 Register value,
270 Register scratch,
271 LinkRegisterStatus lr_status,
272 SaveFPRegsMode save_fp,
273 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
274 SmiCheck smi_check = INLINE_SMI_CHECK,
275 PointersToHereCheck pointers_to_here_check_for_value =
276 kPointersToHereMaybeInteresting);
277
278 // As above, but the offset has the tag presubtracted. For use with
279 // MemOperand(reg, off).
280 inline void RecordWriteContextSlot(
281 Register context,
282 int offset,
283 Register value,
284 Register scratch,
285 LinkRegisterStatus lr_status,
286 SaveFPRegsMode save_fp,
287 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
288 SmiCheck smi_check = INLINE_SMI_CHECK,
289 PointersToHereCheck pointers_to_here_check_for_value =
290 kPointersToHereMaybeInteresting) {
291 RecordWriteField(context,
292 offset + kHeapObjectTag,
293 value,
294 scratch,
295 lr_status,
296 save_fp,
297 remembered_set_action,
298 smi_check,
299 pointers_to_here_check_for_value);
300 }
301
302 // Notify the garbage collector that we wrote a code entry into a
303 // JSFunction. Only scratch is clobbered by the operation.
304 void RecordWriteCodeEntryField(Register js_function, Register code_entry,
305 Register scratch);
306
307 void RecordWriteForMap(
308 Register object,
309 Register map,
310 Register dst,
311 LinkRegisterStatus lr_status,
312 SaveFPRegsMode save_fp);
313
314 // For a given |object| notify the garbage collector that the slot |address|
315 // has been written. |value| is the object being stored. The value and
316 // address registers are clobbered by the operation.
317 void RecordWrite(
318 Register object,
319 Register address,
320 Register value,
321 LinkRegisterStatus lr_status,
322 SaveFPRegsMode save_fp,
323 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
324 SmiCheck smi_check = INLINE_SMI_CHECK,
325 PointersToHereCheck pointers_to_here_check_for_value =
326 kPointersToHereMaybeInteresting);
327
328 // Push a handle.
329 void Push(Handle<Object> handle);
Push(Smi * smi)330 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
331
332 // Push two registers. Pushes leftmost register first (to highest address).
333 void Push(Register src1, Register src2, Condition cond = al) {
334 if (src1.code() > src2.code()) {
335 stm(db_w, sp, src1.bit() | src2.bit(), cond);
336 } else {
337 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
338 str(src2, MemOperand(sp, 4, NegPreIndex), cond);
339 }
340 }
341
342 // Push three registers. Pushes leftmost register first (to highest address).
343 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
344 if (src1.code() > src2.code()) {
345 if (src2.code() > src3.code()) {
346 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
347 } else {
348 stm(db_w, sp, src1.bit() | src2.bit(), cond);
349 str(src3, MemOperand(sp, 4, NegPreIndex), cond);
350 }
351 } else {
352 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
353 Push(src2, src3, cond);
354 }
355 }
356
357 // Push four registers. Pushes leftmost register first (to highest address).
358 void Push(Register src1,
359 Register src2,
360 Register src3,
361 Register src4,
362 Condition cond = al) {
363 if (src1.code() > src2.code()) {
364 if (src2.code() > src3.code()) {
365 if (src3.code() > src4.code()) {
366 stm(db_w,
367 sp,
368 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
369 cond);
370 } else {
371 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
372 str(src4, MemOperand(sp, 4, NegPreIndex), cond);
373 }
374 } else {
375 stm(db_w, sp, src1.bit() | src2.bit(), cond);
376 Push(src3, src4, cond);
377 }
378 } else {
379 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
380 Push(src2, src3, src4, cond);
381 }
382 }
383
384 // Push five registers. Pushes leftmost register first (to highest address).
385 void Push(Register src1, Register src2, Register src3, Register src4,
386 Register src5, Condition cond = al) {
387 if (src1.code() > src2.code()) {
388 if (src2.code() > src3.code()) {
389 if (src3.code() > src4.code()) {
390 if (src4.code() > src5.code()) {
391 stm(db_w, sp,
392 src1.bit() | src2.bit() | src3.bit() | src4.bit() | src5.bit(),
393 cond);
394 } else {
395 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(),
396 cond);
397 str(src5, MemOperand(sp, 4, NegPreIndex), cond);
398 }
399 } else {
400 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
401 Push(src4, src5, cond);
402 }
403 } else {
404 stm(db_w, sp, src1.bit() | src2.bit(), cond);
405 Push(src3, src4, src5, cond);
406 }
407 } else {
408 str(src1, MemOperand(sp, 4, NegPreIndex), cond);
409 Push(src2, src3, src4, src5, cond);
410 }
411 }
412
413 // Pop two registers. Pops rightmost register first (from lower address).
414 void Pop(Register src1, Register src2, Condition cond = al) {
415 DCHECK(!src1.is(src2));
416 if (src1.code() > src2.code()) {
417 ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
418 } else {
419 ldr(src2, MemOperand(sp, 4, PostIndex), cond);
420 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
421 }
422 }
423
424 // Pop three registers. Pops rightmost register first (from lower address).
425 void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
426 DCHECK(!AreAliased(src1, src2, src3));
427 if (src1.code() > src2.code()) {
428 if (src2.code() > src3.code()) {
429 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
430 } else {
431 ldr(src3, MemOperand(sp, 4, PostIndex), cond);
432 ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
433 }
434 } else {
435 Pop(src2, src3, cond);
436 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
437 }
438 }
439
440 // Pop four registers. Pops rightmost register first (from lower address).
441 void Pop(Register src1,
442 Register src2,
443 Register src3,
444 Register src4,
445 Condition cond = al) {
446 DCHECK(!AreAliased(src1, src2, src3, src4));
447 if (src1.code() > src2.code()) {
448 if (src2.code() > src3.code()) {
449 if (src3.code() > src4.code()) {
450 ldm(ia_w,
451 sp,
452 src1.bit() | src2.bit() | src3.bit() | src4.bit(),
453 cond);
454 } else {
455 ldr(src4, MemOperand(sp, 4, PostIndex), cond);
456 ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
457 }
458 } else {
459 Pop(src3, src4, cond);
460 ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
461 }
462 } else {
463 Pop(src2, src3, src4, cond);
464 ldr(src1, MemOperand(sp, 4, PostIndex), cond);
465 }
466 }
467
468 // Push a fixed frame, consisting of lr, fp, constant pool (if
469 // FLAG_enable_embedded_constant_pool)
470 void PushCommonFrame(Register marker_reg = no_reg);
471
472 // Push a standard frame, consisting of lr, fp, constant pool (if
473 // FLAG_enable_embedded_constant_pool), context and JS function
474 void PushStandardFrame(Register function_reg);
475
476 void PopCommonFrame(Register marker_reg = no_reg);
477
478 // Push and pop the registers that can hold pointers, as defined by the
479 // RegList constant kSafepointSavedRegisters.
480 void PushSafepointRegisters();
481 void PopSafepointRegisters();
482 // Store value in register src in the safepoint stack slot for
483 // register dst.
484 void StoreToSafepointRegisterSlot(Register src, Register dst);
485 // Load the value of the src register from its safepoint stack slot
486 // into register dst.
487 void LoadFromSafepointRegisterSlot(Register dst, Register src);
488
489 // Load two consecutive registers with two consecutive memory locations.
490 void Ldrd(Register dst1,
491 Register dst2,
492 const MemOperand& src,
493 Condition cond = al);
494
495 // Store two consecutive registers to two consecutive memory locations.
496 void Strd(Register src1,
497 Register src2,
498 const MemOperand& dst,
499 Condition cond = al);
500
501 // If the value is a NaN, canonicalize the value else, do nothing.
502 void VFPCanonicalizeNaN(const DwVfpRegister dst,
503 const DwVfpRegister src,
504 const Condition cond = al);
505 void VFPCanonicalizeNaN(const DwVfpRegister value,
506 const Condition cond = al) {
507 VFPCanonicalizeNaN(value, value, cond);
508 }
509
510 // Compare single values and move the result to the normal condition flags.
511 void VFPCompareAndSetFlags(const SwVfpRegister src1, const SwVfpRegister src2,
512 const Condition cond = al);
513 void VFPCompareAndSetFlags(const SwVfpRegister src1, const float src2,
514 const Condition cond = al);
515
516 // Compare double values and move the result to the normal condition flags.
517 void VFPCompareAndSetFlags(const DwVfpRegister src1,
518 const DwVfpRegister src2,
519 const Condition cond = al);
520 void VFPCompareAndSetFlags(const DwVfpRegister src1,
521 const double src2,
522 const Condition cond = al);
523
524 // Compare single values and then load the fpscr flags to a register.
525 void VFPCompareAndLoadFlags(const SwVfpRegister src1,
526 const SwVfpRegister src2,
527 const Register fpscr_flags,
528 const Condition cond = al);
529 void VFPCompareAndLoadFlags(const SwVfpRegister src1, const float src2,
530 const Register fpscr_flags,
531 const Condition cond = al);
532
533 // Compare double values and then load the fpscr flags to a register.
534 void VFPCompareAndLoadFlags(const DwVfpRegister src1,
535 const DwVfpRegister src2,
536 const Register fpscr_flags,
537 const Condition cond = al);
538 void VFPCompareAndLoadFlags(const DwVfpRegister src1,
539 const double src2,
540 const Register fpscr_flags,
541 const Condition cond = al);
542
543 void Vmov(const DwVfpRegister dst,
544 const double imm,
545 const Register scratch = no_reg);
546
547 void VmovHigh(Register dst, DwVfpRegister src);
548 void VmovHigh(DwVfpRegister dst, Register src);
549 void VmovLow(Register dst, DwVfpRegister src);
550 void VmovLow(DwVfpRegister dst, Register src);
551
552 // Simulate s-register moves for imaginary s32 - s63 registers.
553 void VmovExtended(Register dst, int src_code);
554 void VmovExtended(int dst_code, Register src);
555 // Move between s-registers and imaginary s-registers.
556 void VmovExtended(int dst_code, int src_code, Register scratch);
557 void VmovExtended(int dst_code, const MemOperand& src, Register scratch);
558 void VmovExtended(const MemOperand& dst, int src_code, Register scratch);
559
560 void LslPair(Register dst_low, Register dst_high, Register src_low,
561 Register src_high, Register scratch, Register shift);
562 void LslPair(Register dst_low, Register dst_high, Register src_low,
563 Register src_high, uint32_t shift);
564 void LsrPair(Register dst_low, Register dst_high, Register src_low,
565 Register src_high, Register scratch, Register shift);
566 void LsrPair(Register dst_low, Register dst_high, Register src_low,
567 Register src_high, uint32_t shift);
568 void AsrPair(Register dst_low, Register dst_high, Register src_low,
569 Register src_high, Register scratch, Register shift);
570 void AsrPair(Register dst_low, Register dst_high, Register src_low,
571 Register src_high, uint32_t shift);
572
573 // Loads the number from object into dst register.
574 // If |object| is neither smi nor heap number, |not_number| is jumped to
575 // with |object| still intact.
576 void LoadNumber(Register object,
577 LowDwVfpRegister dst,
578 Register heap_number_map,
579 Register scratch,
580 Label* not_number);
581
582 // Loads the number from object into double_dst in the double format.
583 // Control will jump to not_int32 if the value cannot be exactly represented
584 // by a 32-bit integer.
585 // Floating point value in the 32-bit integer range that are not exact integer
586 // won't be loaded.
587 void LoadNumberAsInt32Double(Register object,
588 DwVfpRegister double_dst,
589 Register heap_number_map,
590 Register scratch,
591 LowDwVfpRegister double_scratch,
592 Label* not_int32);
593
594 // Loads the number from object into dst as a 32-bit integer.
595 // Control will jump to not_int32 if the object cannot be exactly represented
596 // by a 32-bit integer.
597 // Floating point value in the 32-bit integer range that are not exact integer
598 // won't be converted.
599 void LoadNumberAsInt32(Register object,
600 Register dst,
601 Register heap_number_map,
602 Register scratch,
603 DwVfpRegister double_scratch0,
604 LowDwVfpRegister double_scratch1,
605 Label* not_int32);
606
607 // Generates function and stub prologue code.
608 void StubPrologue(StackFrame::Type type);
609 void Prologue(bool code_pre_aging);
610
611 // Enter exit frame.
612 // stack_space - extra stack space, used for alignment before call to C.
613 void EnterExitFrame(bool save_doubles, int stack_space = 0,
614 StackFrame::Type frame_type = StackFrame::EXIT);
615
616 // Leave the current exit frame. Expects the return value in r0.
617 // Expect the number of values, pushed prior to the exit frame, to
618 // remove in a register (or no_reg, if there is nothing to remove).
619 void LeaveExitFrame(bool save_doubles, Register argument_count,
620 bool restore_context,
621 bool argument_count_is_length = false);
622
623 // Get the actual activation frame alignment for target environment.
624 static int ActivationFrameAlignment();
625
626 void LoadContext(Register dst, int context_chain_length);
627
628 // Load the global object from the current context.
LoadGlobalObject(Register dst)629 void LoadGlobalObject(Register dst) {
630 LoadNativeContextSlot(Context::EXTENSION_INDEX, dst);
631 }
632
633 // Load the global proxy from the current context.
LoadGlobalProxy(Register dst)634 void LoadGlobalProxy(Register dst) {
635 LoadNativeContextSlot(Context::GLOBAL_PROXY_INDEX, dst);
636 }
637
638 // Conditionally load the cached Array transitioned map of type
639 // transitioned_kind from the native context if the map in register
640 // map_in_out is the cached Array map in the native context of
641 // expected_kind.
642 void LoadTransitionedArrayMapConditional(
643 ElementsKind expected_kind,
644 ElementsKind transitioned_kind,
645 Register map_in_out,
646 Register scratch,
647 Label* no_map_match);
648
649 void LoadNativeContextSlot(int index, Register dst);
650
651 // Load the initial map from the global function. The registers
652 // function and map can be the same, function is then overwritten.
653 void LoadGlobalFunctionInitialMap(Register function,
654 Register map,
655 Register scratch);
656
InitializeRootRegister()657 void InitializeRootRegister() {
658 ExternalReference roots_array_start =
659 ExternalReference::roots_array_start(isolate());
660 mov(kRootRegister, Operand(roots_array_start));
661 }
662
663 // ---------------------------------------------------------------------------
664 // JavaScript invokes
665
666 // Removes current frame and its arguments from the stack preserving
667 // the arguments and a return address pushed to the stack for the next call.
668 // Both |callee_args_count| and |caller_args_count_reg| do not include
669 // receiver. |callee_args_count| is not modified, |caller_args_count_reg|
670 // is trashed.
671 void PrepareForTailCall(const ParameterCount& callee_args_count,
672 Register caller_args_count_reg, Register scratch0,
673 Register scratch1);
674
675 // Invoke the JavaScript function code by either calling or jumping.
676 void InvokeFunctionCode(Register function, Register new_target,
677 const ParameterCount& expected,
678 const ParameterCount& actual, InvokeFlag flag,
679 const CallWrapper& call_wrapper);
680
681 void FloodFunctionIfStepping(Register fun, Register new_target,
682 const ParameterCount& expected,
683 const ParameterCount& actual);
684
685 // Invoke the JavaScript function in the given register. Changes the
686 // current context to the context in the function before invoking.
687 void InvokeFunction(Register function,
688 Register new_target,
689 const ParameterCount& actual,
690 InvokeFlag flag,
691 const CallWrapper& call_wrapper);
692
693 void InvokeFunction(Register function,
694 const ParameterCount& expected,
695 const ParameterCount& actual,
696 InvokeFlag flag,
697 const CallWrapper& call_wrapper);
698
699 void InvokeFunction(Handle<JSFunction> function,
700 const ParameterCount& expected,
701 const ParameterCount& actual,
702 InvokeFlag flag,
703 const CallWrapper& call_wrapper);
704
705 void IsObjectJSStringType(Register object,
706 Register scratch,
707 Label* fail);
708
709 void IsObjectNameType(Register object,
710 Register scratch,
711 Label* fail);
712
713 // ---------------------------------------------------------------------------
714 // Debugger Support
715
716 void DebugBreak();
717
718 // ---------------------------------------------------------------------------
719 // Exception handling
720
721 // Push a new stack handler and link into stack handler chain.
722 void PushStackHandler();
723
724 // Unlink the stack handler on top of the stack from the stack handler chain.
725 // Must preserve the result register.
726 void PopStackHandler();
727
728 // ---------------------------------------------------------------------------
729 // Inline caching support
730
731 void GetNumberHash(Register t0, Register scratch);
732
MarkCode(NopMarkerTypes type)733 inline void MarkCode(NopMarkerTypes type) {
734 nop(type);
735 }
736
737 // Check if the given instruction is a 'type' marker.
738 // i.e. check if is is a mov r<type>, r<type> (referenced as nop(type))
739 // These instructions are generated to mark special location in the code,
740 // like some special IC code.
IsMarkedCode(Instr instr,int type)741 static inline bool IsMarkedCode(Instr instr, int type) {
742 DCHECK((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
743 return IsNop(instr, type);
744 }
745
746
GetCodeMarker(Instr instr)747 static inline int GetCodeMarker(Instr instr) {
748 int dst_reg_offset = 12;
749 int dst_mask = 0xf << dst_reg_offset;
750 int src_mask = 0xf;
751 int dst_reg = (instr & dst_mask) >> dst_reg_offset;
752 int src_reg = instr & src_mask;
753 uint32_t non_register_mask = ~(dst_mask | src_mask);
754 uint32_t mov_mask = al | 13 << 21;
755
756 // Return <n> if we have a mov rn rn, else return -1.
757 int type = ((instr & non_register_mask) == mov_mask) &&
758 (dst_reg == src_reg) &&
759 (FIRST_IC_MARKER <= dst_reg) && (dst_reg < LAST_CODE_MARKER)
760 ? src_reg
761 : -1;
762 DCHECK((type == -1) ||
763 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
764 return type;
765 }
766
767
768 // ---------------------------------------------------------------------------
769 // Allocation support
770
771 // Allocate an object in new space or old space. The object_size is
772 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
773 // is passed. If the space is exhausted control continues at the gc_required
774 // label. The allocated object is returned in result. If the flag
775 // tag_allocated_object is true the result is tagged as as a heap object.
776 // All registers are clobbered also when control continues at the gc_required
777 // label.
778 void Allocate(int object_size,
779 Register result,
780 Register scratch1,
781 Register scratch2,
782 Label* gc_required,
783 AllocationFlags flags);
784
785 void Allocate(Register object_size, Register result, Register result_end,
786 Register scratch, Label* gc_required, AllocationFlags flags);
787
788 // FastAllocate is right now only used for folded allocations. It just
789 // increments the top pointer without checking against limit. This can only
790 // be done if it was proved earlier that the allocation will succeed.
791 void FastAllocate(int object_size, Register result, Register scratch1,
792 Register scratch2, AllocationFlags flags);
793
794 void FastAllocate(Register object_size, Register result, Register result_end,
795 Register scratch, AllocationFlags flags);
796
797 void AllocateTwoByteString(Register result,
798 Register length,
799 Register scratch1,
800 Register scratch2,
801 Register scratch3,
802 Label* gc_required);
803 void AllocateOneByteString(Register result, Register length,
804 Register scratch1, Register scratch2,
805 Register scratch3, Label* gc_required);
806 void AllocateTwoByteConsString(Register result,
807 Register length,
808 Register scratch1,
809 Register scratch2,
810 Label* gc_required);
811 void AllocateOneByteConsString(Register result, Register length,
812 Register scratch1, Register scratch2,
813 Label* gc_required);
814 void AllocateTwoByteSlicedString(Register result,
815 Register length,
816 Register scratch1,
817 Register scratch2,
818 Label* gc_required);
819 void AllocateOneByteSlicedString(Register result, Register length,
820 Register scratch1, Register scratch2,
821 Label* gc_required);
822
823 // Allocates a heap number or jumps to the gc_required label if the young
824 // space is full and a scavenge is needed. All registers are clobbered also
825 // when control continues at the gc_required label.
826 void AllocateHeapNumber(Register result,
827 Register scratch1,
828 Register scratch2,
829 Register heap_number_map,
830 Label* gc_required,
831 MutableMode mode = IMMUTABLE);
832 void AllocateHeapNumberWithValue(Register result,
833 DwVfpRegister value,
834 Register scratch1,
835 Register scratch2,
836 Register heap_number_map,
837 Label* gc_required);
838
839 // Allocate and initialize a JSValue wrapper with the specified {constructor}
840 // and {value}.
841 void AllocateJSValue(Register result, Register constructor, Register value,
842 Register scratch1, Register scratch2,
843 Label* gc_required);
844
845 // Initialize fields with filler values. Fields starting at |current_address|
846 // not including |end_address| are overwritten with the value in |filler|. At
847 // the end the loop, |current_address| takes the value of |end_address|.
848 void InitializeFieldsWithFiller(Register current_address,
849 Register end_address, Register filler);
850
851 // ---------------------------------------------------------------------------
852 // Support functions.
853
854 // Machine code version of Map::GetConstructor().
855 // |temp| holds |result|'s map when done, and |temp2| its instance type.
856 void GetMapConstructor(Register result, Register map, Register temp,
857 Register temp2);
858
859 // Try to get function prototype of a function and puts the value in
860 // the result register. Checks that the function really is a
861 // function and jumps to the miss label if the fast checks fail. The
862 // function register will be untouched; the other registers may be
863 // clobbered.
864 void TryGetFunctionPrototype(Register function, Register result,
865 Register scratch, Label* miss);
866
867 // Compare object type for heap object. heap_object contains a non-Smi
868 // whose object type should be compared with the given type. This both
869 // sets the flags and leaves the object type in the type_reg register.
870 // It leaves the map in the map register (unless the type_reg and map register
871 // are the same register). It leaves the heap object in the heap_object
872 // register unless the heap_object register is the same register as one of the
873 // other registers.
874 // Type_reg can be no_reg. In that case ip is used.
875 void CompareObjectType(Register heap_object,
876 Register map,
877 Register type_reg,
878 InstanceType type);
879
880 // Compare instance type in a map. map contains a valid map object whose
881 // object type should be compared with the given type. This both
882 // sets the flags and leaves the object type in the type_reg register.
883 void CompareInstanceType(Register map,
884 Register type_reg,
885 InstanceType type);
886
887 // Check if a map for a JSObject indicates that the object can have both smi
888 // and HeapObject elements. Jump to the specified label if it does not.
889 void CheckFastObjectElements(Register map,
890 Register scratch,
891 Label* fail);
892
893 // Check if a map for a JSObject indicates that the object has fast smi only
894 // elements. Jump to the specified label if it does not.
895 void CheckFastSmiElements(Register map,
896 Register scratch,
897 Label* fail);
898
899 // Check to see if maybe_number can be stored as a double in
900 // FastDoubleElements. If it can, store it at the index specified by key in
901 // the FastDoubleElements array elements. Otherwise jump to fail.
902 void StoreNumberToDoubleElements(Register value_reg,
903 Register key_reg,
904 Register elements_reg,
905 Register scratch1,
906 LowDwVfpRegister double_scratch,
907 Label* fail,
908 int elements_offset = 0);
909
910 // Compare an object's map with the specified map and its transitioned
911 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Condition flags are
912 // set with result of map compare. If multiple map compares are required, the
913 // compare sequences branches to early_success.
914 void CompareMap(Register obj,
915 Register scratch,
916 Handle<Map> map,
917 Label* early_success);
918
919 // As above, but the map of the object is already loaded into the register
920 // which is preserved by the code generated.
921 void CompareMap(Register obj_map,
922 Handle<Map> map,
923 Label* early_success);
924
925 // Check if the map of an object is equal to a specified map and branch to
926 // label if not. Skip the smi check if not required (object is known to be a
927 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
928 // against maps that are ElementsKind transition maps of the specified map.
929 void CheckMap(Register obj,
930 Register scratch,
931 Handle<Map> map,
932 Label* fail,
933 SmiCheckType smi_check_type);
934
935
936 void CheckMap(Register obj,
937 Register scratch,
938 Heap::RootListIndex index,
939 Label* fail,
940 SmiCheckType smi_check_type);
941
942
943 // Check if the map of an object is equal to a specified weak map and branch
944 // to a specified target if equal. Skip the smi check if not required
945 // (object is known to be a heap object)
946 void DispatchWeakMap(Register obj, Register scratch1, Register scratch2,
947 Handle<WeakCell> cell, Handle<Code> success,
948 SmiCheckType smi_check_type);
949
950 // Compare the given value and the value of weak cell.
951 void CmpWeakValue(Register value, Handle<WeakCell> cell, Register scratch);
952
953 void GetWeakValue(Register value, Handle<WeakCell> cell);
954
955 // Load the value of the weak cell in the value register. Branch to the given
956 // miss label if the weak cell was cleared.
957 void LoadWeakValue(Register value, Handle<WeakCell> cell, Label* miss);
958
959 // Compare the object in a register to a value from the root list.
960 // Uses the ip register as scratch.
961 void CompareRoot(Register obj, Heap::RootListIndex index);
PushRoot(Heap::RootListIndex index)962 void PushRoot(Heap::RootListIndex index) {
963 LoadRoot(ip, index);
964 Push(ip);
965 }
966
967 // Compare the object in a register to a value and jump if they are equal.
JumpIfRoot(Register with,Heap::RootListIndex index,Label * if_equal)968 void JumpIfRoot(Register with, Heap::RootListIndex index, Label* if_equal) {
969 CompareRoot(with, index);
970 b(eq, if_equal);
971 }
972
973 // Compare the object in a register to a value and jump if they are not equal.
JumpIfNotRoot(Register with,Heap::RootListIndex index,Label * if_not_equal)974 void JumpIfNotRoot(Register with, Heap::RootListIndex index,
975 Label* if_not_equal) {
976 CompareRoot(with, index);
977 b(ne, if_not_equal);
978 }
979
980 // Load and check the instance type of an object for being a string.
981 // Loads the type into the second argument register.
982 // Returns a condition that will be enabled if the object was a string
983 // and the passed-in condition passed. If the passed-in condition failed
984 // then flags remain unchanged.
985 Condition IsObjectStringType(Register obj,
986 Register type,
987 Condition cond = al) {
988 ldr(type, FieldMemOperand(obj, HeapObject::kMapOffset), cond);
989 ldrb(type, FieldMemOperand(type, Map::kInstanceTypeOffset), cond);
990 tst(type, Operand(kIsNotStringMask), cond);
991 DCHECK_EQ(0u, kStringTag);
992 return eq;
993 }
994
995
996 // Get the number of least significant bits from a register
997 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
998 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
999
1000 // Load the value of a smi object into a double register.
1001 // The register value must be between d0 and d15.
1002 void SmiToDouble(LowDwVfpRegister value, Register smi);
1003
1004 // Check if a double can be exactly represented as a signed 32-bit integer.
1005 // Z flag set to one if true.
1006 void TestDoubleIsInt32(DwVfpRegister double_input,
1007 LowDwVfpRegister double_scratch);
1008
1009 // Try to convert a double to a signed 32-bit integer.
1010 // Z flag set to one and result assigned if the conversion is exact.
1011 void TryDoubleToInt32Exact(Register result,
1012 DwVfpRegister double_input,
1013 LowDwVfpRegister double_scratch);
1014
1015 // Floor a double and writes the value to the result register.
1016 // Go to exact if the conversion is exact (to be able to test -0),
1017 // fall through calling code if an overflow occurred, else go to done.
1018 // In return, input_high is loaded with high bits of input.
1019 void TryInt32Floor(Register result,
1020 DwVfpRegister double_input,
1021 Register input_high,
1022 LowDwVfpRegister double_scratch,
1023 Label* done,
1024 Label* exact);
1025
1026 // Performs a truncating conversion of a floating point number as used by
1027 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
1028 // succeeds, otherwise falls through if result is saturated. On return
1029 // 'result' either holds answer, or is clobbered on fall through.
1030 //
1031 // Only public for the test code in test-code-stubs-arm.cc.
1032 void TryInlineTruncateDoubleToI(Register result,
1033 DwVfpRegister input,
1034 Label* done);
1035
1036 // Performs a truncating conversion of a floating point number as used by
1037 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
1038 // Exits with 'result' holding the answer.
1039 void TruncateDoubleToI(Register result, DwVfpRegister double_input);
1040
1041 // Performs a truncating conversion of a heap number as used by
1042 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 'result' and 'input'
1043 // must be different registers. Exits with 'result' holding the answer.
1044 void TruncateHeapNumberToI(Register result, Register object);
1045
1046 // Converts the smi or heap number in object to an int32 using the rules
1047 // for ToInt32 as described in ECMAScript 9.5.: the value is truncated
1048 // and brought into the range -2^31 .. +2^31 - 1. 'result' and 'input' must be
1049 // different registers.
1050 void TruncateNumberToI(Register object,
1051 Register result,
1052 Register heap_number_map,
1053 Register scratch1,
1054 Label* not_int32);
1055
1056 // Check whether d16-d31 are available on the CPU. The result is given by the
1057 // Z condition flag: Z==0 if d16-d31 available, Z==1 otherwise.
1058 void CheckFor32DRegs(Register scratch);
1059
1060 // Does a runtime check for 16/32 FP registers. Either way, pushes 32 double
1061 // values to location, saving [d0..(d15|d31)].
1062 void SaveFPRegs(Register location, Register scratch);
1063
1064 // Does a runtime check for 16/32 FP registers. Either way, pops 32 double
1065 // values to location, restoring [d0..(d15|d31)].
1066 void RestoreFPRegs(Register location, Register scratch);
1067
1068 // Perform a floating-point min or max operation with the
1069 // (IEEE-754-compatible) semantics of ARM64's fmin/fmax. Some cases, typically
1070 // NaNs or +/-0.0, are expected to be rare and are handled in out-of-line
1071 // code. The specific behaviour depends on supported instructions.
1072 //
1073 // These functions assume (and assert) that !left.is(right). It is permitted
1074 // for the result to alias either input register.
1075 void FloatMax(SwVfpRegister result, SwVfpRegister left, SwVfpRegister right,
1076 Label* out_of_line);
1077 void FloatMin(SwVfpRegister result, SwVfpRegister left, SwVfpRegister right,
1078 Label* out_of_line);
1079 void FloatMax(DwVfpRegister result, DwVfpRegister left, DwVfpRegister right,
1080 Label* out_of_line);
1081 void FloatMin(DwVfpRegister result, DwVfpRegister left, DwVfpRegister right,
1082 Label* out_of_line);
1083
1084 // Generate out-of-line cases for the macros above.
1085 void FloatMaxOutOfLine(SwVfpRegister result, SwVfpRegister left,
1086 SwVfpRegister right);
1087 void FloatMinOutOfLine(SwVfpRegister result, SwVfpRegister left,
1088 SwVfpRegister right);
1089 void FloatMaxOutOfLine(DwVfpRegister result, DwVfpRegister left,
1090 DwVfpRegister right);
1091 void FloatMinOutOfLine(DwVfpRegister result, DwVfpRegister left,
1092 DwVfpRegister right);
1093
1094 // ---------------------------------------------------------------------------
1095 // Runtime calls
1096
1097 // Call a code stub.
1098 void CallStub(CodeStub* stub,
1099 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1100 Condition cond = al);
1101
1102 // Call a code stub.
1103 void TailCallStub(CodeStub* stub, Condition cond = al);
1104
1105 // Call a runtime routine.
1106 void CallRuntime(const Runtime::Function* f,
1107 int num_arguments,
1108 SaveFPRegsMode save_doubles = kDontSaveFPRegs);
CallRuntimeSaveDoubles(Runtime::FunctionId fid)1109 void CallRuntimeSaveDoubles(Runtime::FunctionId fid) {
1110 const Runtime::Function* function = Runtime::FunctionForId(fid);
1111 CallRuntime(function, function->nargs, kSaveFPRegs);
1112 }
1113
1114 // Convenience function: Same as above, but takes the fid instead.
1115 void CallRuntime(Runtime::FunctionId fid,
1116 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1117 const Runtime::Function* function = Runtime::FunctionForId(fid);
1118 CallRuntime(function, function->nargs, save_doubles);
1119 }
1120
1121 // Convenience function: Same as above, but takes the fid instead.
1122 void CallRuntime(Runtime::FunctionId fid, int num_arguments,
1123 SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
1124 CallRuntime(Runtime::FunctionForId(fid), num_arguments, save_doubles);
1125 }
1126
1127 // Convenience function: call an external reference.
1128 void CallExternalReference(const ExternalReference& ext,
1129 int num_arguments);
1130
1131 // Convenience function: tail call a runtime routine (jump).
1132 void TailCallRuntime(Runtime::FunctionId fid);
1133
1134 int CalculateStackPassedWords(int num_reg_arguments,
1135 int num_double_arguments);
1136
1137 // Before calling a C-function from generated code, align arguments on stack.
1138 // After aligning the frame, non-register arguments must be stored in
1139 // sp[0], sp[4], etc., not pushed. The argument count assumes all arguments
1140 // are word sized. If double arguments are used, this function assumes that
1141 // all double arguments are stored before core registers; otherwise the
1142 // correct alignment of the double values is not guaranteed.
1143 // Some compilers/platforms require the stack to be aligned when calling
1144 // C++ code.
1145 // Needs a scratch register to do some arithmetic. This register will be
1146 // trashed.
1147 void PrepareCallCFunction(int num_reg_arguments,
1148 int num_double_registers,
1149 Register scratch);
1150 void PrepareCallCFunction(int num_reg_arguments,
1151 Register scratch);
1152
1153 // There are two ways of passing double arguments on ARM, depending on
1154 // whether soft or hard floating point ABI is used. These functions
1155 // abstract parameter passing for the three different ways we call
1156 // C functions from generated code.
1157 void MovToFloatParameter(DwVfpRegister src);
1158 void MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2);
1159 void MovToFloatResult(DwVfpRegister src);
1160
1161 // Calls a C function and cleans up the space for arguments allocated
1162 // by PrepareCallCFunction. The called function is not allowed to trigger a
1163 // garbage collection, since that might move the code and invalidate the
1164 // return address (unless this is somehow accounted for by the called
1165 // function).
1166 void CallCFunction(ExternalReference function, int num_arguments);
1167 void CallCFunction(Register function, int num_arguments);
1168 void CallCFunction(ExternalReference function,
1169 int num_reg_arguments,
1170 int num_double_arguments);
1171 void CallCFunction(Register function,
1172 int num_reg_arguments,
1173 int num_double_arguments);
1174
1175 void MovFromFloatParameter(DwVfpRegister dst);
1176 void MovFromFloatResult(DwVfpRegister dst);
1177
1178 // Jump to a runtime routine.
1179 void JumpToExternalReference(const ExternalReference& builtin,
1180 bool builtin_exit_frame = false);
1181
CodeObject()1182 Handle<Object> CodeObject() {
1183 DCHECK(!code_object_.is_null());
1184 return code_object_;
1185 }
1186
1187
1188 // Emit code for a truncating division by a constant. The dividend register is
1189 // unchanged and ip gets clobbered. Dividend and result must be different.
1190 void TruncatingDiv(Register result, Register dividend, int32_t divisor);
1191
1192 // ---------------------------------------------------------------------------
1193 // StatsCounter support
1194
1195 void SetCounter(StatsCounter* counter, int value,
1196 Register scratch1, Register scratch2);
1197 void IncrementCounter(StatsCounter* counter, int value,
1198 Register scratch1, Register scratch2);
1199 void DecrementCounter(StatsCounter* counter, int value,
1200 Register scratch1, Register scratch2);
1201
1202
1203 // ---------------------------------------------------------------------------
1204 // Debugging
1205
1206 // Calls Abort(msg) if the condition cond is not satisfied.
1207 // Use --debug_code to enable.
1208 void Assert(Condition cond, BailoutReason reason);
1209 void AssertFastElements(Register elements);
1210
1211 // Like Assert(), but always enabled.
1212 void Check(Condition cond, BailoutReason reason);
1213
1214 // Print a message to stdout and abort execution.
1215 void Abort(BailoutReason msg);
1216
1217 // Verify restrictions about code generated in stubs.
set_generating_stub(bool value)1218 void set_generating_stub(bool value) { generating_stub_ = value; }
generating_stub()1219 bool generating_stub() { return generating_stub_; }
set_has_frame(bool value)1220 void set_has_frame(bool value) { has_frame_ = value; }
has_frame()1221 bool has_frame() { return has_frame_; }
1222 inline bool AllowThisStubCall(CodeStub* stub);
1223
1224 // EABI variant for double arguments in use.
use_eabi_hardfloat()1225 bool use_eabi_hardfloat() {
1226 #ifdef __arm__
1227 return base::OS::ArmUsingHardFloat();
1228 #elif USE_EABI_HARDFLOAT
1229 return true;
1230 #else
1231 return false;
1232 #endif
1233 }
1234
1235 // ---------------------------------------------------------------------------
1236 // Number utilities
1237
1238 // Check whether the value of reg is a power of two and not zero. If not
1239 // control continues at the label not_power_of_two. If reg is a power of two
1240 // the register scratch contains the value of (reg - 1) when control falls
1241 // through.
1242 void JumpIfNotPowerOfTwoOrZero(Register reg,
1243 Register scratch,
1244 Label* not_power_of_two_or_zero);
1245 // Check whether the value of reg is a power of two and not zero.
1246 // Control falls through if it is, with scratch containing the mask
1247 // value (reg - 1).
1248 // Otherwise control jumps to the 'zero_and_neg' label if the value of reg is
1249 // zero or negative, or jumps to the 'not_power_of_two' label if the value is
1250 // strictly positive but not a power of two.
1251 void JumpIfNotPowerOfTwoOrZeroAndNeg(Register reg,
1252 Register scratch,
1253 Label* zero_and_neg,
1254 Label* not_power_of_two);
1255
1256 // ---------------------------------------------------------------------------
1257 // Smi utilities
1258
1259 void SmiTag(Register reg, SBit s = LeaveCC) {
1260 add(reg, reg, Operand(reg), s);
1261 }
1262 void SmiTag(Register dst, Register src, SBit s = LeaveCC) {
1263 add(dst, src, Operand(src), s);
1264 }
1265
1266 // Try to convert int32 to smi. If the value is to large, preserve
1267 // the original value and jump to not_a_smi. Destroys scratch and
1268 // sets flags.
TrySmiTag(Register reg,Label * not_a_smi)1269 void TrySmiTag(Register reg, Label* not_a_smi) {
1270 TrySmiTag(reg, reg, not_a_smi);
1271 }
TrySmiTag(Register reg,Register src,Label * not_a_smi)1272 void TrySmiTag(Register reg, Register src, Label* not_a_smi) {
1273 SmiTag(ip, src, SetCC);
1274 b(vs, not_a_smi);
1275 mov(reg, ip);
1276 }
1277
1278
1279 void SmiUntag(Register reg, SBit s = LeaveCC) {
1280 mov(reg, Operand::SmiUntag(reg), s);
1281 }
1282 void SmiUntag(Register dst, Register src, SBit s = LeaveCC) {
1283 mov(dst, Operand::SmiUntag(src), s);
1284 }
1285
1286 // Untag the source value into destination and jump if source is a smi.
1287 // Souce and destination can be the same register.
1288 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1289
1290 // Untag the source value into destination and jump if source is not a smi.
1291 // Souce and destination can be the same register.
1292 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1293
1294 // Test if the register contains a smi (Z == 0 (eq) if true).
SmiTst(Register value)1295 inline void SmiTst(Register value) {
1296 tst(value, Operand(kSmiTagMask));
1297 }
NonNegativeSmiTst(Register value)1298 inline void NonNegativeSmiTst(Register value) {
1299 tst(value, Operand(kSmiTagMask | kSmiSignMask));
1300 }
1301 // Jump if the register contains a smi.
JumpIfSmi(Register value,Label * smi_label)1302 inline void JumpIfSmi(Register value, Label* smi_label) {
1303 tst(value, Operand(kSmiTagMask));
1304 b(eq, smi_label);
1305 }
1306 // Jump if either of the registers contain a non-smi.
JumpIfNotSmi(Register value,Label * not_smi_label)1307 inline void JumpIfNotSmi(Register value, Label* not_smi_label) {
1308 tst(value, Operand(kSmiTagMask));
1309 b(ne, not_smi_label);
1310 }
1311 // Jump if either of the registers contain a non-smi.
1312 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1313 // Jump if either of the registers contain a smi.
1314 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1315
1316 // Abort execution if argument is a number, enabled via --debug-code.
1317 void AssertNotNumber(Register object);
1318
1319 // Abort execution if argument is a smi, enabled via --debug-code.
1320 void AssertNotSmi(Register object);
1321 void AssertSmi(Register object);
1322
1323 // Abort execution if argument is not a string, enabled via --debug-code.
1324 void AssertString(Register object);
1325
1326 // Abort execution if argument is not a name, enabled via --debug-code.
1327 void AssertName(Register object);
1328
1329 // Abort execution if argument is not a JSFunction, enabled via --debug-code.
1330 void AssertFunction(Register object);
1331
1332 // Abort execution if argument is not a JSBoundFunction,
1333 // enabled via --debug-code.
1334 void AssertBoundFunction(Register object);
1335
1336 // Abort execution if argument is not a JSGeneratorObject,
1337 // enabled via --debug-code.
1338 void AssertGeneratorObject(Register object);
1339
1340 // Abort execution if argument is not a JSReceiver, enabled via --debug-code.
1341 void AssertReceiver(Register object);
1342
1343 // Abort execution if argument is not undefined or an AllocationSite, enabled
1344 // via --debug-code.
1345 void AssertUndefinedOrAllocationSite(Register object, Register scratch);
1346
1347 // Abort execution if reg is not the root value with the given index,
1348 // enabled via --debug-code.
1349 void AssertIsRoot(Register reg, Heap::RootListIndex index);
1350
1351 // ---------------------------------------------------------------------------
1352 // HeapNumber utilities
1353
1354 void JumpIfNotHeapNumber(Register object,
1355 Register heap_number_map,
1356 Register scratch,
1357 Label* on_not_heap_number);
1358
1359 // ---------------------------------------------------------------------------
1360 // String utilities
1361
1362 // Checks if both objects are sequential one-byte strings and jumps to label
1363 // if either is not. Assumes that neither object is a smi.
1364 void JumpIfNonSmisNotBothSequentialOneByteStrings(Register object1,
1365 Register object2,
1366 Register scratch1,
1367 Register scratch2,
1368 Label* failure);
1369
1370 // Checks if both objects are sequential one-byte strings and jumps to label
1371 // if either is not.
1372 void JumpIfNotBothSequentialOneByteStrings(Register first, Register second,
1373 Register scratch1,
1374 Register scratch2,
1375 Label* not_flat_one_byte_strings);
1376
1377 // Checks if both instance types are sequential one-byte strings and jumps to
1378 // label if either is not.
1379 void JumpIfBothInstanceTypesAreNotSequentialOneByte(
1380 Register first_object_instance_type, Register second_object_instance_type,
1381 Register scratch1, Register scratch2, Label* failure);
1382
1383 // Check if instance type is sequential one-byte string and jump to label if
1384 // it is not.
1385 void JumpIfInstanceTypeIsNotSequentialOneByte(Register type, Register scratch,
1386 Label* failure);
1387
1388 void JumpIfNotUniqueNameInstanceType(Register reg, Label* not_unique_name);
1389
1390 void EmitSeqStringSetCharCheck(Register string,
1391 Register index,
1392 Register value,
1393 uint32_t encoding_mask);
1394
1395
1396 void ClampUint8(Register output_reg, Register input_reg);
1397
1398 void ClampDoubleToUint8(Register result_reg,
1399 DwVfpRegister input_reg,
1400 LowDwVfpRegister double_scratch);
1401
1402
1403 void LoadInstanceDescriptors(Register map, Register descriptors);
1404 void EnumLength(Register dst, Register map);
1405 void NumberOfOwnDescriptors(Register dst, Register map);
1406 void LoadAccessor(Register dst, Register holder, int accessor_index,
1407 AccessorComponent accessor);
1408
1409 template<typename Field>
DecodeField(Register dst,Register src)1410 void DecodeField(Register dst, Register src) {
1411 Ubfx(dst, src, Field::kShift, Field::kSize);
1412 }
1413
1414 template<typename Field>
DecodeField(Register reg)1415 void DecodeField(Register reg) {
1416 DecodeField<Field>(reg, reg);
1417 }
1418
1419 template<typename Field>
DecodeFieldToSmi(Register dst,Register src)1420 void DecodeFieldToSmi(Register dst, Register src) {
1421 static const int shift = Field::kShift;
1422 static const int mask = Field::kMask >> shift << kSmiTagSize;
1423 STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
1424 STATIC_ASSERT(kSmiTag == 0);
1425 if (shift < kSmiTagSize) {
1426 mov(dst, Operand(src, LSL, kSmiTagSize - shift));
1427 and_(dst, dst, Operand(mask));
1428 } else if (shift > kSmiTagSize) {
1429 mov(dst, Operand(src, LSR, shift - kSmiTagSize));
1430 and_(dst, dst, Operand(mask));
1431 } else {
1432 and_(dst, src, Operand(mask));
1433 }
1434 }
1435
1436 template<typename Field>
DecodeFieldToSmi(Register reg)1437 void DecodeFieldToSmi(Register reg) {
1438 DecodeField<Field>(reg, reg);
1439 }
1440
1441 // Load the type feedback vector from a JavaScript frame.
1442 void EmitLoadTypeFeedbackVector(Register vector);
1443
1444 // Activation support.
1445 void EnterFrame(StackFrame::Type type,
1446 bool load_constant_pool_pointer_reg = false);
1447 // Returns the pc offset at which the frame ends.
1448 int LeaveFrame(StackFrame::Type type);
1449
1450 void EnterBuiltinFrame(Register context, Register target, Register argc);
1451 void LeaveBuiltinFrame(Register context, Register target, Register argc);
1452
1453 // Expects object in r0 and returns map with validated enum cache
1454 // in r0. Assumes that any other register can be used as a scratch.
1455 void CheckEnumCache(Label* call_runtime);
1456
1457 // AllocationMemento support. Arrays may have an associated
1458 // AllocationMemento object that can be checked for in order to pretransition
1459 // to another type.
1460 // On entry, receiver_reg should point to the array object.
1461 // scratch_reg gets clobbered.
1462 // If allocation info is present, condition flags are set to eq.
1463 void TestJSArrayForAllocationMemento(Register receiver_reg,
1464 Register scratch_reg,
1465 Label* no_memento_found);
1466
JumpIfJSArrayHasAllocationMemento(Register receiver_reg,Register scratch_reg,Label * memento_found)1467 void JumpIfJSArrayHasAllocationMemento(Register receiver_reg,
1468 Register scratch_reg,
1469 Label* memento_found) {
1470 Label no_memento_found;
1471 TestJSArrayForAllocationMemento(receiver_reg, scratch_reg,
1472 &no_memento_found);
1473 b(eq, memento_found);
1474 bind(&no_memento_found);
1475 }
1476
1477 // Jumps to found label if a prototype map has dictionary elements.
1478 void JumpIfDictionaryInPrototypeChain(Register object, Register scratch0,
1479 Register scratch1, Label* found);
1480
1481 // Loads the constant pool pointer (pp) register.
1482 void LoadConstantPoolPointerRegisterFromCodeTargetAddress(
1483 Register code_target_address);
1484 void LoadConstantPoolPointerRegister();
1485
1486 private:
1487 void CallCFunctionHelper(Register function,
1488 int num_reg_arguments,
1489 int num_double_arguments);
1490
1491 void Jump(intptr_t target, RelocInfo::Mode rmode, Condition cond = al);
1492
1493 // Helper functions for generating invokes.
1494 void InvokePrologue(const ParameterCount& expected,
1495 const ParameterCount& actual,
1496 Label* done,
1497 bool* definitely_mismatches,
1498 InvokeFlag flag,
1499 const CallWrapper& call_wrapper);
1500
1501 void InitializeNewString(Register string,
1502 Register length,
1503 Heap::RootListIndex map_index,
1504 Register scratch1,
1505 Register scratch2);
1506
1507 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1508 void InNewSpace(Register object,
1509 Register scratch,
1510 Condition cond, // eq for new space, ne otherwise.
1511 Label* branch);
1512
1513 // Helper for finding the mark bits for an address. Afterwards, the
1514 // bitmap register points at the word with the mark bits and the mask
1515 // the position of the first bit. Leaves addr_reg unchanged.
1516 inline void GetMarkBits(Register addr_reg,
1517 Register bitmap_reg,
1518 Register mask_reg);
1519
1520 // Compute memory operands for safepoint stack slots.
1521 static int SafepointRegisterStackIndex(int reg_code);
1522 MemOperand SafepointRegisterSlot(Register reg);
1523 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1524
1525 // Implementation helpers for FloatMin and FloatMax.
1526 template <typename T>
1527 void FloatMaxHelper(T result, T left, T right, Label* out_of_line);
1528 template <typename T>
1529 void FloatMinHelper(T result, T left, T right, Label* out_of_line);
1530 template <typename T>
1531 void FloatMaxOutOfLineHelper(T result, T left, T right);
1532 template <typename T>
1533 void FloatMinOutOfLineHelper(T result, T left, T right);
1534
1535 bool generating_stub_;
1536 bool has_frame_;
1537 // This handle will be patched with the code object on installation.
1538 Handle<Object> code_object_;
1539
1540 // Needs access to SafepointRegisterStackIndex for compiled frame
1541 // traversal.
1542 friend class StandardFrame;
1543 };
1544
1545
1546 // The code patcher is used to patch (typically) small parts of code e.g. for
1547 // debugging and other types of instrumentation. When using the code patcher
1548 // the exact number of bytes specified must be emitted. It is not legal to emit
1549 // relocation information. If any of these constraints are violated it causes
1550 // an assertion to fail.
1551 class CodePatcher {
1552 public:
1553 enum FlushICache {
1554 FLUSH,
1555 DONT_FLUSH
1556 };
1557
1558 CodePatcher(Isolate* isolate, byte* address, int instructions,
1559 FlushICache flush_cache = FLUSH);
1560 ~CodePatcher();
1561
1562 // Macro assembler to emit code.
masm()1563 MacroAssembler* masm() { return &masm_; }
1564
1565 // Emit an instruction directly.
1566 void Emit(Instr instr);
1567
1568 // Emit an address directly.
1569 void Emit(Address addr);
1570
1571 // Emit the condition part of an instruction leaving the rest of the current
1572 // instruction unchanged.
1573 void EmitCondition(Condition cond);
1574
1575 private:
1576 byte* address_; // The address of the code being patched.
1577 int size_; // Number of bytes of the expected patch size.
1578 MacroAssembler masm_; // Macro assembler used to generate the code.
1579 FlushICache flush_cache_; // Whether to flush the I cache after patching.
1580 };
1581
1582
1583 // -----------------------------------------------------------------------------
1584 // Static helper functions.
1585
1586 inline MemOperand ContextMemOperand(Register context, int index = 0) {
1587 return MemOperand(context, Context::SlotOffset(index));
1588 }
1589
1590
NativeContextMemOperand()1591 inline MemOperand NativeContextMemOperand() {
1592 return ContextMemOperand(cp, Context::NATIVE_CONTEXT_INDEX);
1593 }
1594
1595 #define ACCESS_MASM(masm) masm->
1596
1597 } // namespace internal
1598 } // namespace v8
1599
1600 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_
1601