1 // Copyright 2016, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 // * Redistributions of source code must retain the above copyright notice,
8 // this list of conditions and the following disclaimer.
9 // * Redistributions in binary form must reproduce the above copyright notice,
10 // this list of conditions and the following disclaimer in the documentation
11 // and/or other materials provided with the distribution.
12 // * Neither the name of ARM Limited nor the names of its contributors may be
13 // used to endorse or promote products derived from this software without
14 // specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28 // -----------------------------------------------------------------------------
29 // This file is auto generated from the
30 // test/aarch32/config/template-simulator-aarch32.cc.in template file using
31 // tools/generate_tests.py.
32 //
33 // PLEASE DO NOT EDIT.
34 // -----------------------------------------------------------------------------
35
36
37 #include "test-runner.h"
38
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
41
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
44 #include "aarch32/disasm-aarch32.h"
45
46 #define __ masm.
47 #define BUF_SIZE (4096)
48
49 #ifdef VIXL_INCLUDE_SIMULATOR_AARCH32
50 // Run tests with the simulator.
51
52 #define SETUP() MacroAssembler masm(BUF_SIZE)
53
54 #define START() masm.GetBuffer()->Reset()
55
56 #define END() \
57 __ Hlt(0); \
58 __ FinalizeCode();
59
60 // TODO: Run the tests in the simulator.
61 #define RUN()
62
63 #define TEARDOWN()
64
65 #else // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32.
66
67 #define SETUP() \
68 MacroAssembler masm(BUF_SIZE); \
69 UseScratchRegisterScope harness_scratch(&masm); \
70 harness_scratch.ExcludeAll();
71
72 #define START() \
73 masm.GetBuffer()->Reset(); \
74 __ Push(r4); \
75 __ Push(r5); \
76 __ Push(r6); \
77 __ Push(r7); \
78 __ Push(r8); \
79 __ Push(r9); \
80 __ Push(r10); \
81 __ Push(r11); \
82 __ Push(lr); \
83 harness_scratch.Include(ip);
84
85 #define END() \
86 harness_scratch.Exclude(ip); \
87 __ Pop(lr); \
88 __ Pop(r11); \
89 __ Pop(r10); \
90 __ Pop(r9); \
91 __ Pop(r8); \
92 __ Pop(r7); \
93 __ Pop(r6); \
94 __ Pop(r5); \
95 __ Pop(r4); \
96 __ Bx(lr); \
97 __ FinalizeCode();
98
99 #define RUN() \
100 { \
101 int pcs_offset = masm.IsUsingT32() ? 1 : 0; \
102 masm.GetBuffer()->SetExecutable(); \
103 ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \
104 masm.GetSizeOfCodeGenerated(), \
105 pcs_offset); \
106 masm.GetBuffer()->SetWritable(); \
107 }
108
109 #define TEARDOWN() harness_scratch.Close();
110
111 #endif // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32
112
113 namespace vixl {
114 namespace aarch32 {
115
116 // List of instruction encodings:
117 #define FOREACH_INSTRUCTION(M) \
118 M(Cmn) \
119 M(Cmp) \
120 M(Mov) \
121 M(Movs) \
122 M(Mvn) \
123 M(Mvns) \
124 M(Teq) \
125 M(Tst)
126
127
128 // The following definitions are defined again in each generated test, therefore
129 // we need to place them in an anomymous namespace. It expresses that they are
130 // local to this file only, and the compiler is not allowed to share these types
131 // across test files during template instantiation. Specifically, `Operands` and
132 // `Inputs` have various layouts across generated tests so they absolutely
133 // cannot be shared.
134
135 #ifdef VIXL_INCLUDE_TARGET_A32
136 namespace {
137
138 // Values to be passed to the assembler to produce the instruction under test.
139 struct Operands {
140 Condition cond;
141 Register rd;
142 uint32_t immediate;
143 };
144
145 // Input data to feed to the instruction.
146 struct Inputs {
147 uint32_t apsr;
148 uint32_t rd;
149 };
150
151 // This structure contains all input data needed to test one specific encoding.
152 // It used to generate a loop over an instruction.
153 struct TestLoopData {
154 // The `operands` fields represents the values to pass to the assembler to
155 // produce the instruction.
156 Operands operands;
157 // Description of the operands, used for error reporting.
158 const char* operands_description;
159 // Unique identifier, used for generating traces.
160 const char* identifier;
161 // Array of values to be fed to the instruction.
162 size_t input_size;
163 const Inputs* inputs;
164 };
165
166 static const Inputs kCondition[] = {{NFlag, 0xabababab},
167 {ZFlag, 0xabababab},
168 {CFlag, 0xabababab},
169 {VFlag, 0xabababab},
170 {NZFlag, 0xabababab},
171 {NCFlag, 0xabababab},
172 {NVFlag, 0xabababab},
173 {ZCFlag, 0xabababab},
174 {ZVFlag, 0xabababab},
175 {CVFlag, 0xabababab},
176 {NZCFlag, 0xabababab},
177 {NZVFlag, 0xabababab},
178 {NCVFlag, 0xabababab},
179 {ZCVFlag, 0xabababab},
180 {NZCVFlag, 0xabababab}};
181
182 static const Inputs kModifiedImmediate[] = {{NoFlag, 0x00000000},
183 {NoFlag, 0x00000001},
184 {NoFlag, 0x00000002},
185 {NoFlag, 0x00000020},
186 {NoFlag, 0x0000007d},
187 {NoFlag, 0x0000007e},
188 {NoFlag, 0x0000007f},
189 {NoFlag, 0x00007ffd},
190 {NoFlag, 0x00007ffe},
191 {NoFlag, 0x00007fff},
192 {NoFlag, 0x33333333},
193 {NoFlag, 0x55555555},
194 {NoFlag, 0x7ffffffd},
195 {NoFlag, 0x7ffffffe},
196 {NoFlag, 0x7fffffff},
197 {NoFlag, 0x80000000},
198 {NoFlag, 0x80000001},
199 {NoFlag, 0xaaaaaaaa},
200 {NoFlag, 0xcccccccc},
201 {NoFlag, 0xffff8000},
202 {NoFlag, 0xffff8001},
203 {NoFlag, 0xffff8002},
204 {NoFlag, 0xffff8003},
205 {NoFlag, 0xffffff80},
206 {NoFlag, 0xffffff81},
207 {NoFlag, 0xffffff82},
208 {NoFlag, 0xffffff83},
209 {NoFlag, 0xffffffe0},
210 {NoFlag, 0xfffffffd},
211 {NoFlag, 0xfffffffe},
212 {NoFlag, 0xffffffff}};
213
214
215 // A loop will be generated for each element of this array.
216 const TestLoopData kTests[] = {{{eq, r0, 0x000000ab},
217 "eq r0 0x000000ab",
218 "Condition_eq_r0_0x000000ab",
219 ARRAY_SIZE(kCondition),
220 kCondition},
221 {{ne, r0, 0x000000ab},
222 "ne r0 0x000000ab",
223 "Condition_ne_r0_0x000000ab",
224 ARRAY_SIZE(kCondition),
225 kCondition},
226 {{cs, r0, 0x000000ab},
227 "cs r0 0x000000ab",
228 "Condition_cs_r0_0x000000ab",
229 ARRAY_SIZE(kCondition),
230 kCondition},
231 {{cc, r0, 0x000000ab},
232 "cc r0 0x000000ab",
233 "Condition_cc_r0_0x000000ab",
234 ARRAY_SIZE(kCondition),
235 kCondition},
236 {{mi, r0, 0x000000ab},
237 "mi r0 0x000000ab",
238 "Condition_mi_r0_0x000000ab",
239 ARRAY_SIZE(kCondition),
240 kCondition},
241 {{pl, r0, 0x000000ab},
242 "pl r0 0x000000ab",
243 "Condition_pl_r0_0x000000ab",
244 ARRAY_SIZE(kCondition),
245 kCondition},
246 {{vs, r0, 0x000000ab},
247 "vs r0 0x000000ab",
248 "Condition_vs_r0_0x000000ab",
249 ARRAY_SIZE(kCondition),
250 kCondition},
251 {{vc, r0, 0x000000ab},
252 "vc r0 0x000000ab",
253 "Condition_vc_r0_0x000000ab",
254 ARRAY_SIZE(kCondition),
255 kCondition},
256 {{hi, r0, 0x000000ab},
257 "hi r0 0x000000ab",
258 "Condition_hi_r0_0x000000ab",
259 ARRAY_SIZE(kCondition),
260 kCondition},
261 {{ls, r0, 0x000000ab},
262 "ls r0 0x000000ab",
263 "Condition_ls_r0_0x000000ab",
264 ARRAY_SIZE(kCondition),
265 kCondition},
266 {{ge, r0, 0x000000ab},
267 "ge r0 0x000000ab",
268 "Condition_ge_r0_0x000000ab",
269 ARRAY_SIZE(kCondition),
270 kCondition},
271 {{lt, r0, 0x000000ab},
272 "lt r0 0x000000ab",
273 "Condition_lt_r0_0x000000ab",
274 ARRAY_SIZE(kCondition),
275 kCondition},
276 {{gt, r0, 0x000000ab},
277 "gt r0 0x000000ab",
278 "Condition_gt_r0_0x000000ab",
279 ARRAY_SIZE(kCondition),
280 kCondition},
281 {{le, r0, 0x000000ab},
282 "le r0 0x000000ab",
283 "Condition_le_r0_0x000000ab",
284 ARRAY_SIZE(kCondition),
285 kCondition},
286 {{al, r0, 0x000000ab},
287 "al r0 0x000000ab",
288 "Condition_al_r0_0x000000ab",
289 ARRAY_SIZE(kCondition),
290 kCondition},
291 {{al, r0, 0x00000000},
292 "al r0 0x00000000",
293 "ModifiedImmediate_al_r0_0x00000000",
294 ARRAY_SIZE(kModifiedImmediate),
295 kModifiedImmediate},
296 {{al, r0, 0x000000ff},
297 "al r0 0x000000ff",
298 "ModifiedImmediate_al_r0_0x000000ff",
299 ARRAY_SIZE(kModifiedImmediate),
300 kModifiedImmediate},
301 {{al, r0, 0xc000003f},
302 "al r0 0xc000003f",
303 "ModifiedImmediate_al_r0_0xc000003f",
304 ARRAY_SIZE(kModifiedImmediate),
305 kModifiedImmediate},
306 {{al, r0, 0xf000000f},
307 "al r0 0xf000000f",
308 "ModifiedImmediate_al_r0_0xf000000f",
309 ARRAY_SIZE(kModifiedImmediate),
310 kModifiedImmediate},
311 {{al, r0, 0xfc000003},
312 "al r0 0xfc000003",
313 "ModifiedImmediate_al_r0_0xfc000003",
314 ARRAY_SIZE(kModifiedImmediate),
315 kModifiedImmediate},
316 {{al, r0, 0xff000000},
317 "al r0 0xff000000",
318 "ModifiedImmediate_al_r0_0xff000000",
319 ARRAY_SIZE(kModifiedImmediate),
320 kModifiedImmediate},
321 {{al, r0, 0x3fc00000},
322 "al r0 0x3fc00000",
323 "ModifiedImmediate_al_r0_0x3fc00000",
324 ARRAY_SIZE(kModifiedImmediate),
325 kModifiedImmediate},
326 {{al, r0, 0x0ff00000},
327 "al r0 0x0ff00000",
328 "ModifiedImmediate_al_r0_0x0ff00000",
329 ARRAY_SIZE(kModifiedImmediate),
330 kModifiedImmediate},
331 {{al, r0, 0x03fc0000},
332 "al r0 0x03fc0000",
333 "ModifiedImmediate_al_r0_0x03fc0000",
334 ARRAY_SIZE(kModifiedImmediate),
335 kModifiedImmediate},
336 {{al, r0, 0x00ff0000},
337 "al r0 0x00ff0000",
338 "ModifiedImmediate_al_r0_0x00ff0000",
339 ARRAY_SIZE(kModifiedImmediate),
340 kModifiedImmediate},
341 {{al, r0, 0x003fc000},
342 "al r0 0x003fc000",
343 "ModifiedImmediate_al_r0_0x003fc000",
344 ARRAY_SIZE(kModifiedImmediate),
345 kModifiedImmediate},
346 {{al, r0, 0x000ff000},
347 "al r0 0x000ff000",
348 "ModifiedImmediate_al_r0_0x000ff000",
349 ARRAY_SIZE(kModifiedImmediate),
350 kModifiedImmediate},
351 {{al, r0, 0x0003fc00},
352 "al r0 0x0003fc00",
353 "ModifiedImmediate_al_r0_0x0003fc00",
354 ARRAY_SIZE(kModifiedImmediate),
355 kModifiedImmediate},
356 {{al, r0, 0x0000ff00},
357 "al r0 0x0000ff00",
358 "ModifiedImmediate_al_r0_0x0000ff00",
359 ARRAY_SIZE(kModifiedImmediate),
360 kModifiedImmediate},
361 {{al, r0, 0x00003fc0},
362 "al r0 0x00003fc0",
363 "ModifiedImmediate_al_r0_0x00003fc0",
364 ARRAY_SIZE(kModifiedImmediate),
365 kModifiedImmediate},
366 {{al, r0, 0x00000ff0},
367 "al r0 0x00000ff0",
368 "ModifiedImmediate_al_r0_0x00000ff0",
369 ARRAY_SIZE(kModifiedImmediate),
370 kModifiedImmediate},
371 {{al, r0, 0x000003fc},
372 "al r0 0x000003fc",
373 "ModifiedImmediate_al_r0_0x000003fc",
374 ARRAY_SIZE(kModifiedImmediate),
375 kModifiedImmediate},
376 {{al, r0, 0x000000ab},
377 "al r0 0x000000ab",
378 "ModifiedImmediate_al_r0_0x000000ab",
379 ARRAY_SIZE(kModifiedImmediate),
380 kModifiedImmediate},
381 {{al, r0, 0xc000002a},
382 "al r0 0xc000002a",
383 "ModifiedImmediate_al_r0_0xc000002a",
384 ARRAY_SIZE(kModifiedImmediate),
385 kModifiedImmediate},
386 {{al, r0, 0xb000000a},
387 "al r0 0xb000000a",
388 "ModifiedImmediate_al_r0_0xb000000a",
389 ARRAY_SIZE(kModifiedImmediate),
390 kModifiedImmediate},
391 {{al, r0, 0xac000002},
392 "al r0 0xac000002",
393 "ModifiedImmediate_al_r0_0xac000002",
394 ARRAY_SIZE(kModifiedImmediate),
395 kModifiedImmediate},
396 {{al, r0, 0xab000000},
397 "al r0 0xab000000",
398 "ModifiedImmediate_al_r0_0xab000000",
399 ARRAY_SIZE(kModifiedImmediate),
400 kModifiedImmediate},
401 {{al, r0, 0x2ac00000},
402 "al r0 0x2ac00000",
403 "ModifiedImmediate_al_r0_0x2ac00000",
404 ARRAY_SIZE(kModifiedImmediate),
405 kModifiedImmediate},
406 {{al, r0, 0x0ab00000},
407 "al r0 0x0ab00000",
408 "ModifiedImmediate_al_r0_0x0ab00000",
409 ARRAY_SIZE(kModifiedImmediate),
410 kModifiedImmediate},
411 {{al, r0, 0x02ac0000},
412 "al r0 0x02ac0000",
413 "ModifiedImmediate_al_r0_0x02ac0000",
414 ARRAY_SIZE(kModifiedImmediate),
415 kModifiedImmediate},
416 {{al, r0, 0x00ab0000},
417 "al r0 0x00ab0000",
418 "ModifiedImmediate_al_r0_0x00ab0000",
419 ARRAY_SIZE(kModifiedImmediate),
420 kModifiedImmediate},
421 {{al, r0, 0x002ac000},
422 "al r0 0x002ac000",
423 "ModifiedImmediate_al_r0_0x002ac000",
424 ARRAY_SIZE(kModifiedImmediate),
425 kModifiedImmediate},
426 {{al, r0, 0x000ab000},
427 "al r0 0x000ab000",
428 "ModifiedImmediate_al_r0_0x000ab000",
429 ARRAY_SIZE(kModifiedImmediate),
430 kModifiedImmediate},
431 {{al, r0, 0x0002ac00},
432 "al r0 0x0002ac00",
433 "ModifiedImmediate_al_r0_0x0002ac00",
434 ARRAY_SIZE(kModifiedImmediate),
435 kModifiedImmediate},
436 {{al, r0, 0x0000ab00},
437 "al r0 0x0000ab00",
438 "ModifiedImmediate_al_r0_0x0000ab00",
439 ARRAY_SIZE(kModifiedImmediate),
440 kModifiedImmediate},
441 {{al, r0, 0x00002ac0},
442 "al r0 0x00002ac0",
443 "ModifiedImmediate_al_r0_0x00002ac0",
444 ARRAY_SIZE(kModifiedImmediate),
445 kModifiedImmediate},
446 {{al, r0, 0x00000ab0},
447 "al r0 0x00000ab0",
448 "ModifiedImmediate_al_r0_0x00000ab0",
449 ARRAY_SIZE(kModifiedImmediate),
450 kModifiedImmediate},
451 {{al, r0, 0x000002ac},
452 "al r0 0x000002ac",
453 "ModifiedImmediate_al_r0_0x000002ac",
454 ARRAY_SIZE(kModifiedImmediate),
455 kModifiedImmediate}};
456
457 // We record all inputs to the instructions as outputs. This way, we also check
458 // that what shouldn't change didn't change.
459 struct TestResult {
460 size_t output_size;
461 const Inputs* outputs;
462 };
463
464 // These headers each contain an array of `TestResult` with the reference output
465 // values. The reference arrays are names `kReference{mnemonic}`.
466 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-cmn.h"
467 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-cmp.h"
468 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-mov.h"
469 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-movs.h"
470 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-mvn.h"
471 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-mvns.h"
472 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-teq.h"
473 #include "aarch32/traces/simulator-cond-rd-operand-const-a32-tst.h"
474
475
476 // The maximum number of errors to report in detail for each test.
477 const unsigned kErrorReportLimit = 8;
478
479 typedef void (MacroAssembler::*Fn)(Condition cond,
480 Register rd,
481 const Operand& op);
482
TestHelper(Fn instruction,const char * mnemonic,const TestResult reference[])483 void TestHelper(Fn instruction,
484 const char* mnemonic,
485 const TestResult reference[]) {
486 SETUP();
487 masm.UseA32();
488 START();
489
490 // Data to compare to `reference`.
491 TestResult* results[ARRAY_SIZE(kTests)];
492
493 // Test cases for memory bound instructions may allocate a buffer and save its
494 // address in this array.
495 byte* scratch_memory_buffers[ARRAY_SIZE(kTests)];
496
497 // Generate a loop for each element in `kTests`. Each loop tests one specific
498 // instruction.
499 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
500 // Allocate results on the heap for this test.
501 results[i] = new TestResult;
502 results[i]->outputs = new Inputs[kTests[i].input_size];
503 results[i]->output_size = kTests[i].input_size;
504
505 size_t input_stride = sizeof(kTests[i].inputs[0]) * kTests[i].input_size;
506 VIXL_ASSERT(IsUint32(input_stride));
507
508 scratch_memory_buffers[i] = NULL;
509
510 Label loop;
511 UseScratchRegisterScope scratch_registers(&masm);
512 // Include all registers from r0 ro r12.
513 scratch_registers.Include(RegisterList(0x1fff));
514
515 // Values to pass to the macro-assembler.
516 Condition cond = kTests[i].operands.cond;
517 Register rd = kTests[i].operands.rd;
518 uint32_t immediate = kTests[i].operands.immediate;
519 Operand op(immediate);
520 scratch_registers.Exclude(rd);
521
522 // Allocate reserved registers for our own use.
523 Register input_ptr = scratch_registers.Acquire();
524 Register input_end = scratch_registers.Acquire();
525 Register result_ptr = scratch_registers.Acquire();
526
527 // Initialize `input_ptr` to the first element and `input_end` the address
528 // after the array.
529 __ Mov(input_ptr, Operand::From(kTests[i].inputs));
530 __ Add(input_end, input_ptr, static_cast<uint32_t>(input_stride));
531 __ Mov(result_ptr, Operand::From(results[i]->outputs));
532 __ Bind(&loop);
533
534 {
535 UseScratchRegisterScope temp_registers(&masm);
536 Register nzcv_bits = temp_registers.Acquire();
537 Register saved_q_bit = temp_registers.Acquire();
538 // Save the `Q` bit flag.
539 __ Mrs(saved_q_bit, APSR);
540 __ And(saved_q_bit, saved_q_bit, QFlag);
541 // Set the `NZCV` and `Q` flags together.
542 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr)));
543 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit);
544 __ Msr(APSR_nzcvq, nzcv_bits);
545 }
546 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd)));
547
548 (masm.*instruction)(cond, rd, op);
549
550 {
551 UseScratchRegisterScope temp_registers(&masm);
552 Register nzcv_bits = temp_registers.Acquire();
553 __ Mrs(nzcv_bits, APSR);
554 // Only record the NZCV bits.
555 __ And(nzcv_bits, nzcv_bits, NZCVFlag);
556 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr)));
557 }
558 __ Str(rd, MemOperand(result_ptr, offsetof(Inputs, rd)));
559
560 // Advance the result pointer.
561 __ Add(result_ptr, result_ptr, Operand::From(sizeof(kTests[i].inputs[0])));
562 // Loop back until `input_ptr` is lower than `input_base`.
563 __ Add(input_ptr, input_ptr, Operand::From(sizeof(kTests[i].inputs[0])));
564 __ Cmp(input_ptr, input_end);
565 __ B(ne, &loop);
566 }
567
568 END();
569
570 RUN();
571
572 if (Test::generate_test_trace()) {
573 // Print the results.
574 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
575 printf("const Inputs kOutputs_%s_%s[] = {\n",
576 mnemonic,
577 kTests[i].identifier);
578 for (size_t j = 0; j < results[i]->output_size; j++) {
579 printf(" { ");
580 printf("0x%08" PRIx32, results[i]->outputs[j].apsr);
581 printf(", ");
582 printf("0x%08" PRIx32, results[i]->outputs[j].rd);
583 printf(" },\n");
584 }
585 printf("};\n");
586 }
587 printf("const TestResult kReference%s[] = {\n", mnemonic);
588 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
589 printf(" {\n");
590 printf(" ARRAY_SIZE(kOutputs_%s_%s),\n",
591 mnemonic,
592 kTests[i].identifier);
593 printf(" kOutputs_%s_%s,\n", mnemonic, kTests[i].identifier);
594 printf(" },\n");
595 }
596 printf("};\n");
597 } else if (kCheckSimulatorTestResults) {
598 // Check the results.
599 unsigned total_error_count = 0;
600 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
601 bool instruction_has_errors = false;
602 for (size_t j = 0; j < kTests[i].input_size; j++) {
603 uint32_t apsr = results[i]->outputs[j].apsr;
604 uint32_t rd = results[i]->outputs[j].rd;
605 uint32_t apsr_input = kTests[i].inputs[j].apsr;
606 uint32_t rd_input = kTests[i].inputs[j].rd;
607 uint32_t apsr_ref = reference[i].outputs[j].apsr;
608 uint32_t rd_ref = reference[i].outputs[j].rd;
609
610 if (((apsr != apsr_ref) || (rd != rd_ref)) &&
611 (++total_error_count <= kErrorReportLimit)) {
612 // Print the instruction once even if it triggered multiple failures.
613 if (!instruction_has_errors) {
614 printf("Error(s) when testing \"%s %s\":\n",
615 mnemonic,
616 kTests[i].operands_description);
617 instruction_has_errors = true;
618 }
619 // Print subsequent errors.
620 printf(" Input: ");
621 printf("0x%08" PRIx32, apsr_input);
622 printf(", ");
623 printf("0x%08" PRIx32, rd_input);
624 printf("\n");
625 printf(" Expected: ");
626 printf("0x%08" PRIx32, apsr_ref);
627 printf(", ");
628 printf("0x%08" PRIx32, rd_ref);
629 printf("\n");
630 printf(" Found: ");
631 printf("0x%08" PRIx32, apsr);
632 printf(", ");
633 printf("0x%08" PRIx32, rd);
634 printf("\n\n");
635 }
636 }
637 }
638
639 if (total_error_count > kErrorReportLimit) {
640 printf("%u other errors follow.\n",
641 total_error_count - kErrorReportLimit);
642 }
643 VIXL_CHECK(total_error_count == 0);
644 } else {
645 VIXL_WARNING("Assembled the code, but did not run anything.\n");
646 }
647
648 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
649 delete[] results[i]->outputs;
650 delete results[i];
651 delete[] scratch_memory_buffers[i];
652 }
653
654 TEARDOWN();
655 }
656
657 // Instantiate tests for each instruction in the list.
658 // TODO: Remove this limitation by having a sandboxing mechanism.
659 #if defined(VIXL_HOST_POINTER_32)
660 #define TEST(mnemonic) \
661 void Test_##mnemonic() { \
662 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
663 } \
664 Test test_##mnemonic( \
665 "AARCH32_SIMULATOR_COND_RD_OPERAND_CONST_A32_" #mnemonic, \
666 &Test_##mnemonic);
667 #else
668 #define TEST(mnemonic) \
669 void Test_##mnemonic() { \
670 VIXL_WARNING("This test can only run on a 32-bit host.\n"); \
671 USE(TestHelper); \
672 } \
673 Test test_##mnemonic( \
674 "AARCH32_SIMULATOR_COND_RD_OPERAND_CONST_A32_" #mnemonic, \
675 &Test_##mnemonic);
676 #endif
677
678 FOREACH_INSTRUCTION(TEST)
679 #undef TEST
680
681 } // namespace
682 #endif
683
684 } // namespace aarch32
685 } // namespace vixl
686