1 #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric 2 #name: MIPS MIPS32r2 non-fp instructions 3 #as: -32 4 #source: mips32r2.s 5 6 # Check MIPS32 Release 2 (mips32r2) *non-fp* instruction assembly 7 8 .*: +file format .*mips.* 9 10 Disassembly of section .text: 11 0+0000 <[^>]*> 000000c0 ehb 12 0+0004 <[^>]*> 7ca43980 ext \$4,\$5,0x6,0x8 13 0+0008 <[^>]*> 7ca46984 ins \$4,\$5,0x6,0x8 14 0+000c <[^>]*> 0100fc09 jalr.hb \$8 15 0+0010 <[^>]*> 0120a409 jalr.hb \$20,\$9 16 0+0014 <[^>]*> 01000409 jr.hb \$8 17 0+0018 <[^>]*> 7c0a003b rdhwr \$10,\$0 18 0+001c <[^>]*> 7c0b083b rdhwr \$11,\$1 19 0+0020 <[^>]*> 7c0c103b rdhwr \$12,\$2 20 0+0024 <[^>]*> 7c0d183b rdhwr \$13,\$3 21 0+0028 <[^>]*> 7c0e203b rdhwr \$14,\$4 22 0+002c <[^>]*> 7c0f283b rdhwr \$15,\$5 23 0+0030 <[^>]*> 002acf02 ror \$25,\$10,0x1c 24 0+0034 <[^>]*> 002ac902 ror \$25,\$10,0x4 25 0+0038 <[^>]*> 0004c823 negu \$25,\$4 26 0+003c <[^>]*> 032ac846 rorv \$25,\$10,\$25 27 0+0040 <[^>]*> 008ac846 rorv \$25,\$10,\$4 28 0+0044 <[^>]*> 008ac846 rorv \$25,\$10,\$4 29 0+0048 <[^>]*> 7c073c20 seb \$7,\$7 30 0+004c <[^>]*> 7c0a4420 seb \$8,\$10 31 0+0050 <[^>]*> 7c073e20 seh \$7,\$7 32 0+0054 <[^>]*> 7c0a4620 seh \$8,\$10 33 0+0058 <[^>]*> 055f5555 synci 21845\(\$10\) 34 0+005c <[^>]*> 7c0738a0 wsbh \$7,\$7 35 0+0060 <[^>]*> 7c0a40a0 wsbh \$8,\$10 36 0+0064 <[^>]*> 41606000 di 37 0+0068 <[^>]*> 41606000 di 38 0+006c <[^>]*> 416a6000 di \$10 39 0+0070 <[^>]*> 41606020 ei 40 0+0074 <[^>]*> 41606020 ei 41 0+0078 <[^>]*> 416a6020 ei \$10 42 0+007c <[^>]*> 41595000 rdpgpr \$10,\$25 43 0+0080 <[^>]*> 41d95000 wrpgpr \$10,\$25 44 0+0084 <[^>]*> 00000140 pause 45 ... 46