Lines Matching refs:IntRegs
14 (S2_storerbnewgp u16_0Imm:$addr, IntRegs:$Nt)>;
16 (S2_storerhnewgp u16_1Imm:$addr, IntRegs:$Nt)>;
18 (S2_storerinewgp u16_2Imm:$addr, IntRegs:$Nt)>;
20 (S2_storerbgp u16_0Imm:$addr, IntRegs:$Nt)>;
22 (S2_storerhgp u16_1Imm:$addr, IntRegs:$Nt)>;
24 (S2_storerfgp u16_1Imm:$addr, IntRegs:$Nt)>;
26 (S2_storerigp u16_2Imm:$addr, IntRegs:$Nt)>;
31 (L2_loadrbgp IntRegs:$Nt, u16_0Imm:$addr)>;
33 (L2_loadrubgp IntRegs:$Nt, u16_0Imm:$addr)>;
35 (L2_loadrhgp IntRegs:$Nt, u16_1Imm:$addr)>;
37 (L2_loadruhgp IntRegs:$Nt, u16_1Imm:$addr)>;
39 (L2_loadrigp IntRegs:$Nt, u16_2Imm:$addr)>;
45 (S2_storerb_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
48 (S2_storerh_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
51 (S2_storerf_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
54 (S2_storeri_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
57 (S2_storerbnew_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
60 (S2_storerhnew_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
63 (S2_storerinew_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
66 (S4_storeirb_io IntRegs:$Rs, 0, s8Ext:$S8), 0>;
69 (S4_storeirh_io IntRegs:$Rs, 0, s8Ext:$S8), 0>;
72 (S4_storeiri_io IntRegs:$Rs, 0, s8Ext:$S8), 0>;
75 (S2_storerd_io IntRegs:$Rs, 0, DoubleRegs:$Rtt), 0>;
78 (L4_ior_memopb_io IntRegs:$Rs, 0, u5Imm:$U5), 0>;
81 (L4_ior_memoph_io IntRegs:$Rs, 0, u5Imm:$U5), 0>;
84 (L4_ior_memopw_io IntRegs:$Rs, 0, u5Imm:$U5), 0>;
87 (L4_iand_memopb_io IntRegs:$Rs, 0, u5Imm:$U5), 0>;
90 (L4_iand_memoph_io IntRegs:$Rs, 0, u5Imm:$U5), 0>;
93 (L4_iand_memopw_io IntRegs:$Rs, 0, u5Imm:$U5), 0>;
97 (L2_loadrb_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
100 (L2_loadrub_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
103 (L2_loadrh_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
106 (L2_loadruh_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
109 (L2_loadri_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
112 (L2_loadrd_io DoubleRegs:$Rdd, IntRegs:$Rs, 0), 0>;
115 (L2_loadbzw2_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
118 (L2_loadbzw4_io DoubleRegs:$Rdd, IntRegs:$Rs, 0), 0>;
121 (L2_loadbsw2_io IntRegs:$Rd, IntRegs:$Rs, 0), 0>;
124 (L2_loadbsw4_io DoubleRegs:$Rdd, IntRegs:$Rs, 0), 0>;
127 (L2_loadalignb_io DoubleRegs:$Rdd, IntRegs:$Rs, 0), 0>;
130 (L2_loadalignh_io DoubleRegs:$Rdd, IntRegs:$Rs, 0), 0>;
135 (L2_ploadrbt_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
138 (L2_ploadrubt_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
141 (L2_ploadrht_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
144 (L2_ploadruht_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
147 (L2_ploadrit_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
150 (L2_ploadrdt_io DoubleRegs:$Rdd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
155 (S2_pstorerbt_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
158 (S2_pstorerht_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
161 (S2_pstorerft_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
164 (S2_pstorerit_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
167 (S2_pstorerdt_io PredRegs:$Pt, IntRegs:$Rs, 0, DoubleRegs:$Rtt), 0>;
170 (S2_pstorerbnewt_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
173 (S2_pstorerhnewt_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
176 (S2_pstorerinewt_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
179 (S4_pstorerbnewtnew_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
182 (S4_pstorerhnewtnew_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
185 (S4_pstorerinewtnew_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
191 (L2_ploadrbf_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
194 (L2_ploadrubf_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
197 (L2_ploadrhf_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
200 (L2_ploadruhf_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
203 (L2_ploadrif_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
206 (L2_ploadrdf_io DoubleRegs:$Rdd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
211 (S2_pstorerbf_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
214 (S2_pstorerhf_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
217 (S2_pstorerff_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
220 (S2_pstorerif_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
223 (S2_pstorerdf_io PredRegs:$Pt, IntRegs:$Rs, 0, DoubleRegs:$Rtt), 0>;
226 (S2_pstorerbnewf_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
229 (S2_pstorerhnewf_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
232 (S2_pstorerinewf_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
235 (S4_pstorerbnewfnew_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
238 (S4_pstorerhnewfnew_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
241 (S4_pstorerinewfnew_io PredRegs:$Pt, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
244 (S4_storeirbt_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
247 (S4_storeirht_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
250 (S4_storeirit_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
253 (S4_storeirbtnew_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
256 (S4_storeirhtnew_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
259 (S4_storeiritnew_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
262 (S4_storeirbf_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
265 (S4_storeirhf_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
268 (S4_storeirif_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
271 (S4_storeirbfnew_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
274 (S4_storeirhfnew_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
277 (S4_storeirifnew_io PredRegs:$Pt, IntRegs:$Rs, 0, s6Ext:$S6), 0>;
282 (L4_and_memopb_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
286 (L4_or_memopb_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
290 (L4_add_memopb_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
294 (L4_sub_memopb_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
298 (L4_iadd_memopb_io IntRegs:$Rs, 0, u5Imm:$U5), 0>,
302 (L4_isub_memopb_io IntRegs:$Rs, 0, u5Imm:$U5), 0>,
306 (L4_and_memoph_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
310 (L4_or_memoph_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
314 (L4_add_memoph_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
318 (L4_sub_memoph_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
322 (L4_iadd_memoph_io IntRegs:$Rs, 0, u5Imm:$U5), 0>,
326 (L4_isub_memoph_io IntRegs:$Rs, 0, u5Imm:$U5), 0>,
330 (L4_and_memopw_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
334 (L4_or_memopw_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
338 (L4_add_memopw_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
342 (L4_sub_memopw_io IntRegs:$Rs, 0, IntRegs:$Rt), 0>,
346 (L4_iadd_memopw_io IntRegs:$Rs, 0, u5Imm:$U5), 0>,
350 (L4_isub_memopw_io IntRegs:$Rs, 0, u5Imm:$U5), 0>,
357 (S4_pstorerbtnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
360 (S4_pstorerhtnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
363 (S4_pstorerftnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
366 (S4_pstoreritnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
370 PredRegs:$Pv, IntRegs:$Rs, 0, DoubleRegs:$Rtt), 0>;
373 (S4_pstorerbfnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
376 (S4_pstorerhfnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
379 (S4_pstorerffnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
382 (S4_pstorerifnew_io PredRegs:$Pv, IntRegs:$Rs, 0, IntRegs:$Rt), 0>;
386 PredRegs:$Pv, IntRegs:$Rs, 0, DoubleRegs:$Rtt), 0>;
392 (L2_ploadrubtnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
395 (L2_ploadrbtnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
398 (L2_ploadrhtnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
401 (L2_ploadruhtnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
404 (L2_ploadritnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
407 (L2_ploadrdtnew_io DoubleRegs:$Rdd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
410 (L2_ploadrubfnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
413 (L2_ploadrbfnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
416 (L2_ploadrhfnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
419 (L2_ploadruhfnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
422 (L2_ploadrifnew_io IntRegs:$Rd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
425 (L2_ploadrdfnew_io DoubleRegs:$Rdd, PredRegs:$Pt, IntRegs:$Rs, 0), 0>;
428 (Y2_dcfetchbo IntRegs:$Rs, 0), 0>;
432 (C2_cmpgt PredRegs:$Pd, IntRegs:$Rt, IntRegs:$Rs), 0>;
434 (C2_cmpgtu PredRegs:$Pd, IntRegs:$Rt, IntRegs:$Rs), 0>;
438 (A2_subri IntRegs:$Rd, 0, IntRegs:$Rs), 0>;
440 def : InstAlias<"m0 = $Rs", (A2_tfrrcr C6, IntRegs:$Rs)>;
441 def : InstAlias<"$Rd = m0", (A2_tfrcrr IntRegs:$Rd, C6)>;
442 def : InstAlias<"m1 = $Rs", (A2_tfrrcr C7, IntRegs:$Rs)>;
443 def : InstAlias<"$Rd = m1", (A2_tfrcrr IntRegs:$Rd, C7)>;
455 (M2_mpyi IntRegs:$Rd, IntRegs:$Rs, IntRegs:$Rt), 0>;
459 (C2_cmpgt PredRegs:$Pd, IntRegs:$Rt, IntRegs:$Rs), 0>;
461 (C2_cmpgtu PredRegs:$Pd, IntRegs:$Rt, IntRegs:$Rs), 0>;
465 (J2_jumprf PredRegs:$Pu, IntRegs:$Rs)>,
470 (J2_jumprt PredRegs:$Pu, IntRegs:$Rs)>,
490 (J2_jumprt PredRegs:$src1, IntRegs:$src2), 0>;
493 (J2_jumprf PredRegs:$src1, IntRegs:$src2), 0>;
574 (V6_extractw IntRegs:$Rd, VectorRegs:$Vu, IntRegs:$Rs)>,
579 (V6_vshuff VectorRegs:$Vy, VectorRegs:$Vx, IntRegs:$Rt)>,
583 (V6_vL32b_ai VectorRegs:$Vt, IntRegs:$Rs, 0)>,
587 (V6_vL32b_nt_ai VectorRegs:$Vt, IntRegs:$Rs, 0)>,
591 (V6_vS32b_ai IntRegs:$Rs, 0, VectorRegs:$Vt)>,
595 (V6_vS32b_nt_ai IntRegs:$Rs, 0, VectorRegs:$Vt)>,
599 (V6_vS32b_new_ai IntRegs:$Rs, 0, VectorRegs:$Vt)>,
603 (V6_vS32b_nt_new_ai IntRegs:$Rs, 0, VectorRegs:$Vt)>,
607 (V6_vS32b_qpred_ai VecPredRegs:$Qv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
611 (V6_vS32b_nqpred_ai VecPredRegs:$Qv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
615 (V6_vS32b_nt_qpred_ai VecPredRegs:$Qv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
619 (V6_vS32b_nt_nqpred_ai VecPredRegs:$Qv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
623 (V6_vS32b_pred_ai PredRegs:$Pv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
627 (V6_vS32b_npred_ai PredRegs:$Pv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
631 (V6_vS32b_nt_pred_ai PredRegs:$Pv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
635 (V6_vS32b_nt_npred_ai PredRegs:$Pv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
639 (V6_vL32Ub_ai VectorRegs:$Vt, IntRegs:$Rs, 0)>,
643 (V6_vS32Ub_ai IntRegs:$Rs, 0, VectorRegs:$Vt)>,
647 (V6_vS32Ub_pred_ai PredRegs:$Pv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,
651 (V6_vS32Ub_npred_ai PredRegs:$Pv, IntRegs:$Rs, 0, VectorRegs:$Vt)>,