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Searched defs:CCR (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelDAGToDAG.cpp2105 ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { in SelectT2CMOVShiftOp()
2132 ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { in SelectARMCMOVShiftOp()
2152 ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { in SelectT2CMOVImmOp()
2183 ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) { in SelectARMCMOVImmOp()
2219 SDValue CCR = N->getOperand(3); in SelectCMOVOp() local
DARMISelLowering.cpp2772 SDValue CCR = Cond.getOperand(3); in LowerSELECT() local
2796 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT_CC() local
2806 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT_CC() local
2916 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in OptimizeVFPBrcond() local
2946 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBR_CC() local
2966 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBR_CC() local
3282 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerShiftRightParts() local
3316 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerShiftLeftParts() local
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp3564 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerXALUO() local
3595 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT() local
3630 SDValue CCR = Cond.getOperand(3); in LowerSELECT() local
3698 SDValue TrueVal, SDValue ARMcc, SDValue CCR, in getCMOV()
3901 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT_CC() local
3927 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT_CC() local
4039 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in OptimizeVFPBrcond() local
4083 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBR_CC() local
4102 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBR_CC() local
4540 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerShiftRightParts() local
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