/art/compiler/optimizing/ |
D | code_generator_mips.cc | 243 __ Move(entry_address, temp); in EmitNativeCode() local 349 __ Move(entry_address, temp); in EmitNativeCode() local 729 __ Move(temp1_, ref_reg); in EmitNativeCode() local 811 __ Move(tmp, value); in EmitNativeCode() local 927 __ Move(free_reg, index_reg); in EmitNativeCode() local 1179 __ Move(TMP, r2); in EmitSwap() local 1180 __ Move(r2, r1); in EmitSwap() local 1181 __ Move(r1, TMP); in EmitSwap() local 1202 __ Move(TMP, r2); in EmitSwap() local 1209 __ Move(TMP, r2); in EmitSwap() local [all …]
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D | intrinsics_mips.cc | 74 __ Move(V0, trg_reg); in MoveFromReturnRegister() local 1138 __ Move(out_lo, a_lo); in GenMinMax() local 1139 __ Move(out_hi, a_hi); in GenMinMax() local 1176 __ Move(out, a); in GenMinMax() local 1203 __ Move(out_lo, a_lo); in GenMinMax() local 1204 __ Move(out_hi, a_hi); in GenMinMax() local 1242 __ Move(out, a); in GenMinMax() local 1984 __ Move(out, value); // Use 'out' for the 'store conditional' instruction. in GenCas() local 2149 __ Move(TMP, str); in VisitStringEquals() local 2150 __ Move(temp3, arg); in VisitStringEquals() local [all …]
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D | code_generator_mips64.cc | 199 __ Move(entry_address, temp); in EmitNativeCode() local 299 __ Move(entry_address, temp); in EmitNativeCode() local 678 __ Move(temp1_, ref_reg); in EmitNativeCode() local 754 __ Move(tmp, value); in EmitNativeCode() local 867 __ Move(free_reg, index_reg); in EmitNativeCode() local 1326 __ Move(destination.AsRegister<GpuRegister>(), source.AsRegister<GpuRegister>()); in MoveLocation() local 1452 __ Move(TMP, r2); in SwapLocations() local 1453 __ Move(r2, r1); in SwapLocations() local 1454 __ Move(r1, TMP); in SwapLocations() local 1490 __ Move(reg_loc.AsRegister<GpuRegister>(), TMP); in SwapLocations() local [all …]
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D | intrinsics_mips64.cc | 62 __ Move(V0, trg_reg); in MoveFromReturnRegister() local 668 __ Move(out, lhs); in GenMinMax() local 1557 __ Move(out, value); // Use 'out' for the 'store conditional' instruction. in GenCas() local 1727 __ Move(TMP, str); in VisitStringEquals() local 1728 __ Move(temp3, arg); in VisitStringEquals() local 2200 __ Move(count, length.AsRegister<GpuRegister>()); in VisitSystemArrayCopyChar() local
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D | code_generator_x86_64.cc | 1350 void CodeGeneratorX86_64::Move(Location destination, Location source) { in Move() function in art::x86_64::CodeGeneratorX86_64
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/art/compiler/jni/quick/ |
D | jni_compiler.cc | 558 __ Move(mr_return_reg, jni_return_reg, main_jni_conv->SizeOfReturnValue()); in ArtJniCompileMethodInternal() local 707 __ Move(out_reg, in_reg, mr_conv->CurrentParamSize()); in CopyParameter() local 770 __ Move(jni_conv->CurrentParamRegister(), in_reg, jni_conv->CurrentParamSize()); in SetNativeParameter() local
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/art/compiler/utils/ |
D | assembler.h | 123 void Move(size_t newposition, size_t oldposition, size_t size) { in Move() function
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D | assembler_thumb_test.cc | 278 __ Move(scratch_register, method_register, 4); in TEST_F() local
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/art/compiler/utils/x86/ |
D | jni_macro_assembler_x86.cc | 296 void X86JNIMacroAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::x86::X86JNIMacroAssembler
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/art/compiler/utils/arm/ |
D | jni_macro_assembler_arm_vixl.cc | 340 void ArmVIXLJNIMacroAssembler::Move(ManagedRegister m_dst, in Move() function in art::arm::ArmVIXLJNIMacroAssembler
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/art/compiler/utils/x86_64/ |
D | jni_macro_assembler_x86_64.cc | 346 void X86_64JNIMacroAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::x86_64::X86_64JNIMacroAssembler
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/art/compiler/utils/mips/ |
D | assembler_mips_test.cc | 758 TEST_F(AssemblerMIPSTest, Move) { in TEST_F() argument 2510 __ Move(mips::T0, mips::RA); in TEST_F() local 2656 __ Move(mips::T0, mips::T1); in TEST_F() local
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D | assembler_mips.cc | 1804 void MipsAssembler::Move(Register rd, Register rs) { in Move() function in art::mips::MipsAssembler 4837 void MipsAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::mips::MipsAssembler
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/art/compiler/utils/arm64/ |
D | jni_macro_assembler_arm64.cc | 332 void Arm64JNIMacroAssembler::Move(ManagedRegister m_dst, ManagedRegister m_src, size_t size) { in Move() function in art::arm64::Arm64JNIMacroAssembler
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/art/compiler/utils/mips64/ |
D | assembler_mips64.cc | 1187 void Mips64Assembler::Move(GpuRegister rd, GpuRegister rs) { in Move() function in art::mips64::Mips64Assembler 3289 void Mips64Assembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::mips64::Mips64Assembler
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D | assembler_mips64_test.cc | 1381 TEST_F(AssemblerMIPS64Test, Move) { in TEST_F() argument
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