| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 2080 __ Or(dst, lhs, rhs_reg); in HandleBinaryOp() local
2115 __ Or(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local
2116 __ Or(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local
2150 __ Or(dst_low, lhs_low, TMP); in HandleBinaryOp() local
2160 __ Or(dst_high, lhs_high, TMP); in HandleBinaryOp() local
2328 __ Or(dst, dst, TMP); in HandleShift() local
2350 __ Or(dst, dst, TMP); in HandleShift() local
2390 __ Or(dst_high, dst_high, TMP); in HandleShift() local
2395 __ Or(dst_low, dst_low, TMP); in HandleShift() local
2400 __ Or(dst_low, dst_low, TMP); in HandleShift() local
[all …]
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| D | intrinsics_mips.cc | 270 __ Or(out, out, TMP); in GenReverse() local
284 __ Or(out, out, TMP); in GenReverse() local
291 __ Or(out, out, TMP); in GenReverse() local
302 __ Or(out, TMP, out); in GenReverse() local
308 __ Or(out, TMP, out); in GenReverse() local
314 __ Or(out, TMP, out); in GenReverse() local
336 __ Or(TMP, TMP, AT); // Hold in TMP until it's safe in GenReverse() local
343 __ Or(out_lo, out_lo, AT); in GenReverse() local
350 __ Or(out_hi, out_hi, TMP); in GenReverse() local
356 __ Or(out_lo, out_lo, TMP); in GenReverse() local
[all …]
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| D | intrinsics_mips64.cc | 713 __ Or(out, out, AT); in GenMinMax() local
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| D | code_generator_mips64.cc | 1906 __ Or(dst, lhs, rhs_reg); in HandleBinaryOp() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 318 TEST_F(AssemblerMIPSTest, Or) { in TEST_F() argument
2495 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F() local
2641 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F() local
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| D | assembler_mips.cc | 634 void MipsAssembler::Or(Register rd, Register rs, Register rt) { in Or() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1269 TEST_F(AssemblerMIPS64Test, Or) { in TEST_F() argument
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| D | assembler_mips64.cc | 383 void Mips64Assembler::Or(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Or() function in art::mips64::Mips64Assembler
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