| /external/clang/test/CodeGen/ |
| D | BasicInstrs.c | 6 unsigned int udiv(unsigned int X, unsigned int Y) { in udiv() function
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| /external/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 56 udiv r1, r2, r3 label
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| /external/swiftshader/third_party/LLVM/lib/Support/ |
| D | ConstantRange.cpp | 593 ConstantRange::udiv(const ConstantRange &RHS) const { in udiv() function in ConstantRange
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| D | APInt.cpp | 1941 APInt APInt::udiv(const APInt& RHS) const { in udiv() function in APInt
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| /external/llvm/lib/IR/ |
| D | ConstantRange.cpp | 796 ConstantRange::udiv(const ConstantRange &RHS) const { in udiv() function in ConstantRange
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| /external/swiftshader/third_party/LLVM/include/llvm/ADT/ |
| D | APInt.h | 1671 inline APInt udiv(const APInt& LHS, const APInt& RHS) { in udiv() function
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| /external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
| D | APInt.h | 1911 inline APInt udiv(const APInt &LHS, const APInt &RHS) { return LHS.udiv(RHS); } in udiv() function
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| /external/llvm/include/llvm/ADT/ |
| D | APInt.h | 1884 inline APInt udiv(const APInt &LHS, const APInt &RHS) { return LHS.udiv(RHS); } in udiv() function
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| /external/swiftshader/third_party/llvm-subzero/lib/Support/ |
| D | APInt.cpp | 1817 APInt APInt::udiv(const APInt& RHS) const { in udiv() function in APInt
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| /external/llvm/lib/Support/ |
| D | APInt.cpp | 1843 APInt APInt::udiv(const APInt& RHS) const { in udiv() function in APInt
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| /external/swiftshader/src/Shader/ |
| D | ShaderCore.cpp | 688 void ShaderCore::udiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) in udiv() function in sw::ShaderCore
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| /external/v8/src/compiler/arm/ |
| D | code-generator-arm.cc | 930 __ udiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1531 void Assembler::udiv(const Register& rd, in udiv() function in v8::internal::Assembler
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 362 __ udiv(w8, w9, w10); in GenerateTestSequenceBase() local
363 __ udiv(x11, x12, x13); in GenerateTestSequenceBase() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 2255 void AssemblerARM32::udiv(const Operand *OpRd, const Operand *OpRn, in udiv() function in Ice::ARM32::AssemblerARM32
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 906 void Assembler::udiv(const Register& rd, in udiv() function in vixl::aarch64::Assembler
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| /external/v8/src/arm/ |
| D | assembler-arm.cc | 1688 void Assembler::udiv(Register dst, Register src1, Register src2, in udiv() function in v8::internal::Assembler
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3560 void udiv(Register rd, Register rn, Register rm) { udiv(al, rd, rn, rm); } in udiv() function
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| D | assembler-aarch32.cc | 11983 void Assembler::udiv(Condition cond, Register rd, Register rn, Register rm) { in udiv() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 3368 void Disassembler::udiv(Condition cond, Register rd, Register rn, Register rm) { in udiv() function in vixl::aarch32::Disassembler
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