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Searched refs:AsRegisterPairHigh (Results 1 – 24 of 24) sorted by relevance

/art/compiler/utils/mips/
Dmanaged_register_mips.cc31 Register high = AsRegisterPairHigh(); in Overlaps()
82 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh(); in Print()
Dmanaged_register_mips.h123 constexpr Register AsRegisterPairHigh() const { in AsRegisterPairHigh() function
Dassembler_mips.cc4733 StoreToOffset(kStoreWord, src.AsRegisterPairHigh(), in Store()
4859 if (src.AsRegisterPairHigh() != dest.AsRegisterPairLow()) { in Move()
4861 Move(dest.AsRegisterPairHigh(), src.AsRegisterPairHigh()); in Move()
4863 Move(dest.AsRegisterPairHigh(), src.AsRegisterPairHigh()); in Move()
/art/compiler/utils/arm/
Dmanaged_register_arm.cc30 Register high = AsRegisterPairHigh(); in Overlaps()
82 << static_cast<int>(AsRegisterPairHigh()); in Print()
Dmanaged_register_arm.h156 constexpr Register AsRegisterPairHigh() const { in AsRegisterPairHigh() function
163 return vixl::aarch32::Register(AsRegisterPairHigh()); in AsVIXLRegisterPairHigh()
Dmanaged_register_arm_test.cc236 EXPECT_EQ(R1, reg.AsRegisterPairHigh()); in TEST()
248 EXPECT_EQ(R2, reg.AsRegisterPairHigh()); in TEST()
260 EXPECT_EQ(R3, reg.AsRegisterPairHigh()); in TEST()
272 EXPECT_EQ(R5, reg.AsRegisterPairHigh()); in TEST()
284 EXPECT_EQ(R7, reg.AsRegisterPairHigh()); in TEST()
Djni_macro_assembler_arm_vixl.cc371 if (src.AsRegisterPairHigh() != dst.AsRegisterPairLow()) { in Move()
/art/compiler/utils/x86/
Dmanaged_register_x86.cc69 Register high = AsRegisterPairHigh(); in Overlaps()
108 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh(); in Print()
Dmanaged_register_x86_test.cc124 EXPECT_EQ(EDX, reg.AsRegisterPairHigh()); in TEST()
133 EXPECT_EQ(ECX, reg.AsRegisterPairHigh()); in TEST()
142 EXPECT_EQ(EBX, reg.AsRegisterPairHigh()); in TEST()
151 EXPECT_EQ(EDI, reg.AsRegisterPairHigh()); in TEST()
160 EXPECT_EQ(ECX, reg.AsRegisterPairHigh()); in TEST()
169 EXPECT_EQ(EBX, reg.AsRegisterPairHigh()); in TEST()
178 EXPECT_EQ(EDI, reg.AsRegisterPairHigh()); in TEST()
187 EXPECT_EQ(EBX, reg.AsRegisterPairHigh()); in TEST()
196 EXPECT_EQ(EDI, reg.AsRegisterPairHigh()); in TEST()
205 EXPECT_EQ(EDI, reg.AsRegisterPairHigh()); in TEST()
Dmanaged_register_x86.h120 constexpr Register AsRegisterPairHigh() const { in AsRegisterPairHigh() function
Djni_macro_assembler_x86.cc133 __ movl(Address(ESP, FrameOffset(offs.Int32Value()+4)), src.AsRegisterPairHigh()); in Store()
196 __ movl(dest.AsRegisterPairHigh(), Address(ESP, FrameOffset(src.Int32Value()+4))); in Load()
227 __ fs()->movl(dest.AsRegisterPairHigh(), Address::Absolute(ThreadOffset32(src.Int32Value()+4))); in LoadFromThread()
/art/compiler/utils/x86_64/
Dmanaged_register_x86_64.cc64 Register high = AsRegisterPairHigh().AsRegister(); in Overlaps()
103 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh(); in Print()
Dmanaged_register_x86_64_test.cc124 EXPECT_EQ(RDX, reg.AsRegisterPairHigh()); in TEST()
133 EXPECT_EQ(RCX, reg.AsRegisterPairHigh()); in TEST()
142 EXPECT_EQ(RBX, reg.AsRegisterPairHigh()); in TEST()
151 EXPECT_EQ(RDI, reg.AsRegisterPairHigh()); in TEST()
160 EXPECT_EQ(RCX, reg.AsRegisterPairHigh()); in TEST()
169 EXPECT_EQ(RBX, reg.AsRegisterPairHigh()); in TEST()
178 EXPECT_EQ(RDI, reg.AsRegisterPairHigh()); in TEST()
187 EXPECT_EQ(RBX, reg.AsRegisterPairHigh()); in TEST()
196 EXPECT_EQ(RDI, reg.AsRegisterPairHigh()); in TEST()
205 EXPECT_EQ(RDI, reg.AsRegisterPairHigh()); in TEST()
Dmanaged_register_x86_64.h113 constexpr CpuRegister AsRegisterPairHigh() const { in AsRegisterPairHigh() function
Djni_macro_assembler_x86_64.cc170 src.AsRegisterPairHigh()); in Store()
240 __ movq(dest.AsRegisterPairHigh(), Address(CpuRegister(RSP), FrameOffset(src.Int32Value()+4))); in Load()
/art/compiler/optimizing/
Dcode_generator_x86.cc1180 return Location::RegisterPairLocation(pair.AsRegisterPairLow(), pair.AsRegisterPairHigh()); in GetNextLocation()
1260 Location::RegisterLocation(source.AsRegisterPairHigh<Register>()), in Move64()
1261 Location::RegisterLocation(destination.AsRegisterPairHigh<Register>()), in Move64()
1270 __ movd(destination.AsRegisterPairHigh<Register>(), src_reg); in Move64()
1275 __ movl(destination.AsRegisterPairHigh<Register>(), in Move64()
1288 __ movl(Address(ESP, elem_size), source.AsRegisterPairHigh<Register>()); in Move64()
1301 source.AsRegisterPairHigh<Register>()); in Move64()
1345 locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairHigh<Register>())); in AddLocationAsTemp()
1418 Register left_high = left.AsRegisterPairHigh<Register>(); in GenerateLongComparesAndJumps()
1474 Register right_high = right.AsRegisterPairHigh<Register>(); in GenerateLongComparesAndJumps()
[all …]
Dintrinsics_mips.cc166 Register out_hi = locations->Out().AsRegisterPairHigh<Register>(); in MoveFPToInt()
208 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in MoveIntToFP()
319 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenReverse()
321 Register out_hi = locations->Out().AsRegisterPairHigh<Register>(); in GenReverse()
450 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenNumberOfLeadingZeroes()
500 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenNumberOfTrailingZeroes()
668 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenBitCount()
821 Register in_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenAbsInteger()
823 Register out_hi = locations->Out().AsRegisterPairHigh<Register>(); in GenAbsInteger()
1128 Register a_hi = locations->InAt(0).AsRegisterPairHigh<Register>(); in GenMinMax()
[all …]
Dcode_generator_mips.cc1212 r1 = loc1.AsRegisterPairHigh<Register>(); in EmitSwap()
1213 r2 = loc2.AsRegisterPairHigh<Register>(); in EmitSwap()
1225 Register r2_h = loc1.IsRegisterPair() ? loc1.AsRegisterPairHigh<Register>() in EmitSwap()
1226 : loc2.AsRegisterPairHigh<Register>(); in EmitSwap()
1251 Register reg_h = loc1.IsRegisterPair() ? loc1.AsRegisterPairHigh<Register>() in EmitSwap()
1252 : loc2.AsRegisterPairHigh<Register>(); in EmitSwap()
1480 __ Move(destination.AsRegisterPairHigh<Register>(), source.AsRegisterPairHigh<Register>()); in MoveLocation()
1483 Register dst_high = destination.AsRegisterPairHigh<Register>(); in MoveLocation()
1501 Register src_high = source.AsRegisterPairHigh<Register>(); in MoveLocation()
1580 Register r_h = destination.AsRegisterPairHigh<Register>(); in MoveConstant()
[all …]
Dintrinsics_x86.cc209 __ movd(output.AsRegisterPairHigh<Register>(), temp); in MoveFPToInt()
223 __ movd(temp2, input.AsRegisterPairHigh<Register>()); in MoveIntToFP()
319 Register input_hi = input.AsRegisterPairHigh<Register>(); in VisitLongReverseBytes()
322 Register output_hi = output.AsRegisterPairHigh<Register>(); in VisitLongReverseBytes()
458 Register input_hi = input.AsRegisterPairHigh<Register>(); in GenAbsLong()
461 Register output_hi = output.AsRegisterPairHigh<Register>(); in GenAbsLong()
684 Register output_hi = output.AsRegisterPairHigh<Register>(); in GenMinMax()
687 Register op2_hi = op2_loc.AsRegisterPairHigh<Register>(); in GenMinMax()
1868 __ movl(out_loc.AsRegisterPairHigh<Register>(), Address(address, 4)); in GenPeek()
1959 __ movl(Address(address, 4), value_loc.AsRegisterPairHigh<Register>()); in GenPoke()
[all …]
Dcommon_arm.h51 return vixl::aarch32::Register(location.AsRegisterPairHigh<vixl::aarch32::Register>()); in HighRegisterFrom()
Dlocations.h199 T AsRegisterPairHigh() const { in AsRegisterPairHigh() function
Dcode_generator.cc583 DCHECK(is_out || !blocked_core_registers_[location.AsRegisterPairHigh<int>()]); in BlockIfInRegister()
584 blocked_core_registers_[location.AsRegisterPairHigh<int>()] = true; in BlockIfInRegister()
Dcode_generator_vector_x86.cc80 __ movd(tmp, locations->InAt(0).AsRegisterPairHigh<Register>()); in VisitVecReplicateScalar()
Dcode_generator_vector_mips.cc70 __ MoveToFpuHigh(locations->InAt(0).AsRegisterPairHigh<Register>(), FTMP); in VisitVecReplicateScalar()