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Searched refs:shamt5 (Results 1 – 4 of 4) sorted by relevance

/art/compiler/utils/mips64/
Dassembler_mips64.cc1691 void Mips64Assembler::SlliW(VectorRegister wd, VectorRegister ws, int shamt5) { in SlliW() argument
1693 CHECK(IsUint<5>(shamt5)) << shamt5; in SlliW()
1694 EmitMsaBIT(0x0, shamt5 | kMsaDfMWordMask, ws, wd, 0x9); in SlliW()
1715 void Mips64Assembler::SraiW(VectorRegister wd, VectorRegister ws, int shamt5) { in SraiW() argument
1717 CHECK(IsUint<5>(shamt5)) << shamt5; in SraiW()
1718 EmitMsaBIT(0x1, shamt5 | kMsaDfMWordMask, ws, wd, 0x9); in SraiW()
1739 void Mips64Assembler::SrliW(VectorRegister wd, VectorRegister ws, int shamt5) { in SrliW() argument
1741 CHECK(IsUint<5>(shamt5)) << shamt5; in SrliW()
1742 EmitMsaBIT(0x2, shamt5 | kMsaDfMWordMask, ws, wd, 0x9); in SrliW()
Dassembler_mips64.h759 void SlliW(VectorRegister wd, VectorRegister ws, int shamt5);
763 void SraiW(VectorRegister wd, VectorRegister ws, int shamt5);
767 void SrliW(VectorRegister wd, VectorRegister ws, int shamt5);
/art/compiler/utils/mips/
Dassembler_mips.cc2620 void MipsAssembler::SlliW(VectorRegister wd, VectorRegister ws, int shamt5) { in SlliW() argument
2622 CHECK(IsUint<5>(shamt5)) << shamt5; in SlliW()
2623 DsFsmInstrFff(EmitMsaBIT(0x0, shamt5 | kMsaDfMWordMask, ws, wd, 0x9), in SlliW()
2656 void MipsAssembler::SraiW(VectorRegister wd, VectorRegister ws, int shamt5) { in SraiW() argument
2658 CHECK(IsUint<5>(shamt5)) << shamt5; in SraiW()
2659 DsFsmInstrFff(EmitMsaBIT(0x1, shamt5 | kMsaDfMWordMask, ws, wd, 0x9), in SraiW()
2692 void MipsAssembler::SrliW(VectorRegister wd, VectorRegister ws, int shamt5) { in SrliW() argument
2694 CHECK(IsUint<5>(shamt5)) << shamt5; in SrliW()
2695 DsFsmInstrFff(EmitMsaBIT(0x2, shamt5 | kMsaDfMWordMask, ws, wd, 0x9), in SrliW()
Dassembler_mips.h577 void SlliW(VectorRegister wd, VectorRegister ws, int shamt5);
581 void SraiW(VectorRegister wd, VectorRegister ws, int shamt5);
585 void SrliW(VectorRegister wd, VectorRegister ws, int shamt5);