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Searched refs:ARM32 (Results 1 – 25 of 50) sorted by relevance

12

/external/llvm/test/CodeGen/ARM/
Demutls.ll2 ; RUN: -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
11 ; ARM32-LABEL: my_get_xyz:
12 ; ARM32: ldr r0,
13 ; ARM32: ldr r0, [pc, r0]
14 ; ARM32-NEXT: bl my_emutls_get_address
15 ; ARM32-NEXT: ldr r0, [r0]
16 ; ARM32: .long my_emutls_v_xyz(GOT_PREL)
34 ; ARM32-LABEL: f1:
35 ; ARM32: ldr r0,
36 ; ARM32: ldr r0, [pc, r0]
[all …]
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dbool-folding.ll12 ; RUN: --check-prefix=ARM32
30 ; ARM32-LABEL: fold_cmp_br
31 ; ARM32: cmp r0, r1
32 ; ARM32: bge
33 ; ARM32: mov r0, #1
34 ; ARM32: bx lr
35 ; ARM32: mov r0, #2
36 ; ARM32: bx lr
56 ; ARM32-LABEL: fold_cmp_br_intervening_insts
57 ; ARM32: push {{[{].*[}]}}
[all …]
Dfp.cmp.ll13 ; RUN: --check-prefix=ARM32 --check-prefix=ARM32-O2
19 ; RUN: --check-prefix=ARM32 --check-prefix=ARM32-OM1
64 ; ARM32-LABEL: fcmpEq
65 ; ARM32: vcmp.f32
66 ; ARM32: vmrs
67 ; ARM32-OM1: mov [[R0:r[0-9]+]], #0
68 ; ARM32-OM1: moveq [[R0]], #1
69 ; ARM32-O2: bne
70 ; ARM32: bl{{.*}}func
71 ; ARM32: vcmp.f64
[all …]
Dnacl-atomic-intrinsics.ll15 ; RUN: --check-prefix=ARM32
27 ; RUN: --check-prefix=ARM32
88 ; ARM32-LABEL: test_atomic_load_8
89 ; ARM32: ldrb r{{[0-9]+}}, [r{{[0-9]+}}
90 ; ARM32: dmb
108 ; ARM32-LABEL: test_atomic_load_16
109 ; ARM32: ldrh r{{[0-9]+}}, [r{{[0-9]+}}
110 ; ARM32: dmb
126 ; ARM32-LABEL: test_atomic_load_32
127 ; ARM32: ldr r{{[0-9]+}}, [r{{[0-9]+}}
[all …]
Dfp.convert.ll12 ; RUN: --check-prefix=ARM32
17 ; RUN: --check-prefix=ARM32
37 ; ARM32-LABEL: fptrunc
38 ; ARM32: vcvt.f32.f64 {{s[0-9]+}}, {{d[0-9]+}}
52 ; ARM32-LABEL: fpext
53 ; ARM32: vcvt.f64.f32 {{d[0-9]+}}, {{s[0-9]+}}
66 ; ARM32-LABEL: doubleToSigned64
80 ; ARM32-LABEL: floatToSigned64
94 ; ARM32-LABEL: doubleToUnsigned64
108 ; ARM32-LABEL: floatToUnsigned64
[all …]
Dreturn_immediates.ll12 ; RUN: --command FileCheck --check-prefix ARM32 %s
30 ; ARM32-LABEL: ret_8bits_shift_left0
31 ; ARM32-NEXT: mov r0, #255
40 ; ARM32-LABEL: ret_8bits_shift_left1
41 ; ARM32-NEXT: movw r0, #510
50 ; ARM32-LABEL: ret_8bits_shift_left2
51 ; ARM32-NEXT: mov r0, #1020
60 ; ARM32-LABEL: ret_8bits_shift_left4
61 ; ARM32-NEXT: mov r0, #4080
70 ; ARM32-LABEL: ret_8bits_shift_left14
[all …]
Dconvert.ll15 ; RUN: --command FileCheck --check-prefix ARM32 %s
21 ; RUN: --command FileCheck --check-prefix ARM32 %s
64 ; ARM32-LABEL: from_int8
65 ; ARM32: movw {{.*}}i8v
66 ; ARM32: ldrb
67 ; ARM32: sxtb
68 ; ARM32: movw {{.*}}i16v
69 ; ARM32: strh
70 ; ARM32: sxtb
71 ; ARM32: movw {{.*}}i32v
[all …]
D64bit.pnacl.ll18 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-O2 %s
24 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OM1 %s
107 ; ARM32-LABEL: pass64BitArg
108 ; ARM32: str {{.*}}, [sp]
109 ; ARM32: mov r2, #123
110 ; ARM32: bl {{.*}} ignore64BitArgNoInline
111 ; ARM32: str {{.*}}, [sp]
112 ; ARM32: {{mov|ldr}} r0
113 ; ARM32: {{mov|ldr}} r1
114 ; ARM32: mov r2, #123
[all …]
Dint-arg.ll13 ; RUN: --command FileCheck --check-prefix ARM32 %s
24 ; For ARM32, integer arguments can be r0-r3. i64 arguments occupy two
37 ; ARM32-LABEL: test_returning32_arg0
38 ; ARM32-NEXT: bx lr
50 ; ARM32-LABEL: test_returning32_arg1
51 ; ARM32-NEXT: mov r0, r1
52 ; ARM32-NEXT: bx lr
64 ; ARM32-LABEL: test_returning32_arg2
65 ; ARM32-NEXT: mov r0, r2
66 ; ARM32-NEXT: bx lr
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Dvector-bitcast.ll15 ; RUN: | FileCheck --check-prefix=ARM32-O2-O2 --check-prefix=ARM32 %s
17 ; RUN: | FileCheck --check-prefix=ARM32 %s
27 ; ARM32-O2-LABEL: test_bitcast_v16i8_to_v16i8
28 ; ARM32-O2-NEXT: bx
39 ; ARM32-O2-LABEL: test_bitcast_v16i8_to_v8i16
40 ; ARM32-O2-NEXT: bx
51 ; ARM32-O2-LABEL: test_bitcast_v16i8_to_v4i32
52 ; ARM32-O2-NEXT: bx
63 ; ARM32-O2-LABEL: test_bitcast_v16i8_to_v4f32
64 ; ARM32-O2-NEXT: bx
[all …]
Dlarge_stack_offs.ll13 ; RUN: --command FileCheck --check-prefix ARM32 %s
48 ; ARM32-LABEL: lotsOfStack
49 ; ARM32-NOT: mov fp, sp
50 ; ARM32: movw ip, #4{{.*}}
51 ; ARM32-NEXT: sub sp, sp, ip
52 ; ARM32: movw ip, #4248
53 ; ARM32-NEXT: add ip, sp, ip
54 ; ARM32-NOT: movw ip
59 ; ARM32: orr [[REG:r.*]], {{.*}},
61 ; ARM32: str [[REG]], [ip, #-20]
[all …]
Darith.ll11 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM-OPT2 %s
21 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OPTM1 %s
42 ; ARM32-LABEL: Add
43 ; ARM32: add r
54 ; ARM32-LABEL: And
55 ; ARM32: and r
66 ; ARM32-LABEL: Or
67 ; ARM32: orr r
78 ; ARM32-LABEL: Xor
79 ; ARM32: eor r
[all …]
Dtest_i1.ll16 ; RUN: --command FileCheck --check-prefix ARM32 %s
34 ; ARM32-LABEL: testAndTrue
35 ; ARM32: and {{.*}}, #1
49 ; ARM32-LABEL: testOrTrue
50 ; ARM32: orr {{.*}}, #1
64 ; ARM32-LABEL: testXorTrue
65 ; ARM32: eor {{.*}}, #1
78 ; ARM32-LABEL: testTrunc
79 ; ARM32: and {{.*}}, #1
96 ; ARM32-LABEL: testZextI8
[all …]
Dalloc.ll17 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix=ARM-OPT2 %s
24 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix=ARM-OPTM1 %s
59 ; ARM32-LABEL: fixed_416_align_16
60 ; ARM32-OPT2: sub sp, sp, #428
61 ; ARM32-OPTM1: sub sp, sp, #416
62 ; ARM32: bl {{.*}} R_{{.*}} f1
89 ; ARM32-LABEL: fixed_416_align_32
90 ; ARM32-OPT2: sub sp, sp, #424
91 ; ARM32-OPTM1: sub sp, sp, #416
92 ; ARM32: bic sp, sp, #31
[all …]
Dnonsfi.ll10 ; RUN: | FileCheck --check-prefix=ARM32-NONSFI %s
27 ; ARM32-NONSFI-LABEL: testCallRegular
28 ; ARM32-NONSFI: bl {{.*}} R_ARM_CALL {{.*}}testLoadBasic
40 ; ARM32-NONSFI-LABEL: testCallBuiltin
41 ; ARM32-NONSFI: bl {{.*}} R_ARM_CALL {{.*}}fmod
54 ; ARM32 PIC load.
55 ; ARM32-NONSFI-LABEL: testLoadBasic
56 ; ARM32-NONSFI: movw {{.*}} R_ARM_MOVW_PREL_NC _GLOBAL_OFFSET_TABLE_
57 ; ARM32-NONSFI-NEXT: movt {{.*}} R_ARM_MOVT_PREL _GLOBAL_OFFSET_TABLE_
58 ; ARM32-NONSFI: movw [[REG:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC {{.*}}G1
[all …]
Dswitch-opt.ll12 ; RUN: --command FileCheck --check-prefix ARM32 %s
92 ; ARM32-LABEL: testSwitchImm
93 ; ARM32: cmp {{r[0-9]+}}, #1
94 ; ARM32-NEXT: beq
95 ; ARM32-NEXT: b
131 ; ARM32-LABEL: testSwitch64
132 ; ARM32: cmp {{r[0-9]+}}, #123
133 ; ARM32-NEXT: cmpeq {{r[0-9]+}}, #0
134 ; ARM32-NEXT: beq
135 ; ARM32: cmp {{r[0-9]+}}, #234
[all …]
Dfp.arith.ll17 ; RUN: --command FileCheck --check-prefix ARM32 %s
22 ; RUN: --command FileCheck --check-prefix ARM32 %s
43 ; ARM32-LABEL: addFloat
44 ; ARM32: vadd.f32 s{{[0-9]+}}, s
56 ; ARM32-LABEL: addDouble
57 ; ARM32: vadd.f64 d{{[0-9]+}}, d
69 ; ARM32-LABEL: subFloat
70 ; ARM32: vsub.f32 s{{[0-9]+}}, s
82 ; ARM32-LABEL: subDouble
83 ; ARM32: vsub.f64 d{{[0-9]+}}, d
[all …]
Dbitcast.ll9 ; RUN: --check-prefix=ARM32
14 ; RUN: --check-prefix=ARM32
37 ; ARM32-LABEL: cast_f2i
38 ; ARM32: vmov r{{[0-9]+}}, s{{[0-9]+}}
51 ; ARM32-LABEL: cast_i2f
52 ; ARM32: vmov s{{[0-9]+}}, r{{[0-9]+}}
65 ; ARM32-LABEL: cast_d2ll
66 ; ARM32: vmov r{{[0-9]+}}, r{{[0-9]+}}, d{{[0-9]+}}
84 ; ARM32-LABEL: cast_d2ll_const
85 ; ARM32-DAG: movw [[ADDR:r[0-9]+]], #{{.*_MOVW_}}
[all …]
Dselect-opt.ll18 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-O2 %s
24 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OM1 %s
66 ; ARM32-LABEL: testSelect
67 ; ARM32: cmp
68 ; ARM32: bl {{.*}} useInt
69 ; ARM32-Om1: mov {{.*}}, #20
70 ; ARM32-O2: mov [[REG:r[0-9]+]], #20
71 ; ARM32: tst
72 ; ARM32-Om1: movne {{.*}}, #10
73 ; ARM32-O2: movne [[REG]], #10
[all …]
Dnacl-mem-intrinsics.ll17 ; RUN: --command FileCheck --check-prefix ARM32 %s
41 ; ARM32-LABEL: test_memcpy
42 ; ARM32: bl {{.*}} memcpy
58 ; ARM32-LABEL: test_memcpy_long_const_len
59 ; ARM32: bl {{.*}} memcpy
78 ; ARM32-LABEL: test_memcpy_very_small_const_len
79 ; ARM32: bl {{.*}} memcpy
99 ; ARM32-LABEL: test_memcpy_const_len_3
100 ; ARM32: bl {{.*}} memcpy
120 ; ARM32-LABEL: test_memcpy_mid_const_len
[all …]
Dnacl-other-intrinsics.ll35 ; RUN: --command FileCheck --check-prefix ARM32 %s
144 ; ARM32-LABEL: test_setjmplongjmp
145 ; ARM32: bl {{.*}} setjmp
146 ; ARM32: bl {{.*}} longjmp
176 ; ARM32-LABEL: test_sqrt_float
177 ; ARM32: vsqrt.f32
178 ; ARM32: vsqrt.f32
179 ; ARM32: vsqrt.f32
180 ; ARM32: vadd.f32
200 ; ARM32-LABEL: test_sqrt_float_mergeable_load
[all …]
Dfunction_aligned.ll12 ; RUN: --command FileCheck --check-prefix ARM32 %s
25 ; ARM32-LABEL: foo
26 ; ARM32-NEXT: 0: {{.*}} bx lr
27 ; ARM32-NEXT: 4: e7fedef0 udf
28 ; ARM32-NEXT: 8: e7fedef0 udf
29 ; ARM32-NEXT: c: e7fedef0 udf
39 ; ARM32-LABEL: bar
40 ; ARM32-NEXT: 10: {{.*}} bx lr
Dcallindirect.pnacl.ll31 ; RUN: --command FileCheck --check-prefix ARM32 %s
36 ; RUN: --command FileCheck --check-prefix ARM32 %s
100 ; ARM32-LABEL: CallIndirect
101 ; ARM32: blx [[REGISTER:r.*]]
102 ; ARM32: blx [[REGISTER]]
103 ; ARM32: blx [[REGISTER]]
104 ; ARM32: blx [[REGISTER]]
105 ; ARM32: blx [[REGISTER]]
158 ; ARM32-LABEL: CallIndirectGlobal
159 ; ARM32: blx {{r.*}}
[all …]
Dunreachable.ll14 ; RUN: --command FileCheck --check-prefix ARM32 %s
19 ; RUN: --command FileCheck --check-prefix ARM32 %s
53 ; ARM32-LABEL: divide
54 ; ARM32: tst
55 ; ARM32: e7fedef0
56 ; ARM32: bl {{.*}} __divsi3
57 ; ARM32: bx lr
/external/swiftshader/third_party/subzero/src/
DIceInstARM32.cpp26 namespace ARM32 { namespace
121 if (auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>()) in startNextInst()
129 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitUsingTextFixup()
299 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
307 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
551 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
558 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
564 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
571 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
578 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); in emitIAS()
[all …]

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