1; Simple test of the select instruction. The CHECK lines are only 2; checking for basic instruction patterns that should be present 3; regardless of the optimization level, so there are no special OPTM1 4; match lines. 5 6; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 8; RUN: | %if --need=target_X8632 --command FileCheck %s 9; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 10; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ 11; RUN: | %if --need=target_X8632 --command FileCheck %s 12 13; RUN: %if --need=target_ARM32 \ 14; RUN: --command %p2i --filetype=obj \ 15; RUN: --disassemble --target arm32 -i %s --args -O2 \ 16; RUN: -allow-externally-defined-symbols \ 17; RUN: | %if --need=target_ARM32 \ 18; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-O2 %s 19; RUN: %if --need=target_ARM32 \ 20; RUN: --command %p2i --filetype=obj \ 21; RUN: --disassemble --target arm32 -i %s --args -Om1 \ 22; RUN: -allow-externally-defined-symbols \ 23; RUN: | %if --need=target_ARM32 \ 24; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OM1 %s 25 26; RUN: %if --need=target_MIPS32 --need=allow_dump \ 27; RUN: --command %p2i --filetype=asm --assemble \ 28; RUN: --disassemble --target mips32 -i %s --args -Om1 \ 29; RUN: -allow-externally-defined-symbols \ 30; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 31; RUN: --command FileCheck --check-prefix MIPS32 %s 32 33; RUN: %if --need=target_MIPS32 --need=allow_dump \ 34; RUN: --command %p2i --filetype=asm --assemble \ 35; RUN: --disassemble --target mips32 -i %s --args -O2 \ 36; RUN: -allow-externally-defined-symbols \ 37; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 38; RUN: --command FileCheck --check-prefix MIPS32 %s 39 40define internal void @testSelect(i32 %a, i32 %b) { 41entry: 42 %cmp = icmp slt i32 %a, %b 43 %cond = select i1 %cmp, i32 %a, i32 %b 44 tail call void @useInt(i32 %cond) 45 %cmp1 = icmp sgt i32 %a, %b 46 %cond2 = select i1 %cmp1, i32 10, i32 20 47 tail call void @useInt(i32 %cond2) 48 ; Create "fake" uses of %cmp and %cmp1 to prevent O2 bool folding. 49 %d1 = zext i1 %cmp to i32 50 call void @useInt(i32 %d1) 51 %d2 = zext i1 %cmp1 to i32 52 call void @useInt(i32 %d2) 53 ret void 54} 55 56declare void @useInt(i32 %x) 57 58; CHECK-LABEL: testSelect 59; CHECK: cmp 60; CHECK: cmp 61; CHECK: call {{.*}} R_{{.*}} useInt 62; CHECK: cmp 63; CHECK: cmp 64; CHECK: call {{.*}} R_{{.*}} useInt 65; CHECK: ret 66; ARM32-LABEL: testSelect 67; ARM32: cmp 68; ARM32: bl {{.*}} useInt 69; ARM32-Om1: mov {{.*}}, #20 70; ARM32-O2: mov [[REG:r[0-9]+]], #20 71; ARM32: tst 72; ARM32-Om1: movne {{.*}}, #10 73; ARM32-O2: movne [[REG]], #10 74; ARM32: bl {{.*}} useInt 75; ARM32: bl {{.*}} useInt 76; ARM32: bl {{.*}} useInt 77; ARM32: bx lr 78; MIPS32-LABEL: testSelect 79; MIPS32: slt {{.*}} 80; MIPS32: movn {{.*}} 81 82; Check for valid addressing mode in the cmp instruction when the 83; operand is an immediate. 84define internal i32 @testSelectImm32(i32 %a, i32 %b) { 85entry: 86 %cond = select i1 false, i32 %a, i32 %b 87 ret i32 %cond 88} 89; CHECK-LABEL: testSelectImm32 90; CHECK-NOT: cmp 0x{{[0-9a-f]+}}, 91; ARM32-LABEL: testSelectImm32 92; ARM32-NOT: cmp #{{.*}}, 93; MIPS32-LABEL: testSelectImm32 94; MIPS32: movn {{.*}} 95 96; Check for valid addressing mode in the cmp instruction when the 97; operand is an immediate. There is a different x86-32 lowering 98; sequence for 64-bit operands. 99define internal i64 @testSelectImm64(i64 %a, i64 %b) { 100entry: 101 %cond = select i1 true, i64 %a, i64 %b 102 ret i64 %cond 103} 104; CHECK-LABEL: testSelectImm64 105; CHECK-NOT: cmp 0x{{[0-9a-f]+}}, 106; ARM32-LABEL: testSelectImm64 107; ARM32-NOT: cmp #{{.*}}, 108; MIPS32-LABEL: testSelectImm64 109; MIPS32: movn 110; MIPS32: movn 111