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Searched refs:BrCond (Results 1 – 17 of 17) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/CodeGen/
DIfConversion.cpp118 SmallVector<MachineOperand, 4> BrCond; member
430 if (!TII->ReverseBranchCondition(BBI.BrCond)) { in ReverseBranchCondition()
432 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in ReverseBranchCondition()
492 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
627 BBI.BrCond.clear(); in ScanInstructions()
629 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in ScanInstructions()
632 if (BBI.BrCond.size()) { in ScanInstructions()
720 if (BBI.BrCond.size()) { in FeasibilityAnalysis()
726 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
756 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) { in AnalyzeBlock()
[all …]
/external/llvm/lib/CodeGen/
DIfConversion.cpp127 SmallVector<MachineOperand, 4> BrCond; member
455 if (!TII->ReverseBranchCondition(BBI.BrCond)) { in ReverseBranchCondition()
457 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in ReverseBranchCondition()
517 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
656 BBI.BrCond.clear(); in ScanInstructions()
658 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in ScanInstructions()
661 if (BBI.BrCond.size()) { in ScanInstructions()
779 if (BBI.BrCond.size()) { in FeasibilityAnalysis()
785 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
832 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) { in AnalyzeBlock()
[all …]
DMachinePipeliner.cpp166 SmallVector<MachineOperand, 4> BrCond; member
761 LI.BrCond.clear(); in canPipelineLoop()
762 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond)) in canPipelineLoop()
/external/swiftshader/third_party/subzero/src/
DIceConditionCodesX8664.h27 enum BrCond { enum
DIceConditionCodesX8632.h31 enum BrCond { enum
DIceAssemblerX86Base.h58 using BrCond = typename Traits::Cond::BrCond; variable
300 void setcc(BrCond condition, ByteRegister dst);
301 void setcc(BrCond condition, const Address &address);
325 void cmov(Type Ty, BrCond cond, GPRRegister dst, GPRRegister src);
326 void cmov(Type Ty, BrCond cond, GPRRegister dst, const Address &src);
707 void j(BrCond condition, Label *label, bool near = kFarJump);
708 void j(BrCond condition, const ConstantRelocatable *label); // not testable.
DIceTargetLoweringX86Base.h66 using BrCond = typename Traits::Cond::BrCond; variable
563 void _br(BrCond Condition, CfgNode *TargetTrue, CfgNode *TargetFalse) { in _br()
570 void _br(BrCond Condition, CfgNode *Target) { in _br()
573 void _br(BrCond Condition, InstX86Label *Label,
593 void _cmov(Variable *Dest, Operand *Src0, BrCond Condition) { in _cmov()
940 void _setcc(Variable *Dest, BrCond Condition) { in _setcc()
1142 void setccOrConsumer(BrCond Condition, Variable *Dest, const Inst *Consumer);
1154 void lowerSelectMove(Variable *Dest, BrCond Cond, Operand *SrcT,
1156 void lowerSelectIntMove(Variable *Dest, BrCond Cond, Operand *SrcT,
DIceTargetLoweringX8632Traits.h755 Cond::BrCond C1, C2;
766 static const struct TableIcmp32Type { Cond::BrCond Mapping; } TableIcmp32[];
776 Cond::BrCond C1, C2, C3;
781 static Cond::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
939 Cond::BrCond Opposite;
DIceTargetLoweringX8664Traits.h837 Cond::BrCond C1, C2;
848 static const struct TableIcmp32Type { Cond::BrCond Mapping; } TableIcmp32[];
858 Cond::BrCond C1, C2, C3;
863 static Cond::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
1015 Cond::BrCond Opposite;
DIceInstX86Base.h50 using BrCond = typename Traits::Cond::BrCond; member
207 static BrCond getOppositeCondition(BrCond Cond);
380 CfgNode *TargetFalse, BrCond Condition, in create()
397 static InstX86Br *create(Cfg *Func, CfgNode *Target, BrCond Condition, in create()
407 static InstX86Br *create(Cfg *Func, InstX86Label *Label, BrCond Condition, in create()
442 const InstX86Label *Label, BrCond Condition, Mode Kind);
444 BrCond Condition;
2474 BrCond Cond) { in create()
2486 InstX86Cmov(Cfg *Func, Variable *Dest, Operand *Source, BrCond Cond);
2488 BrCond Condition;
[all …]
DIceAssemblerX86BaseImpl.h210 void AssemblerX86Base<TraitsType>::setcc(BrCond condition, ByteRegister dst) { in setcc()
219 void AssemblerX86Base<TraitsType>::setcc(BrCond condition, in setcc()
420 void AssemblerX86Base<TraitsType>::cmov(Type Ty, BrCond cond, GPRRegister dst, in cmov()
434 void AssemblerX86Base<TraitsType>::cmov(Type Ty, BrCond cond, GPRRegister dst, in cmov()
3587 void AssemblerX86Base<TraitsType>::j(BrCond condition, Label *label, in j()
3621 void AssemblerX86Base<TraitsType>::j(BrCond condition, in j()
DIceInstX86BaseImpl.h44 typename InstImpl<TraitsType>::Cond::BrCond
45 InstImpl<TraitsType>::InstX86Base::getOppositeCondition(BrCond Cond) { in getOppositeCondition()
111 BrCond Condition, Mode Kind) in InstX86Br()
193 BrCond Condition) in InstX86Cmov()
366 BrCond Cond) in InstX86Setcc()
DIceTargetLoweringX86BaseImpl.h3813 void TargetX86Base<TraitsType>::setccOrConsumer(BrCond Condition,
6658 const BrCond Cond = Traits::Cond::Br_ne;
6663 void TargetX86Base<TraitsType>::lowerSelectMove(Variable *Dest, BrCond Cond,
6705 void TargetX86Base<TraitsType>::lowerSelectIntMove(Variable *Dest, BrCond Cond,
/external/swiftshader/third_party/LLVM/lib/Transforms/Utils/
DSimplifyCFG.cpp974 Value *BrCond = BI->getCondition(); in SpeculativelyExecuteBB() local
975 if (isa<FCmpInst>(BrCond)) in SpeculativelyExecuteBB()
1071 if (InsertPos == BrCond && !isa<PHINode>(BrCond)) { in SpeculativelyExecuteBB()
1076 for(Value::use_iterator UI = BrCond->use_begin(), UE = BrCond->use_end(); in SpeculativelyExecuteBB()
1096 (Builder.CreateSelect(BrCond, FalseV, HInst, in SpeculativelyExecuteBB()
1100 (Builder.CreateSelect(BrCond, HInst, FalseV, in SpeculativelyExecuteBB()
1438 Value *BrCond = BI->getCondition(); in SimplifyCondBranchToTwoReturns() local
1445 TrueValue = Builder.CreateSelect(BrCond, TrueValue, in SimplifyCondBranchToTwoReturns()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp1594 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase() local
1601 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
1604 DAG.setRoot(BrCond); in visitSwitchCase()
1662 SDValue BrCond = DAG.getNode(ISD::BRCOND, getCurDebugLoc(), in visitJumpTableHeader() local
1667 BrCond = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrCond, in visitJumpTableHeader()
1670 DAG.setRoot(BrCond); in visitJumpTableHeader()
1931 SDValue BrCond = DAG.getNode(ISD::BRCOND, DL, MVT::Other, in handleSmallSwitchRange() local
1936 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, in handleSmallSwitchRange()
1939 DAG.setRoot(BrCond); in handleSmallSwitchRange()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp1927 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase() local
1934 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
1937 DAG.setRoot(BrCond); in visitSwitchCase()
1991 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader() local
1997 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitJumpTableHeader()
2000 DAG.setRoot(BrCond); in visitJumpTableHeader()
2105 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent() local
2110 MVT::Other, BrCond, in visitSPDescriptorParent()
8718 SDValue BrCond = in lowerWorkItem() local
8722 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, in lowerWorkItem()
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/external/llvm/lib/Transforms/Utils/
DSimplifyCFG.cpp1598 Value *BrCond = BI->getCondition(); in SpeculativelyExecuteBB() local
1599 if (isa<FCmpInst>(BrCond)) in SpeculativelyExecuteBB()
1735 BrCond, TrueV, FalseV, TrueV->getName() + "." + FalseV->getName(), BI); in SpeculativelyExecuteBB()
1768 BrCond, TrueV, FalseV, TrueV->getName() + "." + FalseV->getName(), BI); in SpeculativelyExecuteBB()
2119 Value *BrCond = BI->getCondition(); in SimplifyCondBranchToTwoReturns() local
2127 Builder.CreateSelect(BrCond, TrueValue, FalseValue, "retval", BI); in SimplifyCondBranchToTwoReturns()