| /external/llvm/test/tools/llvm-cov/Inputs/ |
| D | test_-b_-f.output | 33 Branches executed:100.00% of 4
39 Branches executed:100.00% of 11
55 Branches executed:100.00% of 15
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| D | test_-b.output | 3 Branches executed:100.00% of 15
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_emulate_branches.c | 52 struct branch_info * Branches; member
64 s->Branches, s->BranchCount, s->BranchReserved, 1); in handle_if()
68 branch = &s->Branches[s->BranchCount++]; in handle_if()
99 branch = &s->Branches[s->BranchCount - 1]; in handle_else()
210 branch = &s->Branches[s->BranchCount - 1]; in handle_endif()
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| D | r500_fragprog_emit.c | 80 struct branch_info * Branches; member
547 s->Branches, s->CurrentBranchDepth, s->BranchesReserved, 1); in emit_flowcontrol()
549 branch = &s->Branches[s->CurrentBranchDepth++]; in emit_flowcontrol()
566 branch = &s->Branches[s->CurrentBranchDepth - 1]; in emit_flowcontrol()
578 branch = &s->Branches[s->CurrentBranchDepth - 1]; in emit_flowcontrol()
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| /external/llvm/lib/IR/ |
| D | GCOV.cpp | 732 ++Coverage.Branches; in printBranchInfo()
741 ++FuncCoverage.Branches; in printBranchInfo()
765 if (Coverage.Branches) { in printCoverage()
767 double(Coverage.BranchesExec) * 100 / Coverage.Branches, in printCoverage()
768 Coverage.Branches); in printCoverage()
770 double(Coverage.BranchesTaken) * 100 / Coverage.Branches, in printCoverage()
771 Coverage.Branches); in printCoverage()
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| /external/clang/lib/CodeGen/ |
| D | CGCleanup.h | 254 llvm::SmallPtrSet<llvm::BasicBlock*, 4> Branches; member
360 bool hasBranches() const { return ExtInfo && !ExtInfo->Branches.empty(); } in hasBranches()
376 if (ExtInfo.Branches.insert(Block).second) in addBranchAfter()
411 return getExtInfo().Branches.insert(Block).second; in addBranchThrough()
417 return (ExtInfo->BranchAfters.size() != ExtInfo->Branches.size()); in hasBranchThroughs()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 274 unsigned Branches = 0, Returns = 0, NewIndirectBranches = 0, in checkBranches() local
286 ++Branches; in checkBranches()
306 if (Branches) // FIXME: should "Defs.count(Hexagon::PC)" be here too? in checkBranches()
314 if (Branches > 1) in checkBranches()
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| /external/llvm/test/MC/Mips/mips32r6/ |
| D | valid.s | 3 # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | valid.s | 3 # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
|
| /external/llvm/include/llvm/Target/ |
| D | GenericOpcodes.td | 35 // Branches.
|
| /external/clang/include/clang/Analysis/Analyses/ |
| D | ThreadSafetyTIL.h | 1428 Branches[0] = T; in Branch()
1429 Branches[1] = E; in Branch()
1433 Branches[0] = T; in Branch()
1434 Branches[1] = E; in Branch()
1440 const BasicBlock *thenBlock() const { return Branches[0]; } in thenBlock()
1441 BasicBlock *thenBlock() { return Branches[0]; } in thenBlock()
1443 const BasicBlock *elseBlock() const { return Branches[1]; } in elseBlock()
1444 BasicBlock *elseBlock() { return Branches[1]; } in elseBlock()
1448 return llvm::makeArrayRef(Branches); in successors()
1454 BasicBlock *Ntb = Vs.reduceBasicBlockRef(Branches[0]); in traverse()
[all …]
|
| /external/llvm/include/llvm/Support/ |
| D | GCOV.h | 384 : Name(Name), LogicalLines(0), LinesExec(0), Branches(0), in GCOVCoverage()
392 uint32_t Branches; member
|
| /external/skia/site/dev/tools/ |
| D | codesearch.md | 31 Code search option |Search |XRef |History |Repos |Branches |Freshness
|
| /external/llvm/lib/Target/X86/ |
| D | X86ScheduleBtVer2.td | 155 // Branches don't produce values, so they have no latency, but they still
|
| D | X86InstrControl.td | 83 // Conditional Branches.
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| D | X86Schedule.td | 61 // Branches don't produce values, so they have no latency, but they still
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMSchedule.td | 79 // Branches.
|
| D | ARMScheduleA9.td | 1987 // Branches don't have a def operand but still consume resources.
|
| D | ARMInstrInfo.td | 421 // Branches targeting ARM-mode must be divisible by 4 if they're a raw
427 // Branches targeting Thumb-mode must be divisible by 2 if they're a raw
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 276 // 7.8.13. Branches
279 // Branches take a single micro-op.
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrControl.td | 50 // Conditional Branches.
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaInstrInfo.td | 864 //Branches, int
874 //Branches, float
1015 //End Branches
|
| /external/llvm/docs/ |
| D | DeveloperPolicy.rst | 429 #. Branches must have mainline merged into them periodically. If the branch
438 #. Branches are not routinely tested by our nightly tester infrastructure.
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| /external/icu/icu4j/demos/src/com/ibm/icu/dev/demo/translit/resources/ |
| D | Transliterator_Kanji_English.txt | 566 卯>'[4th of Earth Branches]';
1004 夘>'[4th of Earth Branches]';
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Instructions.td | 1524 // Custom Inserter for Branches and returns, this eventually will be a
|