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Searched refs:Disp (Results 1 – 25 of 61) sorted by relevance

123

/external/swiftshader/third_party/subzero/src/
DIceInstX8664.cpp94 int32_t Disp = Var->getStackOffset(); in getRematerializableOffset() local
97 Disp += Target->getFrameFixedAllocaOffset(); in getRematerializableOffset()
101 return Disp; in getRematerializableOffset()
113 int32_t Disp = 0; in emit() local
115 Disp += getRematerializableOffset(getBase(), Target); in emit()
125 if (getOffset() == nullptr && Disp == 0) { in emit()
127 } else if (getOffset() == nullptr && Disp != 0) { in emit()
128 Str << Disp; in emit()
130 if (Base == nullptr || CI->getValue() || Disp != 0) in emit()
132 Str << CI->getValue() + Disp; in emit()
[all …]
DIceInstX8632.cpp104 int32_t Disp = Var->getStackOffset(); in getRematerializableOffset() local
107 Disp += Target->getFrameFixedAllocaOffset(); in getRematerializableOffset()
111 return Disp; in getRematerializableOffset()
140 int32_t Disp = 0; in emit() local
142 Disp += getRematerializableOffset(getBase(), Target); in emit()
156 if (getOffset() == nullptr && Disp == 0) { in emit()
158 } else if (getOffset() == nullptr && Disp != 0) { in emit()
159 Str << Disp; in emit()
161 if (getBase() == nullptr || CI->getValue() || Disp != 0) in emit()
163 Str << CI->getValue() + Disp; in emit()
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
153 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
154 return (Base << 12) | Disp; in getBDAddr12Encoding()
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
163 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
164 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
174 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
175 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
183 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp48 int64_t Disp; member
52 : BaseType(RegBase), IndexReg(), Disp(0), isRI(RI) { in SystemZRRIAddressMode()
72 errs() << " Disp " << Disp << '\n'; in dump()
86 SDValue &Base, SDValue &Disp);
88 SDValue &Base, SDValue &Disp,
124 SDValue &Base, SDValue &Disp);
126 SDValue &Base, SDValue &Disp,
128 bool SelectAddrRI(SDValue& Addr, SDValue &Base, SDValue &Disp);
130 SDValue &Base, SDValue &Disp, SDValue &Index);
132 SDValue &Base, SDValue &Disp, SDValue &Index);
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/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp59 int64_t Disp; member
64 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
90 errs() << " Disp " << Disp; in dump()
158 SDValue &Base, SDValue &Disp) const;
160 SDValue &Base, SDValue &Disp, SDValue &Index) const;
166 SDValue &Base, SDValue &Disp) const;
172 SDValue &Base, SDValue &Disp) const;
179 SDValue &Base, SDValue &Disp, SDValue &Index) const;
191 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
192 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DGPRArith.cpp112 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
121 Address(Encoded_GPR_##Base(), Disp, AssemblerFixup::NoFixup)); \ in TEST_F()
124 ASSERT_EQ(test.Base##d() + (Disp), test.Dst##d()) \ in TEST_F()
125 << TestString << " with Disp " << Disp; \ in TEST_F()
129 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
138 Address(Encoded_GPR_##Index(), Traits::TIMES_1, Disp, \ in TEST_F()
141 Address(Encoded_GPR_##Index(), Traits::TIMES_2, Disp, \ in TEST_F()
144 Address(Encoded_GPR_##Index(), Traits::TIMES_4, Disp, \ in TEST_F()
147 Address(Encoded_GPR_##Index(), Traits::TIMES_8, Disp, \ in TEST_F()
151 ASSERT_EQ((test.Index##d() << Traits::TIMES_1) + (Disp), test.Dst0##d()) \ in TEST_F()
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/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp47 int16_t Disp; member
56 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), in MSP430ISelAddressMode()
72 errs() << " Disp " << Disp << '\n'; in dump()
118 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
144 AM.Disp += G->getOffset(); in MatchWrapper()
149 AM.Disp += CP->getOffset(); in MatchWrapper()
186 AM.Disp += Val; in MatchAddress()
229 AM.Disp += Offset; in MatchAddress()
244 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
263 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp46 int16_t Disp; member
55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0), in MSP430ISelAddressMode()
71 errs() << " Disp " << Disp << '\n'; in dump()
123 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
149 AM.Disp += G->getOffset(); in MatchWrapper()
154 AM.Disp += CP->getOffset(); in MatchWrapper()
191 AM.Disp += Val; in MatchAddress()
234 AM.Disp += Offset; in MatchAddress()
249 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
266 Disp = CurDAG->getTargetGlobalAddress(AM.GV, N->getDebugLoc(), in SelectAddr()
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/external/v8/src/s390/
Dassembler-s390.h334 typedef int32_t Disp; typedef
343 explicit MemOperand(Register rx, Disp offset = 0);
344 explicit MemOperand(Register rx, Register rb, Disp offset = 0);
701 inline void name(R1 r1, Register x2, Register b2, Disp d2) { \
725 void bc(Condition cond, Register x2, Register b2, Disp d2) { in bc()
732 inline void name(R1 r1, R2 r2, Register b2, Disp d2) { \
758 void pfd(Condition cond, Register x2, Register b2, Disp d2) { in pfd()
863 void name(Register r1, Register b2, Register x2, Disp d2)
867 void name(Register r1, Register r3, Register b2, Register x2, Disp d2)
872 void name(Register r1, Condition m3, Register b4, Disp d4, \
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Dassembler-s390.cc683 void Assembler::name(Register r1, Register r3, Register b2, Disp d2) { \
691 const Disp d2) { in rs_form()
703 void Assembler::name(Register r1, Condition m3, Register b2, Disp d2) { \
711 const Disp d2) { in rs_form()
739 void Assembler::name(Length l1, Register b2, Disp d2) { \
743 void Assembler::rsl_form(Opcode op, Length l1, Register b2, Disp d2) { in rsl_form()
759 void Assembler::name(Register r1, Register r3, Register b2, Disp d2) { \
767 const Disp d2) { in rsy_form()
786 void Assembler::name(Register r1, Condition m3, Register b2, Disp d2) { \
794 const Disp d2) { in rsy_form()
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/external/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp71 const MachineOperand *Disp) in MemOpKey() argument
72 : Disp(Disp) { in MemOpKey()
89 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
96 const MachineOperand *Disp; member in MemOpKey
119 assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key"); in getHashValue()
120 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
130 switch (Val.Disp->getType()) { in getHashValue()
135 Hash = hash_combine(Hash, Val.Disp->getIndex()); in getHashValue()
138 Hash = hash_combine(Hash, Val.Disp->getSymbolName()); in getHashValue()
141 Hash = hash_combine(Hash, Val.Disp->getGlobal()); in getHashValue()
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DX86InstrBuilder.h50 int Disp; member
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
109 AM.Disp = Op.getImm(); in getAddressFromInstr()
164 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
166 MIB.addImm(AM.Disp); in addFullAddress()
DX86ISelDAGToDAG.cpp63 int32_t Disp; member
75 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), in X86ISelAddressMode()
118 dbgs() << " Disp " << Disp << '\n' in dump()
211 SDValue &Scale, SDValue &Index, SDValue &Disp,
214 SDValue &Scale, SDValue &Index, SDValue &Disp,
218 SDValue &Scale, SDValue &Index, SDValue &Disp,
221 SDValue &Scale, SDValue &Index, SDValue &Disp,
224 SDValue &Scale, SDValue &Index, SDValue &Disp,
228 SDValue &Index, SDValue &Disp,
234 SDValue &Index, SDValue &Disp,
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DGPRArith.cpp124 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
134 Address(GPRRegister::Encoded_Reg_##Base, Disp, \ in TEST_F()
138 ASSERT_EQ(test.Base() + (Disp), test.Dst()) << TestString << " with Disp " \ in TEST_F()
139 << Disp; \ in TEST_F()
143 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
151 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_1, Disp, \ in TEST_F()
154 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_2, Disp, \ in TEST_F()
157 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_4, Disp, \ in TEST_F()
160 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_8, Disp, \ in TEST_F()
164 ASSERT_EQ((test.Index() << Traits::TIMES_1) + (Disp), test.Dst0()) \ in TEST_F()
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DLowLevel.cpp137 #define TestRegAbsoluteAddr(Inst, Dst, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
140 "(" #Inst ", " #Dst ", " #Disp ", " #OpType ", " #ByteCountUntyped \ in TEST_F()
144 Address(Disp, AssemblerFixup::NoFixup)); \ in TEST_F()
151 #define TestRegAddrBase(Inst, Dst, Base, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
154 "(" #Inst ", " #Dst ", " #Base ", " #Disp ", " #OpType \ in TEST_F()
158 Address(GPRRegister::Encoded_Reg_##Base, Disp, \ in TEST_F()
166 #define TestRegAddrScaledIndex(Inst, Dst, Index, Scale, Disp, OpType, \ in TEST_F() argument
170 "(" #Inst ", " #Dst ", " #Index ", " #Scale ", " #Disp ", " #OpType \ in TEST_F()
175 Disp, AssemblerFixup::NoFixup)); \ in TEST_F()
182 #define TestRegAddrBaseScaledIndex(Inst, Dst, Base, Index, Scale, Disp, \ in TEST_F() argument
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp63 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
76 if (Disp.isExpr()) in printSrcMemOperand()
77 O << *Disp.getExpr(); in printSrcMemOperand()
79 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
80 O << Disp.getImm(); in printSrcMemOperand()
/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp65 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
78 if (Disp.isExpr()) in printSrcMemOperand()
79 Disp.getExpr()->print(O, &MAI); in printSrcMemOperand()
81 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
82 O << Disp.getImm(); in printSrcMemOperand()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrBuilder.h51 int Disp; member
56 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
136 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
138 MIB.addImm(AM.Disp); in addFullAddress()
DX86ISelDAGToDAG.cpp65 int32_t Disp; member
76 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), in X86ISelAddressMode()
118 dbgs() << " Disp " << Disp << '\n' in dump()
203 SDValue &Scale, SDValue &Index, SDValue &Disp,
206 SDValue &Scale, SDValue &Index, SDValue &Disp,
209 SDValue &Scale, SDValue &Index, SDValue &Disp,
213 SDValue &Index, SDValue &Disp,
219 SDValue &Index, SDValue &Disp,
232 SDValue &Disp, SDValue &Segment) { in getAddressOperands() argument
241 Disp = CurDAG->getTargetGlobalAddress(AM.GV, DebugLoc(), in getAddressOperands()
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/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp310 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
312 getPointerWidth(), 0, Disp, SrcReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
319 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
321 getPointerWidth(), 0, Disp, SrcReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
329 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
331 getPointerWidth(), 0, Disp, DstReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
337 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
339 getPointerWidth(), 0, Disp, DstReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
455 const MCConstantExpr *Disp = in ComputeMemOperandAddress() local
458 X86Operand::CreateMem(getPointerWidth(), 0, Disp, Reg, 0, 1, SMLoc(), in ComputeMemOperandAddress()
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DX86AsmParser.cpp697 bool ParseIntelDotOperator(const MCExpr *Disp, const MCExpr *&NewDisp);
716 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
997 const MCExpr *Disp = MCConstantExpr::create(0, getContext()); in DefaultMemSIOperand() local
998 return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp, in DefaultMemSIOperand()
1006 const MCExpr *Disp = MCConstantExpr::create(0, getContext()); in DefaultMemDIOperand() local
1007 return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp, in DefaultMemDIOperand()
1160 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1165 if (isa<MCSymbolRefExpr>(Disp) && Info.OpDecl && !Info.IsVarDecl) { in CreateMemForInlineAsm()
1175 return X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size, in CreateMemForInlineAsm()
1182 const MCBinaryExpr *BinOp = dyn_cast<MCBinaryExpr>(Disp); in CreateMemForInlineAsm()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/AsmParser/
DX86AsmParser.cpp134 const MCExpr *Disp; member
173 return Mem.Disp; in getMemDisp()
339 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, in CreateMem()
343 Res->Mem.Disp = Disp; in CreateMem()
351 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp, in CreateMem()
363 Res->Mem.Disp = Disp; in CreateMem()
378 isa<MCConstantExpr>(Op.Mem.Disp) && in isSrcOp()
379 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 && in isSrcOp()
387 isa<MCConstantExpr>(Op.Mem.Disp) && in isDstOp()
388 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 && in isDstOp()
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/external/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp271 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
274 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
281 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
284 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
292 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
295 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
304 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
307 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
316 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
319 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len8Operand()
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/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp62 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in Is16BitMemOperand() local
65 Disp.isImm() && Disp.getImm() < 0x10000) in Is16BitMemOperand()
102 void EmitImmediate(const MCOperand &Disp, SMLoc Loc,
354 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in emitMemModRMByte() local
402 EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind), in emitMemModRMByte()
446 if (Disp.isImm() && isDisp8(Disp.getImm())) { in emitMemModRMByte()
447 if (Disp.getImm() == 0 && BaseRegNo != N86::EBP) { in emitMemModRMByte()
454 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups); in emitMemModRMByte()
465 EmitImmediate(Disp, MI.getLoc(), 2, FK_Data_2, CurByte, OS, Fixups); in emitMemModRMByte()
486 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups); in emitMemModRMByte()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeISelDAGToDAG.cpp86 bool SelectAddrRegImm(SDValue N, SDValue &Disp, SDValue &Base);
148 SelectAddrRegImm(SDValue N, SDValue &Base, SDValue &Disp) { in SelectAddrRegImm() argument
150 if (SelectAddrRegReg(N, Base, Disp)) in SelectAddrRegImm()
156 Disp = CurDAG->getTargetConstant(imm, MVT::i32); in SelectAddrRegImm()
167 Disp = CurDAG->getTargetConstant(Imm, CN->getValueType(0)); in SelectAddrRegImm()
172 Disp = CurDAG->getTargetConstant(0, TM.getTargetLowering()->getPointerTy()); in SelectAddrRegImm()

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