Home
last modified time | relevance | path

Searched refs:LD4 (Results 1 – 25 of 31) sorted by relevance

12

/external/llvm/test/CodeGen/X86/
Dstack-protector-weight.ll19 ; MSVC-SELDAG: mem:Volatile LD4[@__security_cookie]
21 ; MSVC-SELDAG: LD4[FixedStack0]
25 ; MSVC-IR: mem:Volatile LD4[@__security_cookie]
27 ; MSVC-IR: LD4[%StackGuardSlot]
D2010-05-12-FastAllocKills.ll9 ; %reg1025<def> = MUL_Fp80m32 %reg1024, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
20 ; %FP2<def> = MUL_Fp80m32 %FP1, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
/external/libvpx/libvpx/vp8/common/mips/msa/
Dcopymem_msa.c18 LD4(src, src_stride, src0, src1, src2, src3); in copy_8x4_msa()
26 LD4(src, src_stride, src0, src1, src2, src3); in copy_8x8_msa()
31 LD4(src, src_stride, src0, src1, src2, src3); in copy_8x8_msa()
/external/llvm/test/CodeGen/ARM/
Dldrd-memoper.ll8 ; CHECK: Formed {{.*}} t2LDRD{{.*}} mem:LD4[%0] LD4[%0+4]
Dsubreg-remat.ll8 ; %vreg6:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] DPR_VFP2:%vre…
34 ; %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>; mem:LD4[ConstantPo…
/external/llvm/test/CodeGen/PowerPC/
Dunal-altivec.ll43 ; CHECK-DAG: lvx [[LD4:[0-9]+]], [[B4]], [[C15]]
45 ; CHECK-DAG: vperm [[R2:[0-9]+]], [[LD3]], [[LD4]], [[MASK2]]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2010-05-12-FastAllocKills.ll9 ; %reg1025<def> = MUL_Fp80m32 %reg1024, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
20 ; %FP2<def> = MUL_Fp80m32 %FP1, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dsubreg-remat.ll8 ; %vreg6:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] DPR_VFP2:%vre…
34 ; %vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>; mem:LD4[ConstantPo…
/external/llvm/test/CodeGen/AArch64/
Darm64-misched-memdep-bug.ll8 ; CHECK: SU(2): %vreg2<def> = LDRWui %vreg0, 1; mem:LD4[%ptr1_plus1] GPR32:%vreg2 GPR64common:%vr…
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dcttz.ll113 ; CHECK-NEXT: [[LD4:%.*]] = load i32, i32* getelementptr inbounds ([8 x i32], [8 x i32]* @src32,…
121 ; CHECK-NEXT: [[CTTZ4:%.*]] = call i32 @llvm.cttz.i32(i32 [[LD4]], i1 false)
168 ; CHECK-NEXT: [[LD4:%.*]] = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @src1…
176 ; CHECK-NEXT: [[CTTZ4:%.*]] = call i16 @llvm.cttz.i16(i16 [[LD4]], i1 false)
223 ; CHECK-NEXT: [[LD4:%.*]] = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @src1…
239 ; CHECK-NEXT: [[CTTZ4:%.*]] = call i16 @llvm.cttz.i16(i16 [[LD4]], i1 false)
326 ; CHECK-NEXT: [[LD4:%.*]] = load i8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @src8, i8…
342 ; CHECK-NEXT: [[CTTZ4:%.*]] = call i8 @llvm.cttz.i8(i8 [[LD4]], i1 false)
429 ; CHECK-NEXT: [[LD4:%.*]] = load i8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @src8, i8…
461 ; CHECK-NEXT: [[CTTZ4:%.*]] = call i8 @llvm.cttz.i8(i8 [[LD4]], i1 false)
[all …]
Dctlz.ll113 ; CHECK-NEXT: [[LD4:%.*]] = load i32, i32* getelementptr inbounds ([8 x i32], [8 x i32]* @src32,…
121 ; CHECK-NEXT: [[CTLZ4:%.*]] = call i32 @llvm.ctlz.i32(i32 [[LD4]], i1 false)
168 ; CHECK-NEXT: [[LD4:%.*]] = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @src1…
176 ; CHECK-NEXT: [[CTLZ4:%.*]] = call i16 @llvm.ctlz.i16(i16 [[LD4]], i1 false)
223 ; CHECK-NEXT: [[LD4:%.*]] = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @src1…
239 ; CHECK-NEXT: [[CTLZ4:%.*]] = call i16 @llvm.ctlz.i16(i16 [[LD4]], i1 false)
326 ; CHECK-NEXT: [[LD4:%.*]] = load i8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @src8, i8…
342 ; CHECK-NEXT: [[CTLZ4:%.*]] = call i8 @llvm.ctlz.i8(i8 [[LD4]], i1 false)
429 ; CHECK-NEXT: [[LD4:%.*]] = load i8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @src8, i8…
461 ; CHECK-NEXT: [[CTLZ4:%.*]] = call i8 @llvm.ctlz.i8(i8 [[LD4]], i1 false)
[all …]
Dfround.ll110 ; SSE2-NEXT: [[LD4:%.*]] = load double, double* getelementptr inbounds ([8 x double], [8 x doubl…
118 ; SSE2-NEXT: [[CEIL4:%.*]] = call double @llvm.ceil.f64(double [[LD4]])
281 ; SSE2-NEXT: [[LD4:%.*]] = load double, double* getelementptr inbounds ([8 x double], [8 x doubl…
289 ; SSE2-NEXT: [[FLOOR4:%.*]] = call double @llvm.floor.f64(double [[LD4]])
452 ; SSE2-NEXT: [[LD4:%.*]] = load double, double* getelementptr inbounds ([8 x double], [8 x doubl…
460 ; SSE2-NEXT: [[NEARBYINT4:%.*]] = call double @llvm.nearbyint.f64(double [[LD4]])
623 ; SSE2-NEXT: [[LD4:%.*]] = load double, double* getelementptr inbounds ([8 x double], [8 x doubl…
631 ; SSE2-NEXT: [[RINT4:%.*]] = call double @llvm.rint.f64(double [[LD4]])
794 ; SSE2-NEXT: [[LD4:%.*]] = load double, double* getelementptr inbounds ([8 x double], [8 x doubl…
802 ; SSE2-NEXT: [[TRUNC4:%.*]] = call double @llvm.trunc.f64(double [[LD4]])
[all …]
Dbitreverse.ll165 ; SSE-NEXT: [[LD4:%.*]] = load i32, i32* getelementptr inbounds ([8 x i32], [8 x i32]* @src32, i…
173 ; SSE-NEXT: [[BITREVERSE4:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[LD4]])
232 ; SSE-NEXT: [[LD4:%.*]] = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @src16,…
240 ; SSE-NEXT: [[BITREVERSE4:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[LD4]])
299 ; SSE-NEXT: [[LD4:%.*]] = load i16, i16* getelementptr inbounds ([16 x i16], [16 x i16]* @src16,…
315 ; SSE-NEXT: [[BITREVERSE4:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[LD4]])
414 ; SSE-NEXT: [[LD4:%.*]] = load i8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @src8, i8 0…
430 ; SSE-NEXT: [[BITREVERSE4:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[LD4]])
529 ; SSE-NEXT: [[LD4:%.*]] = load i8, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @src8, i8 0…
561 ; SSE-NEXT: [[BITREVERSE4:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[LD4]])
/external/libvpx/libvpx/vpx_dsp/mips/
Dsum_squares_msa.c26 LD4(src, src_stride, src0, src1, src2, src3); in vpx_sum_squares_2d_i16_msa()
/external/webp/src/dsp/
Ddec_mips_dsp_r2.c731 static void LD4(uint8_t* dst) { // Down-Left in LD4() function
980 VP8PredLuma4[6] = LD4; in VP8DspInitMIPSdspR2()
Ddec.c298 static void LD4(uint8_t* dst) { // Down-Left in LD4() function
738 VP8PredLuma4[6] = LD4; in VP8DspInit()
Denc.c392 static void LD4(uint8_t* dst, const uint8_t* top) { in LD4() function
517 LD4(I4LD4 + dst, top); in Intra4Preds()
Denc_mips_dsp_r2.c831 static void LD4(uint8_t* dst, const uint8_t* top) { in LD4() function
1051 LD4(I4LD4 + dst, top); in Intra4Preds()
Ddec_sse2.c912 static void LD4(uint8_t* dst) { // Down-Left in LD4() function
1207 VP8PredLuma4[6] = LD4; in VP8DspInitSSE2()
Denc_msa.c313 static WEBP_INLINE void LD4(uint8_t* dst, const uint8_t* top) { in LD4() function
437 LD4(I4LD4 + dst, top); in Intra4Preds()
Ddec_msa.c751 static void LD4(uint8_t* dst) { // Down-Left in LD4() function
998 VP8PredLuma4[6] = LD4; in VP8DspInitMSA()
Denc_sse2.c747 static WEBP_INLINE void LD4(uint8_t* dst, const uint8_t* top) { // Down-Left in LD4() function
898 LD4(I4LD4 + dst, top); in Intra4Preds()
Ddec_neon.c1371 static void LD4(uint8_t* dst) { // Down-left in LD4() function
1616 VP8PredLuma4[6] = LD4; in VP8DspInitNEON()
/external/libvpx/libvpx/vp8/encoder/mips/msa/
Ddenoising_msa.c559 LD4(sig_start, sig_stride, src0, src1, src2, src3); in vp8_denoiser_filter_uv_msa()
564 LD4(sig_start, sig_stride, src0, src1, src2, src3); in vp8_denoiser_filter_uv_msa()
/external/llvm/lib/Target/AArch64/
DAArch64SchedCyclone.td581 // FCVT Rd, S/D = V6+LD4: 10 cycles

12