Searched refs:LDC1 (Results 1 – 24 of 24) sorted by relevance
| /external/llvm/test/CodeGen/Mips/ |
| D | mno-ldc1-sdc1.ll | 3 ; RUN: FileCheck %s -check-prefixes=ALL,32R1-LDC1
7 ; RUN: FileCheck %s -check-prefixes=ALL,32R6-LDC1
117 ; 32R1-LDC1: ldc1 $f0, 0(${{[0-9]+}})
121 ; 32R6-LDC1: ldc1 $f0, 0(${{[0-9]+}})
202 ; 32R1-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}})
206 ; 32R6-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}})
257 ; 32R1-LDC1: ldc1 $f0, 0(${{[0-9]+}})
262 ; 32R6-LDC1: ldc1 $f0, 0(${{[0-9]+}})
305 ; 32R1-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}})
310 ; 32R6-LDC1: sdc1 $f{{[0-9]+}}, 0(${{[0-9]+}})
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 55 (Opc == Mips::LDC1) || (Opc == Mips::LDC164) || in isLoadFromStackSlot()
207 Opc = Mips::LDC1; in loadRegFromStackSlot()
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| D | MipsInstrFPU.td | 208 def LDC1 : FPLoad<0x35, "ldc1", load, AFGR64, mem>;
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| /external/valgrind/none/tests/mips32/ |
| D | vfp.stdout.exp-mips32-BE | 1 LDC1
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| D | vfp.stdout.exp-mips32-LE | 1 LDC1
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| D | vfp.stdout.exp-mips32r2-BE | 1 LDC1
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| D | vfp.stdout.exp-mips32r2-LE | 1 LDC1
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| D | vfp.stdout.exp-mips32r2-fpu_64-LE | 1 LDC1
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| D | vfp.stdout.exp-mips32r2-fpu_64-BE | 1 LDC1
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 218 case Mips::LDC1: in isBasePlusOffsetMemoryAccess()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 387 LDC1 = ((6U << 3) + 5) << kOpcodeShift, enumerator
918 OpcodeToBitNumber(LWC1) | OpcodeToBitNumber(LDC1) |
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| D | disasm-mips.cc | 1648 case LDC1: in DecodeTypeImmediate()
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| D | simulator-mips.cc | 4526 case LDC1: in DecodeTypeImmediate()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 367 LDC1 = ((6U << 3) + 5) << kOpcodeShift, enumerator
953 OpcodeToBitNumber(LWC1) | OpcodeToBitNumber(LDC1) |
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| D | disasm-mips64.cc | 1865 case LDC1: in DecodeTypeImmediate()
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| D | assembler-mips64.cc | 2612 GenInstrImmediate(LDC1, src.rm(), fd, src.offset_); in ldc1()
2615 GenInstrImmediate(LDC1, at, fd, off16); in ldc1()
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| D | simulator-mips64.cc | 4787 case LDC1: in DecodeTypeImmediate()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 46 (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) { in isLoadFromStackSlot()
280 Opc = Mips::LDC1; in loadRegFromStack()
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| D | MipsInstrFPU.td | 420 def LDC1 : MMRel, StdMMR6Rel, LW_FT<"ldc1", AFGR64Opnd, mem_simm16, II_LDC1,
653 def : LoadRegImmPat<LDC1, f64, load>, FGR_32;
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| D | MipsFastISel.cpp | 750 Opc = Mips::LDC1; in emitLoad()
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| /external/llvm/test/MC/Mips/ |
| D | target-soft-float.s | 271 # FIXME: LDC1 is correctly rejected but the wrong error message is emitted.
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| D | mips-expansions.s | 16 # LW/SW and LDC1/SDC1 of symbol address, done by MipsAsmParser::expandMemInst():
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| /external/valgrind/none/tests/mips64/ |
| D | fpu_load_store.stdout.exp-BE | 1 --- LDC1 ---
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| D | fpu_load_store.stdout.exp-LE | 1 --- LDC1 ---
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