| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 880 EVT LoadedVT = LD->getMemoryVT(); in Select() local
894 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()
895 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
906 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()
907 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 245 EVT LoadedVT = LD->getMemoryVT(); in SelectIndexedLoad() local
252 bool IsValidInc = HII->isValidAutoIncImm(LoadedVT, Inc); in SelectIndexedLoad()
254 assert(LoadedVT.isSimple()); in SelectIndexedLoad()
255 switch (LoadedVT.getSimpleVT().SimpleTy) { in SelectIndexedLoad()
325 assert(LoadedVT.getSizeInBits() <= 32); in SelectIndexedLoad()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 3250 EVT LoadedVT = LD->getMemoryVT(); in expandUnalignedLoad() local
3253 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), LoadedVT.getSizeInBits()); in expandUnalignedLoad()
3254 if (isTypeLegal(intVT) && isTypeLegal(LoadedVT)) { in expandUnalignedLoad()
3265 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in expandUnalignedLoad()
3266 if (LoadedVT != VT) in expandUnalignedLoad()
3276 unsigned LoadedBytes = LoadedVT.getSizeInBits() / 8; in expandUnalignedLoad()
3281 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT); in expandUnalignedLoad()
3334 MachinePointerInfo(), LoadedVT, false,false, false, in expandUnalignedLoad()
3341 assert(LoadedVT.isInteger() && !LoadedVT.isVector() && in expandUnalignedLoad()
3346 unsigned NumBits = LoadedVT.getSizeInBits(); in expandUnalignedLoad()
|
| D | DAGCombiner.cpp | 441 EVT LoadResultTy, EVT &ExtVT, EVT &LoadedVT,
3009 EVT LoadResultTy, EVT &ExtVT, EVT &LoadedVT, in isAndLoadExtLoad() argument
3017 LoadedVT = LoadN->getMemoryVT(); in isAndLoadExtLoad()
3019 if (ExtVT == LoadedVT && in isAndLoadExtLoad()
3034 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
3244 EVT ExtVT, LoadedVT; in visitAND() local
3245 if (isAndLoadExtLoad(N1C, LN0, LoadResultTy, ExtVT, LoadedVT, in visitAND()
3265 unsigned LVTStoreBytes = LoadedVT.getStoreSize(); in visitAND()
6442 EVT ExtVT, LoadedVT; in visitZERO_EXTEND() local
6443 if (isAndLoadExtLoad(AndC, LN0, LoadResultTy, ExtVT, LoadedVT, in visitZERO_EXTEND()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2505 EVT LoadedVT = LD->getMemoryVT(); in Select() local
2519 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()
2520 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
2531 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()
2532 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
2556 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()
2557 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
2570 assert((!isSExt || LoadedVT == MVT::i16 || LoadedVT == MVT::i32) && in Select()
2572 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1335 EVT LoadedVT = LD->getMemoryVT(); in SelectARMIndexedLoad() local
1340 if (LoadedVT == MVT::i32 && isPre && in SelectARMIndexedLoad()
1344 } else if (LoadedVT == MVT::i32 && !isPre && in SelectARMIndexedLoad()
1348 } else if (LoadedVT == MVT::i32 && in SelectARMIndexedLoad()
1353 } else if (LoadedVT == MVT::i16 && in SelectARMIndexedLoad()
1359 } else if (LoadedVT == MVT::i8 || LoadedVT == MVT::i1) { in SelectARMIndexedLoad()
1408 EVT LoadedVT = LD->getMemoryVT(); in SelectT2IndexedLoad() local
1415 switch (LoadedVT.getSimpleVT().SimpleTy) { in SelectT2IndexedLoad()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 501 EVT LoadedVT = LD->getMemoryVT(); in ExpandUnalignedLoad() local
504 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), LoadedVT.getSizeInBits()); in ExpandUnalignedLoad()
511 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in ExpandUnalignedLoad()
512 if (VT.isFloatingPoint() && LoadedVT != VT) in ExpandUnalignedLoad()
522 unsigned LoadedBytes = LoadedVT.getSizeInBits() / 8; in ExpandUnalignedLoad()
527 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT); in ExpandUnalignedLoad()
572 MachinePointerInfo(), LoadedVT, false, false, 0); in ExpandUnalignedLoad()
578 assert(LoadedVT.isInteger() && !LoadedVT.isVector() && in ExpandUnalignedLoad()
583 unsigned NumBits = LoadedVT.getSizeInBits(); in ExpandUnalignedLoad()
|
| D | DAGCombiner.cpp | 2431 EVT LoadedVT = LN0->getMemoryVT(); in visitAND() local
2433 if (ExtVT == LoadedVT && in visitAND()
2451 if (!LN0->isVolatile() && LoadedVT.bitsGT(ExtVT) && ExtVT.isRound() && in visitAND()
2462 unsigned LVTStoreBytes = LoadedVT.getStoreSize(); in visitAND()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1477 EVT LoadedVT = LD->getMemoryVT(); in tryARMIndexedLoad() local
1482 if (LoadedVT == MVT::i32 && isPre && in tryARMIndexedLoad()
1486 } else if (LoadedVT == MVT::i32 && !isPre && in tryARMIndexedLoad()
1490 } else if (LoadedVT == MVT::i32 && in tryARMIndexedLoad()
1495 } else if (LoadedVT == MVT::i16 && in tryARMIndexedLoad()
1501 } else if (LoadedVT == MVT::i8 || LoadedVT == MVT::i1) { in tryARMIndexedLoad()
1552 EVT LoadedVT = LD->getMemoryVT(); in tryT2IndexedLoad() local
1559 switch (LoadedVT.getSimpleVT().SimpleTy) { in tryT2IndexedLoad()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 678 EVT LoadedVT = LD->getMemoryVT(); in tryLoad() local
685 if (!LoadedVT.isSimple()) in tryLoad()
704 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoad()
923 EVT LoadedVT = MemSD->getMemoryVT(); in tryLoadVector() local
925 if (!LoadedVT.isSimple()) in tryLoadVector()
944 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoadVector()
|