| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenInstrInfo.inc | 3921 static const MCOperandInfo OperandInfo2[] = { { -1, 0, 0, MCOI::OPERAND_IMMEDIATE }, };
3922 …dInfo OperandInfo3[] = { { -1, 0, 0, MCOI::OPERAND_UNKNOWN }, { -1, 0, 0, MCOI::OPERAND_UNKNOWN },…
3923 …, MCOI::OPERAND_UNKNOWN }, { -1, 0, ((0 << 16) | (1 << MCOI::TIED_TO)), MCOI::OPERAND_UNKNOWN }, {…
3924 static const MCOperandInfo OperandInfo5[] = { { -1, 0, 0, MCOI::OPERAND_UNKNOWN }, };
3925 …[] = { { -1, 0, 0, MCOI::OPERAND_UNKNOWN }, { -1, 0, 0, MCOI::OPERAND_UNKNOWN }, { -1, 0, 0, MCOI:…
3926 static const MCOperandInfo OperandInfo7[] = { { -1, 0, 0, MCOI::OPERAND_UNKNOWN }, { -1, 0, 0, MCOI…
3927 …randInfo8[] = { { X86::RFP32RegClassID, 0, 0, MCOI::OPERAND_REGISTER }, { X86::RFP32RegClassID, 0,…
3928 …randInfo9[] = { { X86::RFP64RegClassID, 0, 0, MCOI::OPERAND_REGISTER }, { X86::RFP64RegClassID, 0,…
3929 …andInfo10[] = { { X86::RFP80RegClassID, 0, 0, MCOI::OPERAND_REGISTER }, { X86::RFP80RegClassID, 0,…
3930 …MCOI::OPERAND_REGISTER }, { 0, 0|(1<<MCOI::LookupPtrRegClass), 0, MCOI::OPERAND_MEMORY }, { -1, 0,…
[all …]
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| D | X86CodeEmitter.cpp | 162 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1; in determineREX()
719 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) != -1) in emitInstruction()
721 else if (NumOps > 2 && Desc->getOperandConstraint(NumOps-1,MCOI::TIED_TO)== 0) in emitInstruction()
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCInstrDesc.h | 26 namespace MCOI {
71 MCOI::OperandType OperandType;
76 bool isLookupPtrRegClass() const {return Flags&(1 <<MCOI::LookupPtrRegClass);} in isLookupPtrRegClass()
80 bool isPredicate() const { return Flags & (1 << MCOI::Predicate); } in isPredicate()
84 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); } in isOptionalDef()
150 MCOI::OperandConstraint Constraint) const { in getOperandConstraint()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 31 namespace MCOI {
77 return Flags & (1 << MCOI::LookupPtrRegClass); in isLookupPtrRegClass()
82 bool isPredicate() const { return Flags & (1 << MCOI::Predicate); } in isPredicate()
85 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); } in isOptionalDef()
163 MCOI::OperandConstraint Constraint) const { in getOperandConstraint()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 633 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
635 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
636 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) in getOperandBias()
640 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
641 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) in getOperandBias()
645 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0) in getOperandBias()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCTargetDesc.cpp | 131 case MCOI::OPERAND_UNKNOWN: in evaluateBranch()
132 case MCOI::OPERAND_IMMEDIATE: in evaluateBranch()
136 case MCOI::OPERAND_PCREL: in evaluateBranch()
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| /external/llvm/lib/Target/WebAssembly/Disassembler/ |
| D | WebAssemblyDisassembler.cpp | 95 case MCOI::OPERAND_IMMEDIATE: in getInstruction()
105 case MCOI::OPERAND_REGISTER: { in getInstruction()
|
| /external/swiftshader/third_party/LLVM/lib/MC/ |
| D | MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) in evaluateBranch()
|
| /external/llvm/lib/MC/ |
| D | MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) in evaluateBranch()
|
| /external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| D | WebAssemblyMCTargetDesc.h | 46 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
|
| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCTargetDesc.cpp | 92 MCOI::OPERAND_PCREL) { in evaluateBranch()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 1062 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitDataProcessingInstruction()
1142 if (!Skipped && MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitLoadStoreInstruction()
1213 if (!Skipped && MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitMiscLoadStoreInstruction()
1604 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitVFPArithInstruction()
1876 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitNEON2RegInstruction()
1891 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitNEON3RegInstruction()
1894 if (MCID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in emitNEON3RegInstruction()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | MachineInstr.cpp | 669 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) in addOperand()
1029 MCID.getOperandConstraint(i, MCOI::TIED_TO) == (int)DefOpIdx) { in isRegTiedToUseOperand()
1081 int DefIdx = MCID.getOperandConstraint(UseOpIdx, MCOI::TIED_TO); in isRegTiedToDefOperand()
1446 const MCOperandInfo &MCOI = getDesc().OpInfo[i]; in print() local
1447 if (MCOI.isPredicate()) in print()
1449 if (MCOI.isOptionalDef()) in print()
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| D | TargetInstrInfoImpl.cpp | 85 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstruction()
89 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstruction()
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| D | MachineVerifier.cpp | 595 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; in visitMachineOperand() local
610 if (MO->isDef() && !MCOI.isOptionalDef()) in visitMachineOperand()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIDefines.h | 52 OPERAND_REG_IMM32 = MCOI::OPERAND_FIRST_TARGET,
|
| D | SIInstrInfo.h | 420 assert(OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE); in getOpSize()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 203 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL) in evaluateBranch()
|
| /external/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 897 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; in visitMachineOperand() local
900 else if (!MO->isDef() && !MCOI.isOptionalDef()) in visitMachineOperand()
905 const MCOperandInfo &MCOI = MCID.OpInfo[MONum]; in visitMachineOperand() local
910 if (MO->isDef() && !MCOI.isOptionalDef()) in visitMachineOperand()
916 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
952 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO)) in visitMachineOperand()
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| D | MachineInstr.cpp | 849 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand()
854 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) in addOperand()
1799 const MCOperandInfo &MCOI = getDesc().OpInfo[i]; in print() local
1800 if (MCOI.isPredicate()) in print()
1802 if (MCOI.isOptionalDef()) in print()
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| D | TargetInstrInfo.cpp | 158 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
163 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 634 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1; in DetermineREXPrefix()
852 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1) in EncodeInstruction()
854 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps-1, MCOI::TIED_TO)== 0) in EncodeInstruction()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 68 if (MI.getDesc().getOperandConstraint(0, MCOI::TIED_TO) && in tieOpsIfNeeded()
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 258 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL) in evaluateBranch()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 254 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
|