Searched refs:NumSubElts (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | InterleavedAccessPass.cpp | 175 unsigned NumSubElts = NumElts / Factor; in isReInterleaveMask() local
176 if (!isPowerOf2_32(NumSubElts)) in isReInterleaveMask()
185 (i % Factor) * NumSubElts + i / Factor) in isReInterleaveMask()
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| /external/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 567 unsigned NumSubElts = NumElts / Factor; in getInterleavedMemoryOpCost() local
568 VectorType *SubVT = VectorType::get(VT->getElementType(), NumSubElts); in getInterleavedMemoryOpCost()
611 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt) in getInterleavedMemoryOpCost()
637 for (unsigned i = 0; i < NumSubElts; i++) in getInterleavedMemoryOpCost()
643 for (unsigned i = 0; i < NumSubElts; i++) in getInterleavedMemoryOpCost()
659 for (unsigned i = 0; i < NumSubElts; i++) in getInterleavedMemoryOpCost()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCalls.cpp | 282 unsigned NumSubElts = 64 / BitWidth; in simplifyX86immShift() local
285 for (unsigned i = 0; i != NumSubElts; ++i) { in simplifyX86immShift()
286 unsigned SubEltIdx = (NumSubElts - 1) - i; in simplifyX86immShift()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7188 unsigned NumSubElts = VecTy->getVectorNumElements() / Factor; in lowerInterleavedStore() local
7190 VectorType *SubVecTy = VectorType::get(EltTy, NumSubElts); in lowerInterleavedStore()
7215 SubVecTy = VectorType::get(IntTy, NumSubElts); in lowerInterleavedStore()
7231 Op0, Op1, getSequentialMask(Builder, NumSubElts * i, NumSubElts))); in lowerInterleavedStore()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 12674 unsigned NumSubElts = VecTy->getVectorNumElements() / Factor; in lowerInterleavedStore() local
12676 VectorType *SubVecTy = VectorType::get(EltTy, NumSubElts); in lowerInterleavedStore()
12703 SubVecTy = VectorType::get(IntTy, NumSubElts); in lowerInterleavedStore()
12721 Op0, Op1, getSequentialMask(Builder, NumSubElts * i, NumSubElts))); in lowerInterleavedStore()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 13869 int NumSubElts = NumElts * Split; in XformToShuffleWithZero() local
13873 for (int i = 0; i != NumSubElts; ++i) { in XformToShuffleWithZero()
13903 Indices.push_back(i + NumSubElts); in XformToShuffleWithZero()
13910 EVT ClearVT = EVT::getVectorVT(*DAG.getContext(), ClearSVT, NumSubElts); in XformToShuffleWithZero()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 30143 unsigned NumSubElts = 128 / SVT.getSizeInBits(); in combineToExtendVectorInReg() local
30144 EVT SubVT = EVT::getVectorVT(*DAG.getContext(), SVT, NumSubElts); in combineToExtendVectorInReg()
30145 EVT InSubVT = EVT::getVectorVT(*DAG.getContext(), InSVT, NumSubElts); in combineToExtendVectorInReg()
30148 for (unsigned i = 0, Offset = 0; i != NumVecs; ++i, Offset += NumSubElts) { in combineToExtendVectorInReg()
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