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Searched refs:OutputRegister (Results 1 – 16 of 16) sorted by relevance

/external/v8/src/compiler/mips64/
Dcode-generator-mips64.cc432 auto result = i.OutputRegister(); \
545 __ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
780 __ mov(i.OutputRegister(), sp); in AssembleArchInstruction()
783 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
787 __ ld(i.OutputRegister(), MemOperand(fp, 0)); in AssembleArchInstruction()
789 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
793 __ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction()
816 __ Daddu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp, in AssembleArchInstruction()
886 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
889 __ Daddu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
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/external/v8/src/compiler/s390/
Dcode-generator-s390.cc346 if (doZeroExt) masm->LoadlW(i.OutputRegister(), i.OutputRegister()); \
352 CHECK(i.OutputRegister().is(i.InputRegister(0))); in AssembleBinOp()
360 (masm->*rm_instr)(i.OutputRegister(), operand); in AssembleBinOp()
362 (masm->*rr_instr)(i.OutputRegister(), i.InputRegister(1)); in AssembleBinOp()
364 (masm->*ri_instr)(i.OutputRegister(), i.InputImmediate(1)); in AssembleBinOp()
366 (masm->*rm_instr)(i.OutputRegister(), i.InputStackSlot32(1)); in AssembleBinOp()
379 CHECK(i.OutputRegister().is(i.InputRegister(0))); in AssembleBinOp()
384 (masm->*rm_instr)(i.OutputRegister(), operand); in AssembleBinOp()
386 (masm->*rrr_instr)(i.OutputRegister(), i.InputRegister(0), in AssembleBinOp()
389 CHECK(i.OutputRegister().is(i.InputRegister(0))); in AssembleBinOp()
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/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc322 __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \
325 __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \
334 __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \
337 __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \
346 __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \
349 __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \
358 __ AddAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
361 __ AddAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
370 __ SubAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
373 __ AddAndCheckForOverflow(i.OutputRegister(), i.InputRegister(0), \
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/external/v8/src/compiler/mips/
Dcode-generator-mips.cc397 auto result = i.OutputRegister(); \
508 __ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
744 __ mov(i.OutputRegister(), sp); in AssembleArchInstruction()
747 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
751 __ lw(i.OutputRegister(), MemOperand(fp, 0)); in AssembleArchInstruction()
753 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
757 __ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction()
780 __ Addu(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp, in AssembleArchInstruction()
850 __ Addu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
856 __ Subu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
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/external/v8/src/compiler/x64/
Dcode-generator-x64.cc328 __ asm_instr(i.OutputRegister()); \
383 __ asm_instr(i.OutputRegister(), i.InputRegister(0), \
386 __ asm_instr(i.OutputRegister(), i.InputOperand(0), \
391 __ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
393 __ asm_instr(i.OutputRegister(), i.InputOperand(1)); \
403 __ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
409 __ asm_instr##_cl(i.OutputRegister()); \
420 __ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
422 __ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
424 __ asm_instr(i.OutputRegister(), i.InputOperand(0)); \
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/external/v8/src/compiler/arm/
Dcode-generator-arm.cc368 auto result = i.OutputRegister(); \
410 __ asm_instr(i.OutputRegister(), \
751 __ mov(i.OutputRegister(), sp); in AssembleArchInstruction()
755 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
760 __ ldr(i.OutputRegister(), MemOperand(fp, 0)); in AssembleArchInstruction()
762 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
766 __ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction()
809 __ add(i.OutputRegister(0), base, Operand(offset.offset())); in AssembleArchInstruction()
879 __ add(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), in AssembleArchInstruction()
883 __ and_(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), in AssembleArchInstruction()
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/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc98 Register OutputRegister64() { return OutputRegister(); } in OutputRegister64()
456 auto result = i.OutputRegister(); \
505 __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), \
510 __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), \
517 __ asm_instr(i.OutputRegister(), \
787 __ mov(i.OutputRegister(), masm()->StackPointer()); in AssembleArchInstruction()
790 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
794 __ ldr(i.OutputRegister(), MemOperand(fp, 0)); in AssembleArchInstruction()
796 __ mov(i.OutputRegister(), fp); in AssembleArchInstruction()
800 __ TruncateDoubleToI(i.OutputRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction()
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/external/v8/src/compiler/ia32/
Dcode-generator-ia32.cc393 auto result = i.OutputRegister(); \
1005 __ mov(i.OutputRegister(), esp); in AssembleArchInstruction()
1008 __ mov(i.OutputRegister(), ebp); in AssembleArchInstruction()
1012 __ mov(i.OutputRegister(), Operand(ebp, 0)); in AssembleArchInstruction()
1014 __ mov(i.OutputRegister(), ebp); in AssembleArchInstruction()
1018 auto result = i.OutputRegister(); in AssembleArchInstruction()
1054 __ lea(i.OutputRegister(), Operand(base, offset.offset())); in AssembleArchInstruction()
1166 __ imul(i.OutputRegister(), i.InputOperand(0), i.InputInt32(1)); in AssembleArchInstruction()
1168 __ imul(i.OutputRegister(), i.InputOperand(1)); in AssembleArchInstruction()
1239 if (i.OutputRegister(0).code() == i.InputRegister(1).code() || in AssembleArchInstruction()
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/external/v8/src/compiler/x87/
Dcode-generator-x87.cc308 auto result = i.OutputRegister(); \
748 __ mov(i.OutputRegister(), ebp); in AssembleArchInstruction()
751 __ mov(i.OutputRegister(), esp); in AssembleArchInstruction()
755 __ mov(i.OutputRegister(), Operand(ebp, 0)); in AssembleArchInstruction()
757 __ mov(i.OutputRegister(), ebp); in AssembleArchInstruction()
764 __ TruncateX87TOSToI(i.OutputRegister()); in AssembleArchInstruction()
797 __ lea(i.OutputRegister(), Operand(base, offset.offset())); in AssembleArchInstruction()
912 __ imul(i.OutputRegister(), i.InputOperand(0), i.InputInt32(1)); in AssembleArchInstruction()
914 __ imul(i.OutputRegister(), i.InputOperand(1)); in AssembleArchInstruction()
985 if (i.OutputRegister(0).code() == i.InputRegister(1).code() || in AssembleArchInstruction()
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_ff_gs.c219 linked_xfb_info->Outputs[i].OutputRegister; in brw_ff_gs_populate_key()
Dgen7_sol_state.c122 int varying = linked_xfb_info->Outputs[i].OutputRegister; in gen7_upload_3dstate_so_decl_list()
Dgen6_gs_visitor.cpp554 linked_xfb_info->Outputs[i].OutputRegister; in xfb_setup()
/external/v8/src/compiler/
Dcode-generator-impl.h100 Register OutputRegister(size_t index = 0) {
/external/mesa3d/src/compiler/glsl/
Dlink_varyings.cpp896 info->Outputs[info->NumOutputs].OutputRegister = location; in store()
/external/mesa3d/src/mesa/main/
Dmtypes.h1649 uint32_t OutputRegister; member
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp7025 outputMapping[info->Outputs[i].OutputRegister]; in st_translate_stream_output_info2()