/external/llvm/test/CodeGen/AMDGPU/ |
D | llvm.memcpy.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-pr… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check… 9 ; SI-DAG: ds_read_u8 10 ; SI-DAG: ds_read_u8 11 ; SI-DAG: ds_read_u8 12 ; SI-DAG: ds_read_u8 13 ; SI-DAG: ds_read_u8 14 ; SI-DAG: ds_read_u8 15 ; SI-DAG: ds_read_u8 16 ; SI-DAG: ds_read_u8 [all …]
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D | udivrem.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FU… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=SI --che… 30 ; SI: v_rcp_iflag_f32_e32 [[RCP:v[0-9]+]] 31 ; SI-DAG: v_mul_hi_u32 [[RCP_HI:v[0-9]+]], [[RCP]] 32 ; SI-DAG: v_mul_lo_i32 [[RCP_LO:v[0-9]+]], [[RCP]] 33 ; SI-DAG: v_sub_i32_e32 [[NEG_RCP_LO:v[0-9]+]], vcc, 0, [[RCP_LO]] 34 ; SI: v_cndmask_b32_e64 35 ; SI: v_mul_hi_u32 [[E:v[0-9]+]], {{v[0-9]+}}, [[RCP]] 36 ; SI-DAG: v_add_i32_e32 [[RCP_A_E:v[0-9]+]], vcc, [[E]], [[RCP]] 37 ; SI-DAG: v_subrev_i32_e32 [[RCP_S_E:v[0-9]+]], vcc, [[E]], [[RCP]] [all …]
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D | select-vectors.ll | 1 ; RUN: llc -verify-machineinstrs -march=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC… 2 ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check… 9 ; SI: v_cndmask_b32_e32 10 ; SI: v_cndmask_b32_e32 11 ; SI: v_cndmask_b32_e32 12 ; SI: v_cndmask_b32_e32 21 ; SI: v_cndmask_b32_e32 22 ; SI: v_cndmask_b32_e32 23 ; SI: v_cndmask_b32_e32 24 ; SI: v_cndmask_b32_e32 [all …]
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D | uniform-cfg.ll | 1 ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI %s 2 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI %s 4 ; SI-LABEL: {{^}}uniform_if_scc: 5 ; SI-DAG: s_cmp_eq_i32 s{{[0-9]+}}, 0 6 ; SI-DAG: v_mov_b32_e32 [[STORE_VAL:v[0-9]+]], 0 7 ; SI: s_cbranch_scc1 [[IF_LABEL:[0-9_A-Za-z]+]] 10 ; SI: v_mov_b32_e32 [[STORE_VAL]], 1 12 ; SI: [[IF_LABEL]]: 13 ; SI: buffer_store_dword [[STORE_VAL]] 31 ; SI-LABEL: {{^}}uniform_if_vcc: [all …]
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D | s_movk_i32.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 4 ; SI-LABEL: {{^}}s_movk_i32_k0: 5 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff{{$}} 6 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, 7 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]] 8 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]] 9 ; SI: s_endpgm 17 ; SI-LABEL: {{^}}s_movk_i32_k1: 18 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x7fff{{$}} [all …]
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D | cvt_f32_ubyte.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 4 ; SI-LABEL: {{^}}load_i8_to_f32: 5 ; SI: buffer_load_ubyte [[LOADREG:v[0-9]+]], 6 ; SI-NOT: bfe 7 ; SI-NOT: lshr 8 ; SI: v_cvt_f32_ubyte0_e32 [[CONV:v[0-9]+]], [[LOADREG]] 9 ; SI: buffer_store_dword [[CONV]], 17 ; SI-LABEL: {{^}}load_v2i8_to_v2f32: 18 ; SI: buffer_load_ushort [[LD:v[0-9]+]] [all …]
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D | and.ll | 1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check… 11 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 12 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 29 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 30 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 31 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 32 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 44 ; SI: s_and_b32 52 ; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x12d687 [all …]
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D | llvm.amdgcn.class.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 9 ; SI-LABEL: {{^}}test_class_f32: 10 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb 11 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc 12 ; SI: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]] 13 ; SI: v_cmp_class_f32_e32 vcc, [[SA]], [[VB]] 14 ; SI-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1, vcc 15 ; SI-NEXT: buffer_store_dword [[RESULT]] 16 ; SI: s_endpgm 24 ; SI-LABEL: {{^}}test_class_fabs_f32: [all …]
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D | bswap.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-pr… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check… 13 ; SI: buffer_load_dword [[VAL:v[0-9]+]] 14 ; SI-DAG: v_alignbit_b32 [[TMP0:v[0-9]+]], [[VAL]], [[VAL]], 8 15 ; SI-DAG: v_alignbit_b32 [[TMP1:v[0-9]+]], [[VAL]], [[VAL]], 24 16 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0xff00ff 17 ; SI: v_bfi_b32 [[RESULT:v[0-9]+]], [[K]], [[TMP1]], [[TMP0]] 18 ; SI: buffer_store_dword [[RESULT]] 19 ; SI: s_endpgm 28 ; SI-DAG: v_alignbit_b32 [all …]
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D | copy-illegal-type.ll | 1 ; RUN: llc -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 5 ; SI: buffer_load_dword [[REG:v[0-9]+]] 6 ; SI: buffer_store_dword [[REG]] 7 ; SI: s_endpgm 15 ; SI: buffer_load_dword [[REG:v[0-9]+]] 16 ; SI: buffer_store_dword [[REG]] 17 ; SI: buffer_store_dword [[REG]] 18 ; SI: s_endpgm 27 ; SI: buffer_load_dword [[REG:v[0-9]+]] [all …]
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D | s_addk_i32.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 4 ; SI-LABEL: {{^}}s_addk_i32_k0: 5 ; SI: s_load_dword [[VAL:s[0-9]+]] 6 ; SI: s_addk_i32 [[VAL]], 0x41 7 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[VAL]] 8 ; SI: buffer_store_dword [[VRESULT]] 9 ; SI: s_endpgm 17 ; SI-LABEL: {{^}}s_addk_i32_k0_x2: 18 ; SI: s_movk_i32 [[K:s[0-9]+]], 0x41 [all …]
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D | indirect-private-64.ll | 1 …lement-size-16 -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA16 -check-prefix=SI %s 2 …-element-size-4 -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA4 -check-prefix=SI %s 3 …+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s 4 …lement-size-16 -verify-machineinstrs < %s | FileCheck -check-prefix=CI-ALLOCA16 -check-prefix=SI %s 5 …+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=CI-PROMOTE -check-prefix=SI %s 9 ; SI-LABEL: {{^}}private_access_f64_alloca: 11 ; SI-ALLOCA16: buffer_store_dwordx2 12 ; SI-ALLOCA16: buffer_load_dwordx2 14 ; SI-ALLOCA4: buffer_store_dword v 15 ; SI-ALLOCA4: buffer_store_dword v [all …]
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D | unaligned-load-store.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=ALIGN… 2 …naligned-buffer-access -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=UNALIG… 3 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-… 5 ; SI-LABEL: {{^}}local_unaligned_load_store_i16: 6 ; SI: ds_read_u8 7 ; SI: ds_read_u8 8 ; SI: ds_write_b8 9 ; SI: ds_write_b8 10 ; SI: s_endpgm 17 ; SI-LABEL: {{^}}global_unaligned_load_store_i16: [all …]
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D | llvm.sin.ll | 2 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC… 11 ; SI: v_mul_f32 12 ; SI: v_fract_f32 13 ; SI: v_sin_f32 14 ; SI-NOT: v_sin_f32 22 ; SI: v_mul_f32 23 ; SI: v_mul_f32 24 ; SI: v_fract_f32 25 ; SI: v_sin_f32 26 ; SI-NOT: v_sin_f32 [all …]
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D | llvm.AMDGPU.bfe.i32.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-pr… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check… 8 ; SI: v_bfe_i32 18 ; SI: v_bfe_i32 27 ; SI: v_bfe_i32 36 ; SI: v_bfe_i32 45 ; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 2, 8 54 ; SI-NOT: {{[^@]}}bfe 55 ; SI: s_endpgm 64 ; SI-NOT: {{[^@]}}bfe [all …]
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D | llvm.AMDGPU.bfe.u32.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-pr… 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check… 8 ; SI: v_bfe_u32 17 ; SI: v_bfe_u32 26 ; SI: v_bfe_u32 35 ; SI: v_bfe_u32 44 ; SI-NOT: {{[^@]}}bfe 45 ; SI: s_endpgm 54 ; SI-NOT: {{[^@]}}bfe 55 ; SI: s_endpgm [all …]
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D | valu-i1.ll | 1 …arch=amdgcn -verify-machineinstrs -enable-misched -asm-verbose < %s | FileCheck -check-prefix=SI %s 5 ; SI-LABEL: @test_if 8 ; SI-NOT: s_mov_b64 s[{{[0-9]:[0-9]}}], -1 9 ; SI: v_mov_b32_e32 v{{[0-9]}}, -1 45 ; SI-LABEL: @simple_test_v_if 46 ; SI: v_cmp_ne_i32_e32 vcc, 0, v{{[0-9]+}} 47 ; SI: s_and_saveexec_b64 [[BR_SREG:s\[[0-9]+:[0-9]+\]]], vcc 48 ; SI: s_xor_b64 [[BR_SREG]], exec, [[BR_SREG]] 50 ; SI: ; BB#1 51 ; SI: buffer_store_dword [all …]
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D | fmaxnum.f64.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 11 ; SI: v_max_f64 19 ; SI: v_max_f64 20 ; SI: v_max_f64 28 ; SI: v_max_f64 29 ; SI: v_max_f64 30 ; SI: v_max_f64 31 ; SI: v_max_f64 39 ; SI: v_max_f64 [all …]
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D | fminnum.f64.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 11 ; SI: v_min_f64 19 ; SI: v_min_f64 20 ; SI: v_min_f64 28 ; SI: v_min_f64 29 ; SI: v_min_f64 30 ; SI: v_min_f64 31 ; SI: v_min_f64 39 ; SI: v_min_f64 [all …]
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D | llvm.amdgcn.div.scale.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 8 ; SI-LABEL: {{^}}test_div_scale_f32_1: 9 ; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 10 ; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64… 11 ; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]] 12 ; SI: buffer_store_dword [[RESULT0]] 13 ; SI: s_endpgm 28 ; SI-LABEL: {{^}}test_div_scale_f32_2: 29 ; SI-DAG: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 30 ; SI-DAG: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64… [all …]
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D | trunc.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s 7 ; SI-LABEL: {{^}}trunc_i64_to_i32_store: 8 ; SI: s_load_dword [[SLOAD:s[0-9]+]], s[0:1], 0xb 9 ; SI: v_mov_b32_e32 [[VLOAD:v[0-9]+]], [[SLOAD]] 10 ; SI: buffer_store_dword [[VLOAD]] 21 ; SI-LABEL: {{^}}trunc_load_shl_i64: 22 ; SI-DAG: s_load_dwordx2 23 ; SI-DAG: s_load_dword [[SREG:s[0-9]+]], 24 ; SI: s_lshl_b32 [[SHL:s[0-9]+]], [[SREG]], 2 25 ; SI: v_mov_b32_e32 [[VSHL:v[0-9]+]], [[SHL]] [all …]
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D | reorder-stores.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s 4 ; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store: 5 ; SI: buffer_load_dwordx4 6 ; SI: buffer_load_dwordx4 7 ; SI: buffer_store_dwordx4 8 ; SI: buffer_store_dwordx4 9 ; SI: s_endpgm 18 ; SI-LABEL: {{^}}no_reorder_scalarized_v2f64_local_load_store: 19 ; SI: ds_read2_b64 [all …]
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D | uint_to_fp.f64.ll | 1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 5 ; SI-LABEL: {{^}}v_uint_to_fp_i64_to_f64 6 ; SI: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}} 7 ; SI-DAG: v_cvt_f64_u32_e32 [[HI_CONV:v\[[0-9]+:[0-9]+\]]], v[[HI]] 8 ; SI-DAG: v_cvt_f64_u32_e32 [[LO_CONV:v\[[0-9]+:[0-9]+\]]], v[[LO]] 9 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32 10 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]] 11 ; SI: buffer_store_dwordx2 [[RESULT]] 21 ; SI-LABEL: {{^}}s_uint_to_fp_i64_to_f64 28 ; SI-LABEL: {{^}}s_uint_to_fp_v2i64_to_v2f64 [all …]
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/external/llvm/lib/Object/ |
D | Object.cpp | 31 inline section_iterator *unwrap(LLVMSectionIteratorRef SI) { in unwrap() argument 32 return reinterpret_cast<section_iterator*>(SI); in unwrap() 36 wrap(const section_iterator *SI) { in wrap() argument 38 (const_cast<section_iterator*>(SI)); in wrap() 41 inline symbol_iterator *unwrap(LLVMSymbolIteratorRef SI) { in unwrap() argument 42 return reinterpret_cast<symbol_iterator*>(SI); in unwrap() 46 wrap(const symbol_iterator *SI) { in wrap() argument 48 (const_cast<symbol_iterator*>(SI)); in wrap() 51 inline relocation_iterator *unwrap(LLVMRelocationIteratorRef SI) { in unwrap() argument 52 return reinterpret_cast<relocation_iterator*>(SI); in unwrap() [all …]
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/external/boringssl/src/ssl/test/runner/curve25519/ |
D | square_amd64.s | 15 MOVQ in+8(FP), SI 17 MOVQ 0(SI),AX 18 MULQ 0(SI) 21 MOVQ 0(SI),AX 23 MULQ 8(SI) 26 MOVQ 0(SI),AX 28 MULQ 16(SI) 31 MOVQ 0(SI),AX 33 MULQ 24(SI) 36 MOVQ 0(SI),AX [all …]
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