/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
D | BlackfinRegisterInfo.cpp | 92 unsigned ScratchReg, in adjustRegister() argument 104 loadConstant(MBB, I, DL, ScratchReg, delta); in adjustRegister() 106 assert(BF::PRegClass.contains(ScratchReg) && in adjustRegister() 110 .addReg(ScratchReg, RegState::Kill); in adjustRegister() 113 assert(BF::DRegClass.contains(ScratchReg) && in adjustRegister() 117 .addReg(ScratchReg, RegState::Kill); in adjustRegister() 267 unsigned ScratchReg = findScratchRegister(II, RS, &BF::PRegClass, SPAdj); in eliminateFrameIndex() local 268 assert(ScratchReg && "Could not scavenge register"); in eliminateFrameIndex() 269 loadConstant(MBB, II, DL, ScratchReg, Offset); in eliminateFrameIndex() 270 BuildMI(MBB, II, DL, TII.get(BF::ADDpp), ScratchReg) in eliminateFrameIndex() [all …]
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D | BlackfinRegisterInfo.h | 66 unsigned ScratchReg,
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZRegisterInfo.cpp | 115 unsigned ScratchReg = in eliminateFrameIndex() local 123 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex() 125 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg, in eliminateFrameIndex() 131 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg) in eliminateFrameIndex() 136 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex() 137 BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg) in eliminateFrameIndex() 138 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr); in eliminateFrameIndex() 142 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg, in eliminateFrameIndex()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFrameLowering.cpp | 751 unsigned ScratchReg = 0; in emitPrologue() local 783 &ScratchReg, &TempReg); in emitPrologue() 787 SingleScratchReg = ScratchReg == TempReg; in emitPrologue() 860 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg); in emitPrologue() 904 .addReg(ScratchReg) in emitPrologue() 931 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLDICL), ScratchReg) in emitPrologue() 936 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLWINM), ScratchReg) in emitPrologue() 942 BuildMI(MBB, MBBI, dl, SubtractImmCarryingInst, ScratchReg) in emitPrologue() 943 .addReg(ScratchReg, RegState::Kill) in emitPrologue() 952 BuildMI(MBB, MBBI, dl, SubtractCarryingInst, ScratchReg) in emitPrologue() [all …]
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D | PPCAsmPrinter.cpp | 358 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local 362 .addReg(ScratchReg) in LowerPATCHPOINT() 366 .addReg(ScratchReg) in LowerPATCHPOINT() 367 .addReg(ScratchReg) in LowerPATCHPOINT() 371 .addReg(ScratchReg) in LowerPATCHPOINT() 372 .addReg(ScratchReg) in LowerPATCHPOINT() 376 .addReg(ScratchReg) in LowerPATCHPOINT() 377 .addReg(ScratchReg) in LowerPATCHPOINT() 397 .addReg(ScratchReg)); in LowerPATCHPOINT() 400 .addReg(ScratchReg) in LowerPATCHPOINT() [all …]
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/external/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmInstrumentation.cpp | 131 unsigned ScratchReg) { in RegisterContext() 134 BusyRegs.push_back(convReg(ScratchReg, 64)); in RegisterContext() 145 unsigned ScratchReg(unsigned Size) const { in ScratchReg() function 555 if (RegCtx.ScratchReg(32) != X86::NoRegister) in InstrumentMemOperandPrologue() 556 SpillReg(Out, RegCtx.ScratchReg(32)); in InstrumentMemOperandPrologue() 567 if (RegCtx.ScratchReg(32) != X86::NoRegister) in InstrumentMemOperandEpilogue() 568 RestoreReg(Out, RegCtx.ScratchReg(32)); in InstrumentMemOperandEpilogue() 623 assert(RegCtx.ScratchReg(32) != X86::NoRegister); in InstrumentMemOperandSmall() 624 unsigned ScratchRegI32 = RegCtx.ScratchReg(32); in InstrumentMemOperandSmall() 814 if (RegCtx.ScratchReg(64) != X86::NoRegister) in InstrumentMemOperandPrologue() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 397 unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? in StoreRegToStackSlot() local 399 NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFCRpseud), ScratchReg) in StoreRegToStackSlot() 407 NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) in StoreRegToStackSlot() 408 .addReg(ScratchReg).addImm(ShiftBits) in StoreRegToStackSlot() 413 .addReg(ScratchReg, in StoreRegToStackSlot() 532 unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? in LoadRegFromStackSlot() local 535 ScratchReg), FrameIdx)); in LoadRegFromStackSlot() 542 NewMIs.push_back(BuildMI(MF, DL, get(PPC::RLWINM), ScratchReg) in LoadRegFromStackSlot() 543 .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0) in LoadRegFromStackSlot() 548 .addReg(ScratchReg)); in LoadRegFromStackSlot()
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreRegisterInfo.cpp | 234 unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II, in eliminateFrameIndex() local 236 loadConstant(MBB, II, ScratchReg, Offset, dl); in eliminateFrameIndex() 241 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex() 247 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex() 252 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64AsmPrinter.cpp | 394 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local 398 .addReg(ScratchReg) in LowerPATCHPOINT() 402 .addReg(ScratchReg) in LowerPATCHPOINT() 403 .addReg(ScratchReg) in LowerPATCHPOINT() 407 .addReg(ScratchReg) in LowerPATCHPOINT() 408 .addReg(ScratchReg) in LowerPATCHPOINT() 411 EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::BLR).addReg(ScratchReg)); in LowerPATCHPOINT()
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D | AArch64RegisterInfo.cpp | 401 unsigned ScratchReg = in eliminateFrameIndex() local 403 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII); in eliminateFrameIndex() 404 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseRegisterInfo.cpp | 760 unsigned ScratchReg = 0; in eliminateFrameIndex() local 769 ScratchReg = MF.getRegInfo().createVirtualRegister(&ARM::GPRRegClass); in eliminateFrameIndex() 771 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex() 775 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex() 779 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true); in eliminateFrameIndex()
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D | ARMAsmPrinter.cpp | 1853 unsigned ScratchReg = MI->getOperand(1).getReg(); in EmitInstruction() local 1863 .addReg(ScratchReg) in EmitInstruction() 1879 .addReg(ScratchReg) in EmitInstruction() 1892 unsigned ScratchReg = MI->getOperand(1).getReg(); in EmitInstruction() local 1895 .addReg(ScratchReg) in EmitInstruction() 1906 .addReg(ScratchReg) in EmitInstruction() 1912 .addReg(ScratchReg) in EmitInstruction() 1928 .addReg(ScratchReg) in EmitInstruction()
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 2103 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); in adjustForSegmentedStacks() local 2104 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForSegmentedStacks() 2172 ScratchReg = IsLP64 ? X86::RSP : X86::ESP; in adjustForSegmentedStacks() 2174 … BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP) in adjustForSegmentedStacks() 2177 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks() 2199 ScratchReg = X86::ESP; in adjustForSegmentedStacks() 2201 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) in adjustForSegmentedStacks() 2206 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks() 2237 .addReg(ScratchReg) in adjustForSegmentedStacks() 2448 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local [all …]
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D | X86MCInstLower.cpp | 1007 unsigned ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT() local 1008 if (X86II::isX86_64ExtendedReg(ScratchReg)) in LowerPATCHPOINT() 1014 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp)); in LowerPATCHPOINT() 1015 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | PrologEpilogInserter.cpp | 823 unsigned ScratchReg = 0; in scavengeFrameVirtualRegs() local 850 ScratchReg = RS->scavengeRegister(RC, I, SPAdj); in scavengeFrameVirtualRegs() 855 assert (ScratchReg && "Missing scratch register!"); in scavengeFrameVirtualRegs() 856 MI->getOperand(i).setReg(ScratchReg); in scavengeFrameVirtualRegs()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMAsmPrinter.cpp | 1812 unsigned ScratchReg = MI->getOperand(1).getReg(); in EmitInstruction() local 1827 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction() 1849 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction() 1864 unsigned ScratchReg = MI->getOperand(1).getReg(); in EmitInstruction() local 1868 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction() 1882 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction() 1891 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction() 1913 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg)); in EmitInstruction()
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D | ARMBaseRegisterInfo.cpp | 1200 unsigned ScratchReg = 0; in eliminateFrameIndex() local 1209 ScratchReg = MF.getRegInfo().createVirtualRegister(ARM::GPRRegisterClass); in eliminateFrameIndex() 1211 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex() 1215 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex() 1219 MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86FrameLowering.cpp | 1331 unsigned ScratchReg = GetScratchRegister(Is64Bit, MF); in adjustForSegmentedStacks() local 1332 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForSegmentedStacks() 1384 BuildMI(checkMBB, DL, TII.get(X86::LEA64r), ScratchReg).addReg(X86::RSP) in adjustForSegmentedStacks() 1386 BuildMI(checkMBB, DL, TII.get(X86::CMP64rm)).addReg(ScratchReg) in adjustForSegmentedStacks() 1392 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) in adjustForSegmentedStacks() 1394 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
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/external/llvm/lib/CodeGen/ |
D | PrologEpilogInserter.cpp | 1198 unsigned ScratchReg = RS->scavengeRegister(RC, J, SPAdj); in doScavengeFrameVirtualRegs() local 1204 assert(ScratchReg && "Missing scratch register!"); in doScavengeFrameVirtualRegs() 1205 MRI.replaceRegWith(Reg, ScratchReg); in doScavengeFrameVirtualRegs() 1210 RS->setRegUsed(ScratchReg); in doScavengeFrameVirtualRegs()
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/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringMIPS32.cpp | 1818 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum); in newBaseRegister() local 1820 Target->_addi(ScratchReg, Base, -Offset); in newBaseRegister() 1826 Target->_lui(ScratchReg, Target->Ctx->getConstantInt32(UpperBits)); in newBaseRegister() 1828 Target->_ori(ScratchReg, ScratchReg, LowerBits); in newBaseRegister() 1829 Target->_addu(ScratchReg, ScratchReg, Base); in newBaseRegister() 1831 Target->_addiu(ScratchReg, Base, Offset); in newBaseRegister() 1835 return ScratchReg; in newBaseRegister()
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D | IceTargetLoweringARM32.cpp | 1771 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum); in newBaseRegister() local 1776 Target->_sub(ScratchReg, Base, OffsetVal); in newBaseRegister() 1781 Target->_add(ScratchReg, Base, OffsetVal); in newBaseRegister() 1794 TempBaseReg = ScratchReg; in newBaseRegister() 1802 return ScratchReg; in newBaseRegister() 4539 Variable *ScratchReg = makeReg(IceType_i32); in lowerInt64IcmpCond() local 4541 _sbcs(ScratchReg, Src0RHi, Src1RFHi); in lowerInt64IcmpCond() 4544 Context.insert<InstFakeUse>(ScratchReg); in lowerInt64IcmpCond()
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