Searched refs:TXD (Results 1 – 8 of 8) sorted by relevance
| /external/syslinux/gpxe/src/drivers/net/ |
| D | 3c90x.h | 269 struct TXD { struct
295 struct TXD *tx_ring; argument
|
| D | 3c90x.c | 257 malloc_dma(TX_RING_SIZE * sizeof(struct TXD), TX_RING_ALIGN); in a3c90x_setup_tx_ring()
264 memset(p->tx_ring, 0, TX_RING_SIZE * sizeof(struct TXD)); in a3c90x_setup_tx_ring()
312 free_dma(p->tx_ring, TX_RING_SIZE * sizeof(struct TXD)); in a3c90x_free_tx_ring()
329 struct TXD *tx_cur_desc; in a3c90x_transmit()
330 struct TXD *tx_prev_desc; in a3c90x_transmit()
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 104 OP14_TEX(TXD)
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Instructions.td | 1331 def TXD: InstR600 <
1335 "TXD $dst, $src0, $src1, $src2, $resourceId, $samplerId, $textureTarget", [],
|
| D | R600ISelLowering.cpp | 319 case AMDGPU::TXD: { in EmitInstrWithCustomInserter()
|
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 747 NV50_IR_OPCODE_CASE(TXD, TXD); in translateOpcode()
842 NV50_IR_OPCODE_CASE(SAMPLE_D, TXD); in translateOpcode()
|
| /external/mesa3d/src/gallium/docs/source/ |
| D | tgsi.rst | 588 .. opcode:: TXD - Texture Lookup with Derivatives
3561 by TGSI texture instructions, such as :opcode:`TEX`, :opcode:`TXD`, and
|
| /external/mesa3d/src/gallium/state_trackers/nine/ |
| D | nine_shader.c | 2993 _OPI(TEXLDD, TXD, V(0,0), V(0,0), V(2,1), V(3,0), 1, 4, SPECIAL(TEXLDD)),
|