| /external/llvm/test/CodeGen/ARM/ |
| D | 2011-02-04-AntidepMultidef.ll | 2 ; rdar://8959122 illegal register operands for UMULL instruction
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| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | 2011-02-04-AntidepMultidef.ll | 2 ; rdar://8959122 illegal register operands for UMULL instruction
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 188 UMULL, enumerator
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| D | AArch64ISelLowering.cpp | 955 case AArch64ISD::UMULL: return "AArch64ISD::UMULL"; in getTargetNodeName()
2229 NewOpc = AArch64ISD::UMULL; in LowerMUL()
2237 NewOpc = AArch64ISD::UMULL; in LowerMUL()
2241 NewOpc = AArch64ISD::UMULL; in LowerMUL()
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| D | AArch64InstrInfo.td | 287 def AArch64umull : SDNode<"AArch64ISD::UMULL", SDT_AArch64mull>;
3571 defm UMULL : SIMDLongThreeVectorBHS<1, 0b1100, "umull", int_aarch64_neon_umull>;
3577 // Additional patterns for SMULL and UMULL
4665 defm UMULL : SIMDVectorIndexedLongSD<1, 0b1010, "umull",
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_32.c | 101 #define UMULL 0xe0800090 macro
1823 return push_inst(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL) in sljit_emit_op0()
1830 return push_inst(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL) in sljit_emit_op0()
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| D | sljitNativeARM_T2_32.c | 164 #define UMULL 0xfba00000 macro
1256 return push_inst32(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL) in sljit_emit_op0()
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1386 ### UMULL ### subsection
4315 ### UMULL ### subsection
4325 ### UMULL ### subsection
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| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 277 (instregex "SMULL$", "UMULL$", "t2SMULL$", "t2UMULL$")>;
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| D | ARMInstrInfo.td | 3919 def UMULL : AsMul1I64<0b0000100, (outs GPR:$RdLo, GPR:$RdHi),
3934 (UMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
5780 // MUL/UMLAL/SMLAL/UMULL/SMULL are available on all arches, but
5800 (UMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s), 0>,
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| D | ARMScheduleA9.td | 2501 (instregex "SMULL", "SMULLv5", "UMULL", "UMULLv5", "SMLAL$", "UMLAL",
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| D | ARMISelDAGToDAG.cpp | 2912 Subtarget->hasV6Ops() ? ARM::UMULL : ARM::UMULLv5, dl, in Select()
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2129 # UMULL
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| D | thumb2.txt | 2289 # UMULL
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2440 # UMULL
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| D | basic-arm-instructions.txt | 2302 # UMULL
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 2572 ARM::UMULL : ARM::UMULLv5, in Select()
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| D | ARMInstrInfo.td | 3502 def UMULL : AsMul1I64<0b0000100, (outs GPR:$RdLo, GPR:$RdHi),
3517 (UMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2391 @ UMULL
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| D | basic-thumb2-instructions.s | 2930 @ UMULL
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| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3427 @ UMULL
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| D | basic-arm-instructions.s | 3309 @ UMULL
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| /external/valgrind/none/tests/arm/ |
| D | v6intARM.stdout.exp | 529 UMULL
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| D | v6media.stdout.exp | 22 UMULL
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| D | v6intThumb.stdout.exp | 17342 UMULL
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