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Searched refs:VALU (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dsplit-smrd.ll5 ; the VALU, we are also moving its users to the VALU.
Dsgpr-control-flow.ll63 ; VALU for i1 phi.
Duniform-cfg.ll121 ; be selected for the SALU and then later moved to the VALU.
146 ; be selected for the SALU and then later moved to the VALU.
Dvalu-i1.ll7 ; moved using VALU instructions
Dand.ll60 ; can fold into the s_and_b32 and the VALU one is materialized
72 ; Just to stop future replacement of copy to vgpr + store with VALU op.
Dsalu-to-valu.ll53 ; Test moving an SMRD instruction to the VALU
90 ; Test moving an SMRD with an immediate offset to the VALU
/external/llvm/lib/Target/AMDGPU/
DSISchedule.td44 // FIXME: Should there be a class for instructions which are VALU
45 // instructions and have VALU rates, but write to the SALU (i.e. VOPC
DSIInstrFormats.td23 field bits<1> VALU = 0;
59 let TSFlags{4} = VALU;
121 let VALU = 1;
158 let VALU = 1;
DSIDefines.h20 VALU = 1 << 4, enumerator
DSIInstrInfo.h192 return MI.getDesc().TSFlags & SIInstrFlags::VALU; in isVALU()
196 return get(Opcode).TSFlags & SIInstrFlags::VALU; in isVALU()
DAMDGPUInstructions.td52 // 32-bit VALU immediate operand that uses the constant bus.
DSIInstructions.td274 // Use added complexity so these patterns are preferred to the VALU patterns.
1919 let VALU = 1;
3410 // moved to the VALU.
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td454 let PPC970_Unit = 5 in { // VALU Operations.
841 } // VALU Operations.
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrAltivec.td273 let PPC970_Unit = 5 in { // VALU Operations.
/external/icu/icu4j/perf-tests/data/collation/
DTestNames_SerbianSH.txt56876 VALUŠEK JOVAN
56877 VALUŠEK KATICA
56878 VALUŠEK PAVLE