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/external/llvm/test/CodeGen/PowerPC/
Dfloat-to-int.ll2 … -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
17 ; CHECK-VSX: @foo
18 ; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
19 ; CHECK-VSX: stxsdx [[REG]],
20 ; CHECK-VSX: ld 3,
21 ; CHECK-VSX: blr
34 ; CHECK-VSX: @foo2
35 ; CHECK-VSX: xscvdpsxds [[REG:[0-9]+]], 1
36 ; CHECK-VSX: stxsdx [[REG]],
37 ; CHECK-VSX: ld 3,
[all …]
Dfma-assoc.ll2 …t -mattr=+vsx -mcpu=pwr7 -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX %s
16 ; CHECK-VSX-LABEL: test_FMADD_ASSOC1:
17 ; CHECK-VSX: xsmaddmdp
18 ; CHECK-VSX-NEXT: xsmaddadp
19 ; CHECK-VSX-NEXT: fmr
20 ; CHECK-VSX-NEXT: blr
35 ; CHECK-VSX-LABEL: test_FMADD_ASSOC2:
36 ; CHECK-VSX: xsmaddmdp
37 ; CHECK-VSX-NEXT: xsmaddadp
38 ; CHECK-VSX-NEXT: fmr
[all …]
Di64-to-float.ll2 … -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
17 ; CHECK-VSX: @foo
18 ; CHECK-VSX: std 3,
19 ; CHECK-VSX: lxsdx [[REG:[0-9]+]],
20 ; CHECK-VSX: fcfids 1, [[REG]]
21 ; CHECK-VSX: blr
35 ; CHECK-VSX: @goo
36 ; CHECK-VSX: std 3,
37 ; CHECK-VSX: lxsdx [[REG:[0-9]+]],
38 ; CHECK-VSX: xscvsxddp 1, [[REG]]
[all …]
Dfsel.ll3 …nable-no-infs-fp-math -enable-no-nans-fp-math -mattr=+vsx | FileCheck -check-prefix=CHECK-FM-VSX %s
21 ; CHECK-FM-VSX: @zerocmp1
22 ; CHECK-FM-VSX: fsel 1, 1, 2, 3
23 ; CHECK-FM-VSX: blr
41 ; CHECK-FM-VSX: @zerocmp2
42 ; CHECK-FM-VSX: xsnegdp [[REG:[0-9]+]], 1
43 ; CHECK-FM-VSX: fsel 1, [[REG]], 3, 2
44 ; CHECK-FM-VSX: blr
63 ; CHECK-FM-VSX: @zerocmp3
64 ; CHECK-FM-VSX: xsnegdp [[REG2:[0-9]+]], 1
[all …]
Dunaligned.ll3 … -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
16 ; CHECK-VSX: @foo1
17 ; CHECK-VSX: lhz
18 ; CHECK-VSX: sth
31 ; CHECK-VSX: @foo2
32 ; CHECK-VSX: lwz
33 ; CHECK-VSX: stw
46 ; CHECK-VSX: @foo3
47 ; CHECK-VSX: ld
48 ; CHECK-VSX: std
[all …]
Dvec_mul.ll4 …inux-gnu -march=ppc64 -mattr=+altivec -mattr=+vsx -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-VSX
5 …tr=+altivec -mattr=+vsx -mcpu=pwr8 -mattr=-power8-altivec | FileCheck %s -check-prefix=CHECK-LE-VSX
19 ; CHECK-VSX-LABEL: test_v4i32:
20 ; CHECK-VSX: vmsumuhm
21 ; CHECK-VSX-NOT: mullw
22 ; CHECK-LE-VSX-LABEL: test_v4i32:
23 ; CHECK-LE-VSX: vmsumuhm
24 ; CHECK-LE-VSX-NOT: mullw
38 ; CHECK-VSX-LABEL: test_v8i16:
39 ; CHECK-VSX: vmladduhm
[all …]
Di32-to-float.ll4 … -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
34 ; CHECK-VSX: @foo
35 ; CHECK-VSX: stw 3,
36 ; CHECK-VSX: lfiwax [[REG:[0-9]+]],
37 ; CHECK-VSX: fcfids 1, [[REG]]
38 ; CHECK-VSX: blr
65 ; CHECK-VSX: @goo
66 ; CHECK-VSX: stw 3,
67 ; CHECK-VSX: lfiwax [[REG:[0-9]+]],
68 ; CHECK-VSX: xscvsxddp 1, [[REG]]
[all …]
Dfma-ext.ll2 …t -mattr=+vsx -mcpu=pwr7 -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX %s
13 ; CHECK-VSX-LABEL: test_FMADD_EXT1:
14 ; CHECK-VSX: xsmaddmdp
15 ; CHECK-VSX-NEXT: blr
27 ; CHECK-VSX-LABEL: test_FMADD_EXT2:
28 ; CHECK-VSX: xsmaddmdp
29 ; CHECK-VSX-NEXT: blr
41 ; CHECK-VSX-LABEL: test_FMSUB_EXT1:
42 ; CHECK-VSX: xsmsubmdp
43 ; CHECK-VSX-NEXT: blr
[all …]
Drounding-ops.ll2 …iple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
12 ; CHECK-VSX-LABEL: test1:
13 ; CHECK-VSX: frim 1, 1
24 ; CHECK-VSX-LABEL: test2:
25 ; CHECK-VSX: xsrdpim 1, 1
36 ; CHECK-VSX-LABEL: test3:
37 ; CHECK-VSX: frin 1, 1
48 ; CHECK-VSX-LABEL: test4:
49 ; CHECK-VSX: xsrdpi 1, 1
60 ; CHECK-VSX-LABEL: test5:
[all …]
Dcopysignl.ll2 …u=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s -check-prefix=CHECK-VSX
15 ; CHECK-VSX-LABEL: @foo_d_ll
16 ; CHECK-VSX: xscpsgndp 1, 3, 1
17 ; CHECK-VSX: blr
31 ; CHECK-VSX-LABEL: @foo_dl
32 ; CHECK-VSX: xscpsgndp 1, 2, 1
33 ; CHECK-VSX: blr
47 ; CHECK-VSX-LABEL: @foo_ll
48 ; CHECK-VSX: bl copysignl
49 ; CHECK-VSX: blr
[all …]
Dmcm-4.ll2 …wr7 -O0 -code-model=medium -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=MEDIUM-VSX %s
4 …=pwr7 -O0 -code-model=large -fast-isel=false -mattr=+vsx <%s | FileCheck -check-prefix=LARGE-VSX %s
24 ; MEDIUM-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
25 ; MEDIUM-VSX: .quad 4562098671269285104
26 ; MEDIUM-VSX-LABEL: test_double_const:
27 ; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
28 ; MEDIUM-VSX: addi [[REG2:[0-9]+]], [[REG1]], [[VAR]]@toc@l
29 ; MEDIUM-VSX: lxsdx {{[0-9]+}}, 0, [[REG2]]
38 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
39 ; LARGE-VSX: .quad 4562098671269285104
[all …]
Dfcpsgn.ll2 …iple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
14 ; CHECK-VSX-LABEL: @foo_dd
15 ; CHECK-VSX: xscpsgndp 1, 2, 1
16 ; CHECK-VSX: blr
29 ; CHECK-VSX-LABEL: @foo_ss
30 ; CHECK-VSX: fcpsgn 1, 2, 1
31 ; CHECK-VSX: blr
45 ; CHECK-VSX-LABEL: @foo_sd
46 ; CHECK-VSX: fcpsgn 1, 2, 1
47 ; CHECK-VSX: blr
[all …]
Dvec-abi-align.ll2 …iple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
21 ; CHECK-VSX-LABEL: @test1
22 ; CHECK-VSX: stxvw4x 34,
23 ; CHECK-VSX: blr
44 ; CHECK-VSX-LABEL: @test2
45 ; CHECK-VSX-DAG: ld {{[0-9]+}}, 112(1)
46 ; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
47 ; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 112
48 ; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]
49 ; CHECK-VSX: blr
[all …]
Dppc64-align-long-double.ll2 ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
28 ; CHECK-VSX-DAG: std 6, 72(1)
29 ; CHECK-VSX-DAG: std 5, 64(1)
30 ; CHECK-VSX-DAG: std 4, 56(1)
31 ; CHECK-VSX-DAG: std 3, 48(1)
32 ; CHECK-VSX: li 3, 16
33 ; CHECK-VSX: addi 4, 1, 48
34 ; CHECK-VSX: lxsdx 1, 4, 3
35 ; CHECK-VSX: li 3, 24
36 ; CHECK-VSX: lxsdx 2, 4, 3
Dfma.ll2 …t -mattr=+vsx -mcpu=pwr7 -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX %s
19 ; CHECK-VSX-LABEL: test_FMADD1:
20 ; CHECK-VSX: xsmaddmdp
21 ; CHECK-VSX-NEXT: blr
32 ; CHECK-VSX-LABEL: test_FMADD2:
33 ; CHECK-VSX: xsmaddmdp
34 ; CHECK-VSX-NEXT: blr
45 ; CHECK-VSX-LABEL: test_FMSUB1:
46 ; CHECK-VSX: xsmsubmdp
47 ; CHECK-VSX-NEXT: blr
[all …]
Dmcm-12.ll2 ; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
21 ; CHECK-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
22 ; CHECK-VSX: .quad 4562098671269285104
23 ; CHECK-VSX-LABEL: test_double_const:
24 ; CHECK-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
25 ; CHECK-VSX: addi [[REG1]], {{[0-9]+}}, [[VAR]]@toc@l
26 ; CHECK-VSX: lxsdx {{[0-9]+}}, 0, [[REG1]]
D2012-10-12-bitcast.ll2 ; RUN: llc -mattr=+vsx -mattr=+altivec -mcpu=pwr7 < %s | FileCheck -check-prefix=CHECK-VSX %s
22 ; CHECK-VSX: addi [[REGISTER:[0-9]+]], 1, -16
23 ; CHECK-VSX: stxvd2x 34, 0, [[REGISTER]]
24 ; CHECK-VSX: lwz 3, -16(1)
25 ; CHECK-VSX: blr
Dbuiltins-ppc-p8vector.ll4 …: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-VSX
27 ; CHECK-VSX: vbpermq {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
42 ; CHECK-VSX: vbpermq {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
55 ; CHECK-VSX: vgbbd {{[0-9]+}}, {{[0-9]+}}
68 ; CHECK-VSX: vgbbd {{[0-9]+}}, {{[0-9]+}}
Dunal4-std.ll2 ; RUN: llc < %s -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
20 ; CHECK-VSX: @copy_to_conceal
21 ; CHECK-VSX: stxvw4x {{[0-9]+}}, 0,
Dppc64-i128-abi.ll13 ; VSX:
17 ; VMX (no VSX):
51 ; VSX:
55 ; VMX (no VSX):
82 ; Little Endian (VSX and VMX):
88 ; Big Endian (VSX and VMX)
118 ; Little Endian (VSX and VMX):
126 ; Big Endian (VSX and VMX):
/external/llvm/lib/Target/PowerPC/
Dp9-instrs.txt4 . Done (Total 155 Instructions: 101 VSX, 54 Altivec)
201 "7.6.1.2.1 VSX Scalar Move Instructions"
202 // VSX Scalar Quad-Precision Move Instructions
204 // VSX Scalar Copy Sign Quad-Precision X-form p.553
207 // VSX Scalar Absolute Quad-Precision X-form 531
208 // VSX Scalar Negate Quad-Precision X-form 627
209 // VSX Scalar Negative Absolute Quad-Precision X-form 626
213 "7.6.1.3 VSX Floating-Point Arithmetic Instructions"
215 // VSX Scalar Quad-Precision Elementary Arithmetic
217 // VSX Scalar Add Quad-Precision [using round to Odd] X-form 539
[all …]
/external/valgrind/none/tests/ppc32/
Dtest_isa_2_07_part2.stdout.exp1 Test VSX floating point instructions
653 Test VSX vector and scalar single argument instructions
780 Test VSX logic instructions
785 Test VSX scalar integer conversion instructions
797 Test VSX load/store dp to sp instructions
844 Test VSX vector and scalar two argument instructions
Dtest_isa_2_06_part2.stdout.exp1 Test VSX vector single arg instructions
21 Test VSX floating point compare and basic arithmetic instructions
/external/valgrind/none/tests/ppc64/
Dtest_isa_2_07_part2.stdout.exp1 Test VSX floating point instructions
653 Test VSX vector and scalar single argument instructions
780 Test VSX logic instructions
785 Test VSX scalar integer conversion instructions
797 Test VSX load/store dp to sp instructions
844 Test VSX vector and scalar two argument instructions
Dtest_isa_2_06_part2.stdout.exp1 Test VSX vector single arg instructions
21 Test VSX floating point compare and basic arithmetic instructions

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