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/external/vixl/test/aarch32/
Dtest-assembler-cond-rdlow-operand-imm8-t32.cc96 const TestData kTests[] = {{{al, r0, 0}, false, al, "al r0 0", "al_r0_0"},
97 {{al, r0, 1}, false, al, "al r0 1", "al_r0_1"},
98 {{al, r0, 2}, false, al, "al r0 2", "al_r0_2"},
99 {{al, r0, 3}, false, al, "al r0 3", "al_r0_3"},
100 {{al, r0, 4}, false, al, "al r0 4", "al_r0_4"},
101 {{al, r0, 5}, false, al, "al r0 5", "al_r0_5"},
102 {{al, r0, 6}, false, al, "al r0 6", "al_r0_6"},
103 {{al, r0, 7}, false, al, "al r0 7", "al_r0_7"},
104 {{al, r0, 8}, false, al, "al r0 8", "al_r0_8"},
105 {{al, r0, 9}, false, al, "al r0 9", "al_r0_9"},
[all …]
Dtest-assembler-cond-rd-operand-const-t32.cc102 {{{al, r0, 0x000001fe}, false, al, "al r0 0x000001fe", "al_r0_0x000001fe"},
103 {{al, r0, 0x000003fc}, false, al, "al r0 0x000003fc", "al_r0_0x000003fc"},
104 {{al, r0, 0x000007f8}, false, al, "al r0 0x000007f8", "al_r0_0x000007f8"},
105 {{al, r0, 0x00000ff0}, false, al, "al r0 0x00000ff0", "al_r0_0x00000ff0"},
106 {{al, r0, 0x00001fe0}, false, al, "al r0 0x00001fe0", "al_r0_0x00001fe0"},
107 {{al, r0, 0x00003fc0}, false, al, "al r0 0x00003fc0", "al_r0_0x00003fc0"},
108 {{al, r0, 0x00007f80}, false, al, "al r0 0x00007f80", "al_r0_0x00007f80"},
109 {{al, r0, 0x0000ff00}, false, al, "al r0 0x0000ff00", "al_r0_0x0000ff00"},
110 {{al, r0, 0x0001fe00}, false, al, "al r0 0x0001fe00", "al_r0_0x0001fe00"},
111 {{al, r0, 0x0003fc00}, false, al, "al r0 0x0003fc00", "al_r0_0x0003fc00"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm8.cc97 {{{al, r0, r0, 0}, false, al, "al r0 r0 0", "al_r0_r0_0"},
98 {{al, r0, r0, 1}, false, al, "al r0 r0 1", "al_r0_r0_1"},
99 {{al, r0, r0, 2}, false, al, "al r0 r0 2", "al_r0_r0_2"},
100 {{al, r0, r0, 3}, false, al, "al r0 r0 3", "al_r0_r0_3"},
101 {{al, r0, r0, 4}, false, al, "al r0 r0 4", "al_r0_r0_4"},
102 {{al, r0, r0, 5}, false, al, "al r0 r0 5", "al_r0_r0_5"},
103 {{al, r0, r0, 6}, false, al, "al r0 r0 6", "al_r0_r0_6"},
104 {{al, r0, r0, 7}, false, al, "al r0 r0 7", "al_r0_r0_7"},
105 {{al, r0, r0, 8}, false, al, "al r0 r0 8", "al_r0_r0_8"},
106 {{al, r0, r0, 9}, false, al, "al r0 r0 9", "al_r0_r0_9"},
[all …]
Dtest-assembler-cond-rd-operand-imm16-t32.cc97 {{{al, r0, 0x0000}, false, al, "al r0 0x0000", "al_r0_0x0000"},
98 {{al, r0, 0x0001}, false, al, "al r0 0x0001", "al_r0_0x0001"},
99 {{al, r0, 0x0002}, false, al, "al r0 0x0002", "al_r0_0x0002"},
100 {{al, r0, 0x0020}, false, al, "al r0 0x0020", "al_r0_0x0020"},
101 {{al, r0, 0x007d}, false, al, "al r0 0x007d", "al_r0_0x007d"},
102 {{al, r0, 0x007e}, false, al, "al r0 0x007e", "al_r0_0x007e"},
103 {{al, r0, 0x007f}, false, al, "al r0 0x007f", "al_r0_0x007f"},
104 {{al, r0, 0x7ffd}, false, al, "al r0 0x7ffd", "al_r0_0x7ffd"},
105 {{al, r0, 0x7ffe}, false, al, "al r0 0x7ffe", "al_r0_0x7ffe"},
106 {{al, r0, 0x7fff}, false, al, "al r0 0x7fff", "al_r0_0x7fff"},
[all …]
Dtest-assembler-cond-rd-pc-operand-imm8-t32.cc95 {{{al, r7, pc, 19}, false, al, "al r7 pc 19", "al_r7_pc_19"},
96 {{al, r6, pc, 78}, false, al, "al r6 pc 78", "al_r6_pc_78"},
97 {{al, r7, pc, 92}, false, al, "al r7 pc 92", "al_r7_pc_92"},
98 {{al, r7, pc, 195}, false, al, "al r7 pc 195", "al_r7_pc_195"},
99 {{al, r4, pc, 17}, false, al, "al r4 pc 17", "al_r4_pc_17"},
100 {{al, r6, pc, 150}, false, al, "al r6 pc 150", "al_r6_pc_150"},
101 {{al, r4, pc, 166}, false, al, "al r4 pc 166", "al_r4_pc_166"},
102 {{al, r1, pc, 63}, false, al, "al r1 pc 63", "al_r1_pc_63"},
103 {{al, r3, pc, 15}, false, al, "al r3 pc 15", "al_r3_pc_15"},
104 {{al, r6, pc, 49}, false, al, "al r6 pc 49", "al_r6_pc_49"},
[all …]
Dtest-assembler-cond-rd-pc-operand-imm12-t32.cc98 {{{al, r11, pc, 2982}, false, al, "al r11 pc 2982", "al_r11_pc_2982"},
99 {{al, r7, pc, 893}, false, al, "al r7 pc 893", "al_r7_pc_893"},
100 {{al, r12, pc, 3583}, false, al, "al r12 pc 3583", "al_r12_pc_3583"},
101 {{al, r8, pc, 1348}, false, al, "al r8 pc 1348", "al_r8_pc_1348"},
102 {{al, r13, pc, 1892}, false, al, "al r13 pc 1892", "al_r13_pc_1892"},
103 {{al, r9, pc, 2052}, false, al, "al r9 pc 2052", "al_r9_pc_2052"},
104 {{al, r2, pc, 2345}, false, al, "al r2 pc 2345", "al_r2_pc_2345"},
105 {{al, r6, pc, 1009}, false, al, "al r6 pc 1009", "al_r6_pc_1009"},
106 {{al, r12, pc, 2689}, false, al, "al r12 pc 2689", "al_r12_pc_2689"},
107 {{al, r5, pc, 2999}, false, al, "al r5 pc 2999", "al_r5_pc_2999"},
[all …]
Dtest-assembler-cond-rd-rn-operand-imm12-t32.cc99 {{{al, r12, r7, 1536}, false, al, "al r12 r7 1536", "al_r12_r7_1536"},
100 {{al, r7, r10, 1991}, false, al, "al r7 r10 1991", "al_r7_r10_1991"},
101 {{al, r13, r10, 3585}, false, al, "al r13 r10 3585", "al_r13_r10_3585"},
102 {{al, r8, r12, 3384}, false, al, "al r8 r12 3384", "al_r8_r12_3384"},
103 {{al, r14, r4, 3899}, false, al, "al r14 r4 3899", "al_r14_r4_3899"},
104 {{al, r10, r1, 3397}, false, al, "al r10 r1 3397", "al_r10_r1_3397"},
105 {{al, r2, r10, 3063}, false, al, "al r2 r10 3063", "al_r2_r10_3063"},
106 {{al, r6, r9, 3696}, false, al, "al r6 r9 3696", "al_r6_r9_3696"},
107 {{al, r13, r7, 606}, false, al, "al r13 r7 606", "al_r13_r7_606"},
108 {{al, r6, r1, 2016}, false, al, "al r6 r1 2016", "al_r6_r1_2016"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-operand-immediate-t32-imm3.cc97 {{{al, r0, r0, 0}, false, al, "al r0 r0 0", "al_r0_r0_0"},
98 {{al, r0, r0, 1}, false, al, "al r0 r0 1", "al_r0_r0_1"},
99 {{al, r0, r0, 2}, false, al, "al r0 r0 2", "al_r0_r0_2"},
100 {{al, r0, r0, 3}, false, al, "al r0 r0 3", "al_r0_r0_3"},
101 {{al, r0, r0, 4}, false, al, "al r0 r0 4", "al_r0_r0_4"},
102 {{al, r0, r0, 5}, false, al, "al r0 r0 5", "al_r0_r0_5"},
103 {{al, r0, r0, 6}, false, al, "al r0 r0 6", "al_r0_r0_6"},
104 {{al, r0, r0, 7}, false, al, "al r0 r0 7", "al_r0_r0_7"},
105 {{al, r0, r1, 0}, false, al, "al r0 r1 0", "al_r0_r1_0"},
106 {{al, r0, r1, 1}, false, al, "al r0 r1 1", "al_r0_r1_1"},
[all …]
Dtest-assembler-cond-rd-rn-operand-const-t32.cc114 const TestData kTests[] = {{{al, r13, r14, 0x02ac0000},
116 al,
119 {{al, r10, r1, 0x00156000},
121 al,
124 {{al, r10, r0, 0x000003fc},
126 al,
129 {{al, r1, r11, 0x2ac00000},
131 al,
134 {{al, r8, r6, 0x00156000},
136 al,
[all …]
Dtest-assembler-cond-rd-operand-rn-shift-amount-1to31-t32.cc104 {{al, r14, r8, ROR, 21}, false, al, "al r14 r8 ROR 21", "al_r14_r8_ROR_21"},
105 {{al, r5, r13, ROR, 4}, false, al, "al r5 r13 ROR 4", "al_r5_r13_ROR_4"},
106 {{al, r0, r3, ROR, 4}, false, al, "al r0 r3 ROR 4", "al_r0_r3_ROR_4"},
107 {{al, r3, r14, ROR, 7}, false, al, "al r3 r14 ROR 7", "al_r3_r14_ROR_7"},
108 {{al, r2, r6, LSL, 30}, false, al, "al r2 r6 LSL 30", "al_r2_r6_LSL_30"},
109 {{al, r11, r4, LSL, 26}, false, al, "al r11 r4 LSL 26", "al_r11_r4_LSL_26"},
110 {{al, r7, r0, LSL, 30}, false, al, "al r7 r0 LSL 30", "al_r7_r0_LSL_30"},
111 {{al, r0, r9, ROR, 17}, false, al, "al r0 r9 ROR 17", "al_r0_r9_ROR_17"},
112 {{al, r11, r3, ROR, 31}, false, al, "al r11 r3 ROR 31", "al_r11_r3_ROR_31"},
113 {{al, r8, r8, ROR, 20}, false, al, "al r8 r8 ROR 20", "al_r8_r8_ROR_20"},
[all …]
Dtest-assembler-cond-rd-operand-rn-ror-amount-t32.cc102 {{al, r0, r0, ROR, 0}, false, al, "al r0 r0 ROR 0", "al_r0_r0_ROR_0"},
103 {{al, r0, r0, ROR, 8}, false, al, "al r0 r0 ROR 8", "al_r0_r0_ROR_8"},
104 {{al, r0, r0, ROR, 16}, false, al, "al r0 r0 ROR 16", "al_r0_r0_ROR_16"},
105 {{al, r0, r0, ROR, 24}, false, al, "al r0 r0 ROR 24", "al_r0_r0_ROR_24"},
106 {{al, r0, r1, ROR, 0}, false, al, "al r0 r1 ROR 0", "al_r0_r1_ROR_0"},
107 {{al, r0, r1, ROR, 8}, false, al, "al r0 r1 ROR 8", "al_r0_r1_ROR_8"},
108 {{al, r0, r1, ROR, 16}, false, al, "al r0 r1 ROR 16", "al_r0_r1_ROR_16"},
109 {{al, r0, r1, ROR, 24}, false, al, "al r0 r1 ROR 24", "al_r0_r1_ROR_24"},
110 {{al, r0, r2, ROR, 0}, false, al, "al r0 r2 ROR 0", "al_r0_r2_ROR_0"},
111 {{al, r0, r2, ROR, 8}, false, al, "al r0 r2 ROR 8", "al_r0_r2_ROR_8"},
[all …]
Dtest-assembler-cond-rd-sp-operand-imm8-t32.cc95 {{{al, r0, sp, 0x0}, false, al, "al r0 sp 0x0", "al_r0_sp_0x0"},
96 {{al, r0, sp, 0x4}, false, al, "al r0 sp 0x4", "al_r0_sp_0x4"},
97 {{al, r0, sp, 0x8}, false, al, "al r0 sp 0x8", "al_r0_sp_0x8"},
98 {{al, r0, sp, 0xc}, false, al, "al r0 sp 0xc", "al_r0_sp_0xc"},
99 {{al, r0, sp, 0x10}, false, al, "al r0 sp 0x10", "al_r0_sp_0x10"},
100 {{al, r0, sp, 0x14}, false, al, "al r0 sp 0x14", "al_r0_sp_0x14"},
101 {{al, r0, sp, 0x18}, false, al, "al r0 sp 0x18", "al_r0_sp_0x18"},
102 {{al, r0, sp, 0x1c}, false, al, "al r0 sp 0x1c", "al_r0_sp_0x1c"},
103 {{al, r0, sp, 0x20}, false, al, "al r0 sp 0x20", "al_r0_sp_0x20"},
104 {{al, r0, sp, 0x24}, false, al, "al r0 sp 0x24", "al_r0_sp_0x24"},
[all …]
Dtest-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc104 {{al, r7, r7, LSR, 5}, false, al, "al r7 r7 LSR 5", "al_r7_r7_LSR_5"},
105 {{al, r0, r3, ASR, 30}, false, al, "al r0 r3 ASR 30", "al_r0_r3_ASR_30"},
106 {{al, r10, r5, ASR, 31}, false, al, "al r10 r5 ASR 31", "al_r10_r5_ASR_31"},
107 {{al, r12, r9, ASR, 16}, false, al, "al r12 r9 ASR 16", "al_r12_r9_ASR_16"},
108 {{al, r5, r3, ASR, 31}, false, al, "al r5 r3 ASR 31", "al_r5_r3_ASR_31"},
109 {{al, r10, r8, ASR, 10}, false, al, "al r10 r8 ASR 10", "al_r10_r8_ASR_10"},
110 {{al, r6, r7, LSR, 11}, false, al, "al r6 r7 LSR 11", "al_r6_r7_LSR_11"},
111 {{al, r13, r12, ASR, 31},
113 al,
116 {{al, r4, r0, ASR, 22}, false, al, "al r4 r0 ASR 22", "al_r4_r0_ASR_22"},
[all …]
Dtest-assembler-cond-rd-rn-t32.cc101 {{{al, r0, r0}, false, al, "al r0 r0", "al_r0_r0"},
102 {{al, r0, r1}, false, al, "al r0 r1", "al_r0_r1"},
103 {{al, r0, r2}, false, al, "al r0 r2", "al_r0_r2"},
104 {{al, r0, r3}, false, al, "al r0 r3", "al_r0_r3"},
105 {{al, r0, r4}, false, al, "al r0 r4", "al_r0_r4"},
106 {{al, r0, r5}, false, al, "al r0 r5", "al_r0_r5"},
107 {{al, r0, r6}, false, al, "al r0 r6", "al_r0_r6"},
108 {{al, r0, r7}, false, al, "al r0 r7", "al_r0_r7"},
109 {{al, r0, r8}, false, al, "al r0 r8", "al_r0_r8"},
110 {{al, r0, r9}, false, al, "al r0 r9", "al_r0_r9"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-t32.cc129 {{{al, r12, r9, r11}, false, al, "al r12 r9 r11", "al_r12_r9_r11"},
130 {{al, r3, r4, r10}, false, al, "al r3 r4 r10", "al_r3_r4_r10"},
131 {{al, r2, r0, r12}, false, al, "al r2 r0 r12", "al_r2_r0_r12"},
132 {{al, r9, r9, r13}, false, al, "al r9 r9 r13", "al_r9_r9_r13"},
133 {{al, r11, r2, r4}, false, al, "al r11 r2 r4", "al_r11_r2_r4"},
134 {{al, r7, r3, r7}, false, al, "al r7 r3 r7", "al_r7_r3_r7"},
135 {{al, r11, r6, r9}, false, al, "al r11 r6 r9", "al_r11_r6_r9"},
136 {{al, r8, r7, r11}, false, al, "al r8 r7 r11", "al_r8_r7_r11"},
137 {{al, r14, r12, r14}, false, al, "al r14 r12 r14", "al_r14_r12_r14"},
138 {{al, r8, r5, r8}, false, al, "al r8 r5 r8", "al_r8_r5_r8"},
[all …]
Dtest-assembler-cond-rd-operand-rn-t32.cc108 {{{al, r0, r0}, false, al, "al r0 r0", "al_r0_r0"},
109 {{al, r0, r1}, false, al, "al r0 r1", "al_r0_r1"},
110 {{al, r0, r2}, false, al, "al r0 r2", "al_r0_r2"},
111 {{al, r0, r3}, false, al, "al r0 r3", "al_r0_r3"},
112 {{al, r0, r4}, false, al, "al r0 r4", "al_r0_r4"},
113 {{al, r0, r5}, false, al, "al r0 r5", "al_r0_r5"},
114 {{al, r0, r6}, false, al, "al r0 r6", "al_r0_r6"},
115 {{al, r0, r7}, false, al, "al r0 r7", "al_r0_r7"},
116 {{al, r0, r8}, false, al, "al r0 r8", "al_r0_r8"},
117 {{al, r0, r9}, false, al, "al r0 r9", "al_r0_r9"},
[all …]
Dtest-assembler-cond-rd-operand-rn-shift-rs-t32.cc98 {{al, r11, r2, ASR, r10},
100 al,
103 {{al, r7, r8, ASR, r12}, false, al, "al r7 r8 ASR r12", "al_r7_r8_ASR_r12"},
104 {{al, r10, r8, ASR, r4}, false, al, "al r10 r8 ASR r4", "al_r10_r8_ASR_r4"},
105 {{al, r12, r7, LSR, r12},
107 al,
110 {{al, r13, r4, ASR, r5}, false, al, "al r13 r4 ASR r5", "al_r13_r4_ASR_r5"},
111 {{al, r12, r3, ROR, r5}, false, al, "al r12 r3 ROR r5", "al_r12_r3_ROR_r5"},
112 {{al, r6, r11, ASR, r8}, false, al, "al r6 r11 ASR r8", "al_r6_r11_ASR_r8"},
113 {{al, r8, r4, ASR, r4}, false, al, "al r8 r4 ASR r4", "al_r8_r4_ASR_r4"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc102 const TestData kTests[] = {{{al, r4, r0, r8, ROR, 16},
104 al,
107 {{al, r14, r13, r12, ROR, 24},
109 al,
112 {{al, r9, r10, r5, ROR, 16},
114 al,
117 {{al, r11, r13, r14, ROR, 8},
119 al,
122 {{al, r3, r12, r11, ROR, 16},
124 al,
[all …]
Dtest-assembler-cond-rd-memop-immediate-512-a32.cc102 al,
107 al,
112 al,
117 al,
122 al,
125 {{al, r4, r13, plus, 0, Offset},
127 al,
132 al,
137 al,
142 al,
[all …]
Dtest-assembler-cond-rd-memop-immediate-8192-a32.cc102 al,
107 al,
112 al,
117 al,
122 al,
125 {{al, r4, r13, plus, 0, Offset},
127 al,
132 al,
137 al,
142 al,
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc116 const TestData kTests[] = {{{al, r12, r4, r7, LSL, 7},
118 al,
121 {{al, r7, r8, r10, ROR, 21},
123 al,
126 {{al, r5, r5, r3, ROR, 12},
128 al,
131 {{al, r14, r13, r10, LSL, 22},
133 al,
136 {{al, r9, r10, r11, ROR, 2},
138 al,
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc116 const TestData kTests[] = {{{al, r11, r13, r10, ASR, 9},
118 al,
121 {{al, r7, r5, r2, ASR, 2},
123 al,
126 {{al, r5, r2, r11, LSR, 5},
128 al,
131 {{al, r14, r6, r10, LSR, 32},
133 al,
136 {{al, r9, r6, r3, LSR, 13},
138 al,
[all …]
Dtest-assembler-cond-rd-rn-rm-t32.cc152 {{{al, r5, r12, r2}, false, al, "al r5 r12 r2", "al_r5_r12_r2"},
153 {{al, r7, r3, r12}, false, al, "al r7 r3 r12", "al_r7_r3_r12"},
154 {{al, r1, r2, r10}, false, al, "al r1 r2 r10", "al_r1_r2_r10"},
155 {{al, r2, r7, r1}, false, al, "al r2 r7 r1", "al_r2_r7_r1"},
156 {{al, r11, r9, r0}, false, al, "al r11 r9 r0", "al_r11_r9_r0"},
157 {{al, r6, r9, r10}, false, al, "al r6 r9 r10", "al_r6_r9_r10"},
158 {{al, r0, r5, r0}, false, al, "al r0 r5 r0", "al_r0_r5_r0"},
159 {{al, r4, r6, r6}, false, al, "al r4 r6 r6", "al_r4_r6_r6"},
160 {{al, r1, r13, r1}, false, al, "al r1 r13 r1", "al_r1_r13_r1"},
161 {{al, r8, r14, r8}, false, al, "al r8 r14 r8", "al_r8_r14_r8"},
[all …]
Dtest-assembler-cond-rd-operand-const-a32-cannot-use-pc.cc98 {{{ls, r0, 0x003fc000}, false, al, "ls r0 0x003fc000", "ls_r0_0x003fc000"},
101 al,
105 {{al, r0, 0x0002ac00}, false, al, "al r0 0x0002ac00", "al_r0_0x0002ac00"},
108 al,
112 {{mi, r3, 0x000002ac}, false, al, "mi r3 0x000002ac", "mi_r3_0x000002ac"},
113 {{ls, r0, 0x000000ff}, false, al, "ls r0 0x000000ff", "ls_r0_0x000000ff"},
114 {{ls, r7, 0x0000ab00}, false, al, "ls r7 0x0000ab00", "ls_r7_0x0000ab00"},
117 al,
121 {{vs, r5, 0xc000003f}, false, al, "vs r5 0xc000003f", "vs_r5_0xc000003f"},
122 {{gt, r3, 0x00ab0000}, false, al, "gt r3 0x00ab0000", "gt_r3_0x00ab0000"},
[all …]
Dtest-assembler-cond-rd-operand-const-a32-can-use-pc.cc100 al,
106 al,
110 {{pl, r4, 0x00003fc0}, false, al, "pl r4 0x00003fc0", "pl_r4_0x00003fc0"},
113 al,
119 al,
125 al,
129 {{al, r6, 0x002ac000}, false, al, "al r6 0x002ac000", "al_r6_0x002ac000"},
130 {{pl, r2, 0x0002ac00}, false, al, "pl r2 0x0002ac00", "pl_r2_0x0002ac00"},
131 {{mi, r8, 0x00000000}, false, al, "mi r8 0x00000000", "mi_r8_0x00000000"},
134 al,
[all …]

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