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1 // Copyright 2016, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 
28 // -----------------------------------------------------------------------------
29 // This file is auto generated from the
30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using
31 // tools/generate_tests.py.
32 //
33 // PLEASE DO NOT EDIT.
34 // -----------------------------------------------------------------------------
35 
36 
37 #include "test-runner.h"
38 
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
41 
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
44 
45 #define BUF_SIZE (4096)
46 
47 namespace vixl {
48 namespace aarch32 {
49 
50 // List of instruction mnemonics.
51 #define FOREACH_INSTRUCTION(M) \
52   M(adc)                       \
53   M(adcs)                      \
54   M(add)                       \
55   M(adds)                      \
56   M(and_)                      \
57   M(ands)                      \
58   M(bic)                       \
59   M(bics)                      \
60   M(eor)                       \
61   M(eors)                      \
62   M(orn)                       \
63   M(orns)                      \
64   M(orr)                       \
65   M(orrs)                      \
66   M(rsb)                       \
67   M(rsbs)                      \
68   M(sbc)                       \
69   M(sbcs)                      \
70   M(sub)                       \
71   M(subs)
72 
73 
74 // The following definitions are defined again in each generated test, therefore
75 // we need to place them in an anomymous namespace. It expresses that they are
76 // local to this file only, and the compiler is not allowed to share these types
77 // across test files during template instantiation. Specifically, `Operands` has
78 // various layouts across generated tests so it absolutely cannot be shared.
79 
80 #ifdef VIXL_INCLUDE_TARGET_T32
81 namespace {
82 
83 // Values to be passed to the assembler to produce the instruction under test.
84 struct Operands {
85   Condition cond;
86   Register rd;
87   Register rn;
88   Register rm;
89   ShiftType shift;
90   uint32_t amount;
91 };
92 
93 // This structure contains all data needed to test one specific
94 // instruction.
95 struct TestData {
96   // The `operands` field represents what to pass to the assembler to
97   // produce the instruction.
98   Operands operands;
99   // True if we need to generate an IT instruction for this test to be valid.
100   bool in_it_block;
101   // The condition to give the IT instruction, this will be set to "al" by
102   // default.
103   Condition it_condition;
104   // Description of the operands, used for error reporting.
105   const char* operands_description;
106   // Unique identifier, used for generating traces.
107   const char* identifier;
108 };
109 
110 struct TestResult {
111   size_t size;
112   const byte* encoding;
113 };
114 
115 // Each element of this array produce one instruction encoding.
116 const TestData kTests[] = {{{al, r11, r13, r10, ASR, 9},
117                             false,
118                             al,
119                             "al r11 r13 r10 ASR 9",
120                             "al_r11_r13_r10_ASR_9"},
121                            {{al, r7, r5, r2, ASR, 2},
122                             false,
123                             al,
124                             "al r7 r5 r2 ASR 2",
125                             "al_r7_r5_r2_ASR_2"},
126                            {{al, r5, r2, r11, LSR, 5},
127                             false,
128                             al,
129                             "al r5 r2 r11 LSR 5",
130                             "al_r5_r2_r11_LSR_5"},
131                            {{al, r14, r6, r10, LSR, 32},
132                             false,
133                             al,
134                             "al r14 r6 r10 LSR 32",
135                             "al_r14_r6_r10_LSR_32"},
136                            {{al, r9, r6, r3, LSR, 13},
137                             false,
138                             al,
139                             "al r9 r6 r3 LSR 13",
140                             "al_r9_r6_r3_LSR_13"},
141                            {{al, r14, r4, r6, LSR, 31},
142                             false,
143                             al,
144                             "al r14 r4 r6 LSR 31",
145                             "al_r14_r4_r6_LSR_31"},
146                            {{al, r2, r1, r7, LSR, 14},
147                             false,
148                             al,
149                             "al r2 r1 r7 LSR 14",
150                             "al_r2_r1_r7_LSR_14"},
151                            {{al, r2, r9, r12, LSR, 24},
152                             false,
153                             al,
154                             "al r2 r9 r12 LSR 24",
155                             "al_r2_r9_r12_LSR_24"},
156                            {{al, r10, r12, r4, ASR, 2},
157                             false,
158                             al,
159                             "al r10 r12 r4 ASR 2",
160                             "al_r10_r12_r4_ASR_2"},
161                            {{al, r6, r10, r0, LSR, 8},
162                             false,
163                             al,
164                             "al r6 r10 r0 LSR 8",
165                             "al_r6_r10_r0_LSR_8"},
166                            {{al, r12, r11, r4, ASR, 7},
167                             false,
168                             al,
169                             "al r12 r11 r4 ASR 7",
170                             "al_r12_r11_r4_ASR_7"},
171                            {{al, r9, r4, r8, ASR, 27},
172                             false,
173                             al,
174                             "al r9 r4 r8 ASR 27",
175                             "al_r9_r4_r8_ASR_27"},
176                            {{al, r2, r10, r11, ASR, 1},
177                             false,
178                             al,
179                             "al r2 r10 r11 ASR 1",
180                             "al_r2_r10_r11_ASR_1"},
181                            {{al, r0, r2, r9, ASR, 24},
182                             false,
183                             al,
184                             "al r0 r2 r9 ASR 24",
185                             "al_r0_r2_r9_ASR_24"},
186                            {{al, r11, r6, r14, ASR, 31},
187                             false,
188                             al,
189                             "al r11 r6 r14 ASR 31",
190                             "al_r11_r6_r14_ASR_31"},
191                            {{al, r2, r14, r14, ASR, 18},
192                             false,
193                             al,
194                             "al r2 r14 r14 ASR 18",
195                             "al_r2_r14_r14_ASR_18"},
196                            {{al, r5, r7, r1, ASR, 2},
197                             false,
198                             al,
199                             "al r5 r7 r1 ASR 2",
200                             "al_r5_r7_r1_ASR_2"},
201                            {{al, r1, r14, r7, LSR, 18},
202                             false,
203                             al,
204                             "al r1 r14 r7 LSR 18",
205                             "al_r1_r14_r7_LSR_18"},
206                            {{al, r7, r7, r1, ASR, 4},
207                             false,
208                             al,
209                             "al r7 r7 r1 ASR 4",
210                             "al_r7_r7_r1_ASR_4"},
211                            {{al, r14, r5, r12, LSR, 1},
212                             false,
213                             al,
214                             "al r14 r5 r12 LSR 1",
215                             "al_r14_r5_r12_LSR_1"},
216                            {{al, r2, r11, r10, ASR, 23},
217                             false,
218                             al,
219                             "al r2 r11 r10 ASR 23",
220                             "al_r2_r11_r10_ASR_23"},
221                            {{al, r5, r0, r10, ASR, 3},
222                             false,
223                             al,
224                             "al r5 r0 r10 ASR 3",
225                             "al_r5_r0_r10_ASR_3"},
226                            {{al, r9, r13, r9, ASR, 6},
227                             false,
228                             al,
229                             "al r9 r13 r9 ASR 6",
230                             "al_r9_r13_r9_ASR_6"},
231                            {{al, r6, r10, r13, ASR, 24},
232                             false,
233                             al,
234                             "al r6 r10 r13 ASR 24",
235                             "al_r6_r10_r13_ASR_24"},
236                            {{al, r9, r3, r14, LSR, 30},
237                             false,
238                             al,
239                             "al r9 r3 r14 LSR 30",
240                             "al_r9_r3_r14_LSR_30"},
241                            {{al, r11, r14, r11, LSR, 24},
242                             false,
243                             al,
244                             "al r11 r14 r11 LSR 24",
245                             "al_r11_r14_r11_LSR_24"},
246                            {{al, r11, r3, r4, ASR, 7},
247                             false,
248                             al,
249                             "al r11 r3 r4 ASR 7",
250                             "al_r11_r3_r4_ASR_7"},
251                            {{al, r14, r13, r10, ASR, 1},
252                             false,
253                             al,
254                             "al r14 r13 r10 ASR 1",
255                             "al_r14_r13_r10_ASR_1"},
256                            {{al, r0, r9, r0, LSR, 2},
257                             false,
258                             al,
259                             "al r0 r9 r0 LSR 2",
260                             "al_r0_r9_r0_LSR_2"},
261                            {{al, r2, r1, r7, ASR, 15},
262                             false,
263                             al,
264                             "al r2 r1 r7 ASR 15",
265                             "al_r2_r1_r7_ASR_15"},
266                            {{al, r8, r14, r5, LSR, 27},
267                             false,
268                             al,
269                             "al r8 r14 r5 LSR 27",
270                             "al_r8_r14_r5_LSR_27"},
271                            {{al, r9, r14, r13, ASR, 21},
272                             false,
273                             al,
274                             "al r9 r14 r13 ASR 21",
275                             "al_r9_r14_r13_ASR_21"},
276                            {{al, r11, r14, r14, ASR, 3},
277                             false,
278                             al,
279                             "al r11 r14 r14 ASR 3",
280                             "al_r11_r14_r14_ASR_3"},
281                            {{al, r6, r3, r6, LSR, 23},
282                             false,
283                             al,
284                             "al r6 r3 r6 LSR 23",
285                             "al_r6_r3_r6_LSR_23"},
286                            {{al, r14, r8, r11, LSR, 6},
287                             false,
288                             al,
289                             "al r14 r8 r11 LSR 6",
290                             "al_r14_r8_r11_LSR_6"},
291                            {{al, r5, r3, r3, LSR, 8},
292                             false,
293                             al,
294                             "al r5 r3 r3 LSR 8",
295                             "al_r5_r3_r3_LSR_8"},
296                            {{al, r12, r6, r1, LSR, 6},
297                             false,
298                             al,
299                             "al r12 r6 r1 LSR 6",
300                             "al_r12_r6_r1_LSR_6"},
301                            {{al, r5, r0, r9, LSR, 30},
302                             false,
303                             al,
304                             "al r5 r0 r9 LSR 30",
305                             "al_r5_r0_r9_LSR_30"},
306                            {{al, r4, r9, r3, ASR, 17},
307                             false,
308                             al,
309                             "al r4 r9 r3 ASR 17",
310                             "al_r4_r9_r3_ASR_17"},
311                            {{al, r12, r2, r4, ASR, 20},
312                             false,
313                             al,
314                             "al r12 r2 r4 ASR 20",
315                             "al_r12_r2_r4_ASR_20"},
316                            {{al, r2, r9, r13, ASR, 25},
317                             false,
318                             al,
319                             "al r2 r9 r13 ASR 25",
320                             "al_r2_r9_r13_ASR_25"},
321                            {{al, r11, r5, r12, LSR, 10},
322                             false,
323                             al,
324                             "al r11 r5 r12 LSR 10",
325                             "al_r11_r5_r12_LSR_10"},
326                            {{al, r4, r13, r12, LSR, 22},
327                             false,
328                             al,
329                             "al r4 r13 r12 LSR 22",
330                             "al_r4_r13_r12_LSR_22"},
331                            {{al, r2, r4, r6, LSR, 11},
332                             false,
333                             al,
334                             "al r2 r4 r6 LSR 11",
335                             "al_r2_r4_r6_LSR_11"},
336                            {{al, r8, r4, r1, LSR, 22},
337                             false,
338                             al,
339                             "al r8 r4 r1 LSR 22",
340                             "al_r8_r4_r1_LSR_22"},
341                            {{al, r6, r12, r10, LSR, 31},
342                             false,
343                             al,
344                             "al r6 r12 r10 LSR 31",
345                             "al_r6_r12_r10_LSR_31"},
346                            {{al, r10, r0, r2, ASR, 7},
347                             false,
348                             al,
349                             "al r10 r0 r2 ASR 7",
350                             "al_r10_r0_r2_ASR_7"},
351                            {{al, r14, r6, r13, ASR, 21},
352                             false,
353                             al,
354                             "al r14 r6 r13 ASR 21",
355                             "al_r14_r6_r13_ASR_21"},
356                            {{al, r7, r14, r13, LSR, 4},
357                             false,
358                             al,
359                             "al r7 r14 r13 LSR 4",
360                             "al_r7_r14_r13_LSR_4"},
361                            {{al, r1, r10, r12, ASR, 2},
362                             false,
363                             al,
364                             "al r1 r10 r12 ASR 2",
365                             "al_r1_r10_r12_ASR_2"},
366                            {{al, r0, r2, r10, LSR, 7},
367                             false,
368                             al,
369                             "al r0 r2 r10 LSR 7",
370                             "al_r0_r2_r10_LSR_7"},
371                            {{al, r0, r1, r11, LSR, 17},
372                             false,
373                             al,
374                             "al r0 r1 r11 LSR 17",
375                             "al_r0_r1_r11_LSR_17"},
376                            {{al, r4, r13, r2, ASR, 25},
377                             false,
378                             al,
379                             "al r4 r13 r2 ASR 25",
380                             "al_r4_r13_r2_ASR_25"},
381                            {{al, r1, r4, r14, LSR, 7},
382                             false,
383                             al,
384                             "al r1 r4 r14 LSR 7",
385                             "al_r1_r4_r14_LSR_7"},
386                            {{al, r5, r8, r4, ASR, 19},
387                             false,
388                             al,
389                             "al r5 r8 r4 ASR 19",
390                             "al_r5_r8_r4_ASR_19"},
391                            {{al, r4, r3, r8, ASR, 12},
392                             false,
393                             al,
394                             "al r4 r3 r8 ASR 12",
395                             "al_r4_r3_r8_ASR_12"},
396                            {{al, r2, r4, r13, ASR, 12},
397                             false,
398                             al,
399                             "al r2 r4 r13 ASR 12",
400                             "al_r2_r4_r13_ASR_12"},
401                            {{al, r8, r9, r2, LSR, 20},
402                             false,
403                             al,
404                             "al r8 r9 r2 LSR 20",
405                             "al_r8_r9_r2_LSR_20"},
406                            {{al, r10, r6, r3, ASR, 21},
407                             false,
408                             al,
409                             "al r10 r6 r3 ASR 21",
410                             "al_r10_r6_r3_ASR_21"},
411                            {{al, r2, r7, r7, ASR, 3},
412                             false,
413                             al,
414                             "al r2 r7 r7 ASR 3",
415                             "al_r2_r7_r7_ASR_3"},
416                            {{al, r8, r7, r7, LSR, 19},
417                             false,
418                             al,
419                             "al r8 r7 r7 LSR 19",
420                             "al_r8_r7_r7_LSR_19"},
421                            {{al, r7, r9, r4, LSR, 3},
422                             false,
423                             al,
424                             "al r7 r9 r4 LSR 3",
425                             "al_r7_r9_r4_LSR_3"},
426                            {{al, r1, r7, r3, ASR, 2},
427                             false,
428                             al,
429                             "al r1 r7 r3 ASR 2",
430                             "al_r1_r7_r3_ASR_2"},
431                            {{al, r1, r2, r3, ASR, 5},
432                             false,
433                             al,
434                             "al r1 r2 r3 ASR 5",
435                             "al_r1_r2_r3_ASR_5"},
436                            {{al, r12, r4, r1, ASR, 5},
437                             false,
438                             al,
439                             "al r12 r4 r1 ASR 5",
440                             "al_r12_r4_r1_ASR_5"},
441                            {{al, r4, r2, r10, ASR, 1},
442                             false,
443                             al,
444                             "al r4 r2 r10 ASR 1",
445                             "al_r4_r2_r10_ASR_1"},
446                            {{al, r10, r5, r11, LSR, 3},
447                             false,
448                             al,
449                             "al r10 r5 r11 LSR 3",
450                             "al_r10_r5_r11_LSR_3"},
451                            {{al, r5, r9, r1, ASR, 8},
452                             false,
453                             al,
454                             "al r5 r9 r1 ASR 8",
455                             "al_r5_r9_r1_ASR_8"},
456                            {{al, r6, r11, r3, LSR, 28},
457                             false,
458                             al,
459                             "al r6 r11 r3 LSR 28",
460                             "al_r6_r11_r3_LSR_28"},
461                            {{al, r9, r13, r6, LSR, 22},
462                             false,
463                             al,
464                             "al r9 r13 r6 LSR 22",
465                             "al_r9_r13_r6_LSR_22"},
466                            {{al, r10, r13, r1, LSR, 30},
467                             false,
468                             al,
469                             "al r10 r13 r1 LSR 30",
470                             "al_r10_r13_r1_LSR_30"},
471                            {{al, r9, r1, r4, ASR, 26},
472                             false,
473                             al,
474                             "al r9 r1 r4 ASR 26",
475                             "al_r9_r1_r4_ASR_26"},
476                            {{al, r4, r4, r4, ASR, 21},
477                             false,
478                             al,
479                             "al r4 r4 r4 ASR 21",
480                             "al_r4_r4_r4_ASR_21"},
481                            {{al, r9, r5, r11, ASR, 19},
482                             false,
483                             al,
484                             "al r9 r5 r11 ASR 19",
485                             "al_r9_r5_r11_ASR_19"},
486                            {{al, r8, r11, r5, LSR, 30},
487                             false,
488                             al,
489                             "al r8 r11 r5 LSR 30",
490                             "al_r8_r11_r5_LSR_30"},
491                            {{al, r4, r10, r4, LSR, 23},
492                             false,
493                             al,
494                             "al r4 r10 r4 LSR 23",
495                             "al_r4_r10_r4_LSR_23"},
496                            {{al, r7, r6, r2, LSR, 32},
497                             false,
498                             al,
499                             "al r7 r6 r2 LSR 32",
500                             "al_r7_r6_r2_LSR_32"},
501                            {{al, r4, r14, r12, LSR, 7},
502                             false,
503                             al,
504                             "al r4 r14 r12 LSR 7",
505                             "al_r4_r14_r12_LSR_7"},
506                            {{al, r5, r2, r9, LSR, 7},
507                             false,
508                             al,
509                             "al r5 r2 r9 LSR 7",
510                             "al_r5_r2_r9_LSR_7"},
511                            {{al, r2, r14, r1, ASR, 6},
512                             false,
513                             al,
514                             "al r2 r14 r1 ASR 6",
515                             "al_r2_r14_r1_ASR_6"},
516                            {{al, r14, r13, r11, LSR, 12},
517                             false,
518                             al,
519                             "al r14 r13 r11 LSR 12",
520                             "al_r14_r13_r11_LSR_12"},
521                            {{al, r8, r8, r6, ASR, 5},
522                             false,
523                             al,
524                             "al r8 r8 r6 ASR 5",
525                             "al_r8_r8_r6_ASR_5"},
526                            {{al, r14, r10, r12, LSR, 13},
527                             false,
528                             al,
529                             "al r14 r10 r12 LSR 13",
530                             "al_r14_r10_r12_LSR_13"},
531                            {{al, r3, r6, r7, LSR, 31},
532                             false,
533                             al,
534                             "al r3 r6 r7 LSR 31",
535                             "al_r3_r6_r7_LSR_31"},
536                            {{al, r8, r1, r9, ASR, 2},
537                             false,
538                             al,
539                             "al r8 r1 r9 ASR 2",
540                             "al_r8_r1_r9_ASR_2"},
541                            {{al, r9, r12, r12, ASR, 21},
542                             false,
543                             al,
544                             "al r9 r12 r12 ASR 21",
545                             "al_r9_r12_r12_ASR_21"},
546                            {{al, r13, r4, r12, LSR, 14},
547                             false,
548                             al,
549                             "al r13 r4 r12 LSR 14",
550                             "al_r13_r4_r12_LSR_14"},
551                            {{al, r2, r11, r12, LSR, 18},
552                             false,
553                             al,
554                             "al r2 r11 r12 LSR 18",
555                             "al_r2_r11_r12_LSR_18"},
556                            {{al, r9, r3, r0, ASR, 31},
557                             false,
558                             al,
559                             "al r9 r3 r0 ASR 31",
560                             "al_r9_r3_r0_ASR_31"},
561                            {{al, r13, r6, r12, LSR, 6},
562                             false,
563                             al,
564                             "al r13 r6 r12 LSR 6",
565                             "al_r13_r6_r12_LSR_6"},
566                            {{al, r1, r1, r7, LSR, 3},
567                             false,
568                             al,
569                             "al r1 r1 r7 LSR 3",
570                             "al_r1_r1_r7_LSR_3"},
571                            {{al, r0, r13, r9, ASR, 1},
572                             false,
573                             al,
574                             "al r0 r13 r9 ASR 1",
575                             "al_r0_r13_r9_ASR_1"},
576                            {{al, r2, r1, r3, LSR, 12},
577                             false,
578                             al,
579                             "al r2 r1 r3 LSR 12",
580                             "al_r2_r1_r3_LSR_12"},
581                            {{al, r12, r6, r10, ASR, 1},
582                             false,
583                             al,
584                             "al r12 r6 r10 ASR 1",
585                             "al_r12_r6_r10_ASR_1"},
586                            {{al, r12, r4, r3, ASR, 4},
587                             false,
588                             al,
589                             "al r12 r4 r3 ASR 4",
590                             "al_r12_r4_r3_ASR_4"},
591                            {{al, r7, r0, r5, LSR, 25},
592                             false,
593                             al,
594                             "al r7 r0 r5 LSR 25",
595                             "al_r7_r0_r5_LSR_25"},
596                            {{al, r4, r5, r12, LSR, 20},
597                             false,
598                             al,
599                             "al r4 r5 r12 LSR 20",
600                             "al_r4_r5_r12_LSR_20"},
601                            {{al, r3, r5, r11, LSR, 24},
602                             false,
603                             al,
604                             "al r3 r5 r11 LSR 24",
605                             "al_r3_r5_r11_LSR_24"},
606                            {{al, r5, r8, r10, LSR, 25},
607                             false,
608                             al,
609                             "al r5 r8 r10 LSR 25",
610                             "al_r5_r8_r10_LSR_25"},
611                            {{al, r11, r9, r12, LSR, 24},
612                             false,
613                             al,
614                             "al r11 r9 r12 LSR 24",
615                             "al_r11_r9_r12_LSR_24"},
616                            {{al, r13, r11, r13, LSR, 20},
617                             false,
618                             al,
619                             "al r13 r11 r13 LSR 20",
620                             "al_r13_r11_r13_LSR_20"},
621                            {{al, r12, r4, r3, ASR, 32},
622                             false,
623                             al,
624                             "al r12 r4 r3 ASR 32",
625                             "al_r12_r4_r3_ASR_32"},
626                            {{al, r3, r6, r11, ASR, 13},
627                             false,
628                             al,
629                             "al r3 r6 r11 ASR 13",
630                             "al_r3_r6_r11_ASR_13"},
631                            {{al, r13, r9, r7, LSR, 27},
632                             false,
633                             al,
634                             "al r13 r9 r7 LSR 27",
635                             "al_r13_r9_r7_LSR_27"},
636                            {{al, r13, r9, r6, LSR, 24},
637                             false,
638                             al,
639                             "al r13 r9 r6 LSR 24",
640                             "al_r13_r9_r6_LSR_24"},
641                            {{al, r6, r13, r3, ASR, 1},
642                             false,
643                             al,
644                             "al r6 r13 r3 ASR 1",
645                             "al_r6_r13_r3_ASR_1"},
646                            {{al, r8, r7, r14, ASR, 27},
647                             false,
648                             al,
649                             "al r8 r7 r14 ASR 27",
650                             "al_r8_r7_r14_ASR_27"},
651                            {{al, r8, r8, r8, LSR, 29},
652                             false,
653                             al,
654                             "al r8 r8 r8 LSR 29",
655                             "al_r8_r8_r8_LSR_29"},
656                            {{al, r1, r13, r4, ASR, 26},
657                             false,
658                             al,
659                             "al r1 r13 r4 ASR 26",
660                             "al_r1_r13_r4_ASR_26"},
661                            {{al, r3, r2, r10, LSR, 16},
662                             false,
663                             al,
664                             "al r3 r2 r10 LSR 16",
665                             "al_r3_r2_r10_LSR_16"},
666                            {{al, r2, r11, r9, ASR, 29},
667                             false,
668                             al,
669                             "al r2 r11 r9 ASR 29",
670                             "al_r2_r11_r9_ASR_29"},
671                            {{al, r12, r9, r8, LSR, 7},
672                             false,
673                             al,
674                             "al r12 r9 r8 LSR 7",
675                             "al_r12_r9_r8_LSR_7"},
676                            {{al, r6, r2, r0, LSR, 4},
677                             false,
678                             al,
679                             "al r6 r2 r0 LSR 4",
680                             "al_r6_r2_r0_LSR_4"},
681                            {{al, r12, r2, r11, LSR, 8},
682                             false,
683                             al,
684                             "al r12 r2 r11 LSR 8",
685                             "al_r12_r2_r11_LSR_8"},
686                            {{al, r0, r10, r12, LSR, 5},
687                             false,
688                             al,
689                             "al r0 r10 r12 LSR 5",
690                             "al_r0_r10_r12_LSR_5"},
691                            {{al, r2, r2, r2, ASR, 4},
692                             false,
693                             al,
694                             "al r2 r2 r2 ASR 4",
695                             "al_r2_r2_r2_ASR_4"},
696                            {{al, r4, r13, r11, LSR, 15},
697                             false,
698                             al,
699                             "al r4 r13 r11 LSR 15",
700                             "al_r4_r13_r11_LSR_15"},
701                            {{al, r4, r2, r13, ASR, 4},
702                             false,
703                             al,
704                             "al r4 r2 r13 ASR 4",
705                             "al_r4_r2_r13_ASR_4"},
706                            {{al, r4, r4, r7, LSR, 30},
707                             false,
708                             al,
709                             "al r4 r4 r7 LSR 30",
710                             "al_r4_r4_r7_LSR_30"},
711                            {{al, r4, r8, r10, LSR, 14},
712                             false,
713                             al,
714                             "al r4 r8 r10 LSR 14",
715                             "al_r4_r8_r10_LSR_14"},
716                            {{al, r14, r8, r11, ASR, 16},
717                             false,
718                             al,
719                             "al r14 r8 r11 ASR 16",
720                             "al_r14_r8_r11_ASR_16"},
721                            {{al, r0, r8, r1, LSR, 25},
722                             false,
723                             al,
724                             "al r0 r8 r1 LSR 25",
725                             "al_r0_r8_r1_LSR_25"},
726                            {{al, r14, r13, r14, ASR, 3},
727                             false,
728                             al,
729                             "al r14 r13 r14 ASR 3",
730                             "al_r14_r13_r14_ASR_3"},
731                            {{al, r13, r8, r13, ASR, 31},
732                             false,
733                             al,
734                             "al r13 r8 r13 ASR 31",
735                             "al_r13_r8_r13_ASR_31"},
736                            {{al, r9, r6, r1, LSR, 28},
737                             false,
738                             al,
739                             "al r9 r6 r1 LSR 28",
740                             "al_r9_r6_r1_LSR_28"},
741                            {{al, r4, r14, r1, ASR, 9},
742                             false,
743                             al,
744                             "al r4 r14 r1 ASR 9",
745                             "al_r4_r14_r1_ASR_9"},
746                            {{al, r8, r0, r14, LSR, 7},
747                             false,
748                             al,
749                             "al r8 r0 r14 LSR 7",
750                             "al_r8_r0_r14_LSR_7"},
751                            {{al, r8, r8, r12, ASR, 14},
752                             false,
753                             al,
754                             "al r8 r8 r12 ASR 14",
755                             "al_r8_r8_r12_ASR_14"},
756                            {{al, r9, r14, r12, ASR, 19},
757                             false,
758                             al,
759                             "al r9 r14 r12 ASR 19",
760                             "al_r9_r14_r12_ASR_19"},
761                            {{al, r4, r14, r11, ASR, 25},
762                             false,
763                             al,
764                             "al r4 r14 r11 ASR 25",
765                             "al_r4_r14_r11_ASR_25"},
766                            {{al, r1, r0, r9, ASR, 13},
767                             false,
768                             al,
769                             "al r1 r0 r9 ASR 13",
770                             "al_r1_r0_r9_ASR_13"},
771                            {{al, r8, r13, r9, LSR, 4},
772                             false,
773                             al,
774                             "al r8 r13 r9 LSR 4",
775                             "al_r8_r13_r9_LSR_4"},
776                            {{al, r2, r4, r4, LSR, 3},
777                             false,
778                             al,
779                             "al r2 r4 r4 LSR 3",
780                             "al_r2_r4_r4_LSR_3"},
781                            {{al, r14, r13, r3, LSR, 8},
782                             false,
783                             al,
784                             "al r14 r13 r3 LSR 8",
785                             "al_r14_r13_r3_LSR_8"},
786                            {{al, r11, r6, r3, LSR, 10},
787                             false,
788                             al,
789                             "al r11 r6 r3 LSR 10",
790                             "al_r11_r6_r3_LSR_10"},
791                            {{al, r13, r8, r4, ASR, 31},
792                             false,
793                             al,
794                             "al r13 r8 r4 ASR 31",
795                             "al_r13_r8_r4_ASR_31"},
796                            {{al, r8, r11, r0, LSR, 13},
797                             false,
798                             al,
799                             "al r8 r11 r0 LSR 13",
800                             "al_r8_r11_r0_LSR_13"},
801                            {{al, r10, r5, r10, ASR, 19},
802                             false,
803                             al,
804                             "al r10 r5 r10 ASR 19",
805                             "al_r10_r5_r10_ASR_19"},
806                            {{al, r13, r4, r5, ASR, 2},
807                             false,
808                             al,
809                             "al r13 r4 r5 ASR 2",
810                             "al_r13_r4_r5_ASR_2"},
811                            {{al, r8, r4, r10, LSR, 3},
812                             false,
813                             al,
814                             "al r8 r4 r10 LSR 3",
815                             "al_r8_r4_r10_LSR_3"},
816                            {{al, r13, r7, r3, LSR, 6},
817                             false,
818                             al,
819                             "al r13 r7 r3 LSR 6",
820                             "al_r13_r7_r3_LSR_6"},
821                            {{al, r6, r1, r8, LSR, 1},
822                             false,
823                             al,
824                             "al r6 r1 r8 LSR 1",
825                             "al_r6_r1_r8_LSR_1"},
826                            {{al, r5, r13, r9, LSR, 31},
827                             false,
828                             al,
829                             "al r5 r13 r9 LSR 31",
830                             "al_r5_r13_r9_LSR_31"},
831                            {{al, r11, r8, r0, ASR, 19},
832                             false,
833                             al,
834                             "al r11 r8 r0 ASR 19",
835                             "al_r11_r8_r0_ASR_19"},
836                            {{al, r14, r6, r8, LSR, 25},
837                             false,
838                             al,
839                             "al r14 r6 r8 LSR 25",
840                             "al_r14_r6_r8_LSR_25"},
841                            {{al, r10, r6, r7, ASR, 28},
842                             false,
843                             al,
844                             "al r10 r6 r7 ASR 28",
845                             "al_r10_r6_r7_ASR_28"},
846                            {{al, r5, r2, r9, LSR, 12},
847                             false,
848                             al,
849                             "al r5 r2 r9 LSR 12",
850                             "al_r5_r2_r9_LSR_12"},
851                            {{al, r1, r2, r6, ASR, 18},
852                             false,
853                             al,
854                             "al r1 r2 r6 ASR 18",
855                             "al_r1_r2_r6_ASR_18"},
856                            {{al, r10, r13, r11, ASR, 14},
857                             false,
858                             al,
859                             "al r10 r13 r11 ASR 14",
860                             "al_r10_r13_r11_ASR_14"},
861                            {{al, r6, r8, r8, LSR, 14},
862                             false,
863                             al,
864                             "al r6 r8 r8 LSR 14",
865                             "al_r6_r8_r8_LSR_14"},
866                            {{al, r7, r14, r11, ASR, 18},
867                             false,
868                             al,
869                             "al r7 r14 r11 ASR 18",
870                             "al_r7_r14_r11_ASR_18"},
871                            {{al, r3, r11, r2, LSR, 13},
872                             false,
873                             al,
874                             "al r3 r11 r2 LSR 13",
875                             "al_r3_r11_r2_LSR_13"},
876                            {{al, r14, r7, r6, ASR, 10},
877                             false,
878                             al,
879                             "al r14 r7 r6 ASR 10",
880                             "al_r14_r7_r6_ASR_10"},
881                            {{al, r6, r5, r7, ASR, 12},
882                             false,
883                             al,
884                             "al r6 r5 r7 ASR 12",
885                             "al_r6_r5_r7_ASR_12"},
886                            {{al, r5, r2, r9, ASR, 13},
887                             false,
888                             al,
889                             "al r5 r2 r9 ASR 13",
890                             "al_r5_r2_r9_ASR_13"},
891                            {{al, r12, r13, r3, LSR, 14},
892                             false,
893                             al,
894                             "al r12 r13 r3 LSR 14",
895                             "al_r12_r13_r3_LSR_14"},
896                            {{al, r10, r4, r0, ASR, 23},
897                             false,
898                             al,
899                             "al r10 r4 r0 ASR 23",
900                             "al_r10_r4_r0_ASR_23"},
901                            {{al, r10, r12, r2, LSR, 18},
902                             false,
903                             al,
904                             "al r10 r12 r2 LSR 18",
905                             "al_r10_r12_r2_LSR_18"},
906                            {{al, r4, r10, r14, ASR, 18},
907                             false,
908                             al,
909                             "al r4 r10 r14 ASR 18",
910                             "al_r4_r10_r14_ASR_18"},
911                            {{al, r13, r0, r1, LSR, 7},
912                             false,
913                             al,
914                             "al r13 r0 r1 LSR 7",
915                             "al_r13_r0_r1_LSR_7"},
916                            {{al, r3, r3, r13, LSR, 16},
917                             false,
918                             al,
919                             "al r3 r3 r13 LSR 16",
920                             "al_r3_r3_r13_LSR_16"},
921                            {{al, r7, r4, r4, ASR, 19},
922                             false,
923                             al,
924                             "al r7 r4 r4 ASR 19",
925                             "al_r7_r4_r4_ASR_19"},
926                            {{al, r6, r7, r4, ASR, 13},
927                             false,
928                             al,
929                             "al r6 r7 r4 ASR 13",
930                             "al_r6_r7_r4_ASR_13"},
931                            {{al, r8, r10, r11, LSR, 14},
932                             false,
933                             al,
934                             "al r8 r10 r11 LSR 14",
935                             "al_r8_r10_r11_LSR_14"},
936                            {{al, r0, r0, r1, ASR, 32},
937                             false,
938                             al,
939                             "al r0 r0 r1 ASR 32",
940                             "al_r0_r0_r1_ASR_32"},
941                            {{al, r10, r12, r0, LSR, 17},
942                             false,
943                             al,
944                             "al r10 r12 r0 LSR 17",
945                             "al_r10_r12_r0_LSR_17"},
946                            {{al, r2, r5, r12, ASR, 8},
947                             false,
948                             al,
949                             "al r2 r5 r12 ASR 8",
950                             "al_r2_r5_r12_ASR_8"},
951                            {{al, r4, r3, r11, LSR, 1},
952                             false,
953                             al,
954                             "al r4 r3 r11 LSR 1",
955                             "al_r4_r3_r11_LSR_1"},
956                            {{al, r12, r13, r12, LSR, 22},
957                             false,
958                             al,
959                             "al r12 r13 r12 LSR 22",
960                             "al_r12_r13_r12_LSR_22"},
961                            {{al, r8, r13, r11, LSR, 12},
962                             false,
963                             al,
964                             "al r8 r13 r11 LSR 12",
965                             "al_r8_r13_r11_LSR_12"},
966                            {{al, r9, r11, r3, LSR, 27},
967                             false,
968                             al,
969                             "al r9 r11 r3 LSR 27",
970                             "al_r9_r11_r3_LSR_27"},
971                            {{al, r8, r9, r10, ASR, 21},
972                             false,
973                             al,
974                             "al r8 r9 r10 ASR 21",
975                             "al_r8_r9_r10_ASR_21"},
976                            {{al, r10, r3, r0, LSR, 8},
977                             false,
978                             al,
979                             "al r10 r3 r0 LSR 8",
980                             "al_r10_r3_r0_LSR_8"},
981                            {{al, r9, r2, r6, LSR, 32},
982                             false,
983                             al,
984                             "al r9 r2 r6 LSR 32",
985                             "al_r9_r2_r6_LSR_32"},
986                            {{al, r9, r0, r9, ASR, 24},
987                             false,
988                             al,
989                             "al r9 r0 r9 ASR 24",
990                             "al_r9_r0_r9_ASR_24"},
991                            {{al, r0, r10, r7, LSR, 7},
992                             false,
993                             al,
994                             "al r0 r10 r7 LSR 7",
995                             "al_r0_r10_r7_LSR_7"},
996                            {{al, r7, r11, r12, LSR, 14},
997                             false,
998                             al,
999                             "al r7 r11 r12 LSR 14",
1000                             "al_r7_r11_r12_LSR_14"},
1001                            {{al, r12, r10, r13, ASR, 29},
1002                             false,
1003                             al,
1004                             "al r12 r10 r13 ASR 29",
1005                             "al_r12_r10_r13_ASR_29"},
1006                            {{al, r2, r14, r3, LSR, 5},
1007                             false,
1008                             al,
1009                             "al r2 r14 r3 LSR 5",
1010                             "al_r2_r14_r3_LSR_5"},
1011                            {{al, r14, r3, r12, ASR, 19},
1012                             false,
1013                             al,
1014                             "al r14 r3 r12 ASR 19",
1015                             "al_r14_r3_r12_ASR_19"},
1016                            {{al, r12, r12, r11, ASR, 31},
1017                             false,
1018                             al,
1019                             "al r12 r12 r11 ASR 31",
1020                             "al_r12_r12_r11_ASR_31"},
1021                            {{al, r0, r3, r2, ASR, 4},
1022                             false,
1023                             al,
1024                             "al r0 r3 r2 ASR 4",
1025                             "al_r0_r3_r2_ASR_4"},
1026                            {{al, r13, r2, r11, ASR, 9},
1027                             false,
1028                             al,
1029                             "al r13 r2 r11 ASR 9",
1030                             "al_r13_r2_r11_ASR_9"},
1031                            {{al, r12, r14, r9, LSR, 13},
1032                             false,
1033                             al,
1034                             "al r12 r14 r9 LSR 13",
1035                             "al_r12_r14_r9_LSR_13"},
1036                            {{al, r14, r3, r3, ASR, 28},
1037                             false,
1038                             al,
1039                             "al r14 r3 r3 ASR 28",
1040                             "al_r14_r3_r3_ASR_28"},
1041                            {{al, r12, r5, r12, LSR, 19},
1042                             false,
1043                             al,
1044                             "al r12 r5 r12 LSR 19",
1045                             "al_r12_r5_r12_LSR_19"},
1046                            {{al, r9, r13, r1, LSR, 14},
1047                             false,
1048                             al,
1049                             "al r9 r13 r1 LSR 14",
1050                             "al_r9_r13_r1_LSR_14"},
1051                            {{al, r5, r3, r1, LSR, 11},
1052                             false,
1053                             al,
1054                             "al r5 r3 r1 LSR 11",
1055                             "al_r5_r3_r1_LSR_11"},
1056                            {{al, r0, r14, r5, ASR, 22},
1057                             false,
1058                             al,
1059                             "al r0 r14 r5 ASR 22",
1060                             "al_r0_r14_r5_ASR_22"},
1061                            {{al, r8, r9, r8, ASR, 12},
1062                             false,
1063                             al,
1064                             "al r8 r9 r8 ASR 12",
1065                             "al_r8_r9_r8_ASR_12"},
1066                            {{al, r9, r0, r13, LSR, 15},
1067                             false,
1068                             al,
1069                             "al r9 r0 r13 LSR 15",
1070                             "al_r9_r0_r13_LSR_15"},
1071                            {{al, r9, r5, r14, ASR, 9},
1072                             false,
1073                             al,
1074                             "al r9 r5 r14 ASR 9",
1075                             "al_r9_r5_r14_ASR_9"},
1076                            {{al, r9, r13, r13, LSR, 16},
1077                             false,
1078                             al,
1079                             "al r9 r13 r13 LSR 16",
1080                             "al_r9_r13_r13_LSR_16"},
1081                            {{al, r7, r0, r8, ASR, 17},
1082                             false,
1083                             al,
1084                             "al r7 r0 r8 ASR 17",
1085                             "al_r7_r0_r8_ASR_17"},
1086                            {{al, r10, r13, r14, ASR, 30},
1087                             false,
1088                             al,
1089                             "al r10 r13 r14 ASR 30",
1090                             "al_r10_r13_r14_ASR_30"},
1091                            {{al, r7, r10, r4, LSR, 8},
1092                             false,
1093                             al,
1094                             "al r7 r10 r4 LSR 8",
1095                             "al_r7_r10_r4_LSR_8"},
1096                            {{al, r10, r5, r1, ASR, 2},
1097                             false,
1098                             al,
1099                             "al r10 r5 r1 ASR 2",
1100                             "al_r10_r5_r1_ASR_2"},
1101                            {{al, r4, r10, r2, LSR, 10},
1102                             false,
1103                             al,
1104                             "al r4 r10 r2 LSR 10",
1105                             "al_r4_r10_r2_LSR_10"},
1106                            {{al, r3, r5, r0, LSR, 22},
1107                             false,
1108                             al,
1109                             "al r3 r5 r0 LSR 22",
1110                             "al_r3_r5_r0_LSR_22"},
1111                            {{al, r13, r11, r12, LSR, 22},
1112                             false,
1113                             al,
1114                             "al r13 r11 r12 LSR 22",
1115                             "al_r13_r11_r12_LSR_22"},
1116                            {{al, r0, r8, r6, LSR, 6},
1117                             false,
1118                             al,
1119                             "al r0 r8 r6 LSR 6",
1120                             "al_r0_r8_r6_LSR_6"},
1121                            {{al, r13, r4, r1, LSR, 30},
1122                             false,
1123                             al,
1124                             "al r13 r4 r1 LSR 30",
1125                             "al_r13_r4_r1_LSR_30"},
1126                            {{al, r13, r9, r12, ASR, 20},
1127                             false,
1128                             al,
1129                             "al r13 r9 r12 ASR 20",
1130                             "al_r13_r9_r12_ASR_20"},
1131                            {{al, r0, r5, r10, ASR, 2},
1132                             false,
1133                             al,
1134                             "al r0 r5 r10 ASR 2",
1135                             "al_r0_r5_r10_ASR_2"},
1136                            {{al, r10, r4, r0, ASR, 13},
1137                             false,
1138                             al,
1139                             "al r10 r4 r0 ASR 13",
1140                             "al_r10_r4_r0_ASR_13"},
1141                            {{al, r12, r3, r0, LSR, 16},
1142                             false,
1143                             al,
1144                             "al r12 r3 r0 LSR 16",
1145                             "al_r12_r3_r0_LSR_16"},
1146                            {{al, r7, r11, r14, ASR, 25},
1147                             false,
1148                             al,
1149                             "al r7 r11 r14 ASR 25",
1150                             "al_r7_r11_r14_ASR_25"},
1151                            {{al, r8, r9, r12, ASR, 31},
1152                             false,
1153                             al,
1154                             "al r8 r9 r12 ASR 31",
1155                             "al_r8_r9_r12_ASR_31"},
1156                            {{al, r14, r11, r8, LSR, 26},
1157                             false,
1158                             al,
1159                             "al r14 r11 r8 LSR 26",
1160                             "al_r14_r11_r8_LSR_26"},
1161                            {{al, r8, r3, r6, ASR, 31},
1162                             false,
1163                             al,
1164                             "al r8 r3 r6 ASR 31",
1165                             "al_r8_r3_r6_ASR_31"},
1166                            {{al, r10, r4, r5, ASR, 9},
1167                             false,
1168                             al,
1169                             "al r10 r4 r5 ASR 9",
1170                             "al_r10_r4_r5_ASR_9"},
1171                            {{al, r9, r4, r6, LSR, 31},
1172                             false,
1173                             al,
1174                             "al r9 r4 r6 LSR 31",
1175                             "al_r9_r4_r6_LSR_31"},
1176                            {{al, r12, r6, r12, LSR, 32},
1177                             false,
1178                             al,
1179                             "al r12 r6 r12 LSR 32",
1180                             "al_r12_r6_r12_LSR_32"},
1181                            {{al, r5, r8, r9, LSR, 15},
1182                             false,
1183                             al,
1184                             "al r5 r8 r9 LSR 15",
1185                             "al_r5_r8_r9_LSR_15"},
1186                            {{al, r1, r7, r0, LSR, 4},
1187                             false,
1188                             al,
1189                             "al r1 r7 r0 LSR 4",
1190                             "al_r1_r7_r0_LSR_4"},
1191                            {{al, r14, r5, r3, LSR, 11},
1192                             false,
1193                             al,
1194                             "al r14 r5 r3 LSR 11",
1195                             "al_r14_r5_r3_LSR_11"},
1196                            {{al, r0, r5, r11, ASR, 2},
1197                             false,
1198                             al,
1199                             "al r0 r5 r11 ASR 2",
1200                             "al_r0_r5_r11_ASR_2"},
1201                            {{al, r11, r13, r7, ASR, 4},
1202                             false,
1203                             al,
1204                             "al r11 r13 r7 ASR 4",
1205                             "al_r11_r13_r7_ASR_4"},
1206                            {{al, r8, r13, r12, LSR, 7},
1207                             false,
1208                             al,
1209                             "al r8 r13 r12 LSR 7",
1210                             "al_r8_r13_r12_LSR_7"},
1211                            {{al, r2, r11, r2, ASR, 28},
1212                             false,
1213                             al,
1214                             "al r2 r11 r2 ASR 28",
1215                             "al_r2_r11_r2_ASR_28"},
1216                            {{al, r9, r14, r11, LSR, 14},
1217                             false,
1218                             al,
1219                             "al r9 r14 r11 LSR 14",
1220                             "al_r9_r14_r11_LSR_14"},
1221                            {{al, r5, r12, r4, ASR, 24},
1222                             false,
1223                             al,
1224                             "al r5 r12 r4 ASR 24",
1225                             "al_r5_r12_r4_ASR_24"},
1226                            {{al, r9, r13, r3, LSR, 19},
1227                             false,
1228                             al,
1229                             "al r9 r13 r3 LSR 19",
1230                             "al_r9_r13_r3_LSR_19"},
1231                            {{al, r6, r3, r3, ASR, 25},
1232                             false,
1233                             al,
1234                             "al r6 r3 r3 ASR 25",
1235                             "al_r6_r3_r3_ASR_25"},
1236                            {{al, r13, r6, r6, LSR, 16},
1237                             false,
1238                             al,
1239                             "al r13 r6 r6 LSR 16",
1240                             "al_r13_r6_r6_LSR_16"},
1241                            {{al, r0, r9, r5, ASR, 30},
1242                             false,
1243                             al,
1244                             "al r0 r9 r5 ASR 30",
1245                             "al_r0_r9_r5_ASR_30"},
1246                            {{al, r9, r9, r0, LSR, 5},
1247                             false,
1248                             al,
1249                             "al r9 r9 r0 LSR 5",
1250                             "al_r9_r9_r0_LSR_5"},
1251                            {{al, r0, r5, r14, LSR, 12},
1252                             false,
1253                             al,
1254                             "al r0 r5 r14 LSR 12",
1255                             "al_r0_r5_r14_LSR_12"},
1256                            {{al, r14, r12, r7, ASR, 7},
1257                             false,
1258                             al,
1259                             "al r14 r12 r7 ASR 7",
1260                             "al_r14_r12_r7_ASR_7"},
1261                            {{al, r8, r13, r6, ASR, 27},
1262                             false,
1263                             al,
1264                             "al r8 r13 r6 ASR 27",
1265                             "al_r8_r13_r6_ASR_27"},
1266                            {{al, r12, r6, r13, LSR, 24},
1267                             false,
1268                             al,
1269                             "al r12 r6 r13 LSR 24",
1270                             "al_r12_r6_r13_LSR_24"},
1271                            {{al, r7, r10, r6, ASR, 32},
1272                             false,
1273                             al,
1274                             "al r7 r10 r6 ASR 32",
1275                             "al_r7_r10_r6_ASR_32"},
1276                            {{al, r6, r12, r13, ASR, 8},
1277                             false,
1278                             al,
1279                             "al r6 r12 r13 ASR 8",
1280                             "al_r6_r12_r13_ASR_8"},
1281                            {{al, r13, r0, r8, LSR, 19},
1282                             false,
1283                             al,
1284                             "al r13 r0 r8 LSR 19",
1285                             "al_r13_r0_r8_LSR_19"},
1286                            {{al, r10, r9, r10, LSR, 20},
1287                             false,
1288                             al,
1289                             "al r10 r9 r10 LSR 20",
1290                             "al_r10_r9_r10_LSR_20"},
1291                            {{al, r5, r7, r2, LSR, 25},
1292                             false,
1293                             al,
1294                             "al r5 r7 r2 LSR 25",
1295                             "al_r5_r7_r2_LSR_25"},
1296                            {{al, r2, r6, r0, LSR, 15},
1297                             false,
1298                             al,
1299                             "al r2 r6 r0 LSR 15",
1300                             "al_r2_r6_r0_LSR_15"},
1301                            {{al, r12, r6, r8, LSR, 21},
1302                             false,
1303                             al,
1304                             "al r12 r6 r8 LSR 21",
1305                             "al_r12_r6_r8_LSR_21"},
1306                            {{al, r14, r13, r2, LSR, 29},
1307                             false,
1308                             al,
1309                             "al r14 r13 r2 LSR 29",
1310                             "al_r14_r13_r2_LSR_29"},
1311                            {{al, r1, r13, r0, LSR, 21},
1312                             false,
1313                             al,
1314                             "al r1 r13 r0 LSR 21",
1315                             "al_r1_r13_r0_LSR_21"},
1316                            {{al, r6, r7, r8, ASR, 13},
1317                             false,
1318                             al,
1319                             "al r6 r7 r8 ASR 13",
1320                             "al_r6_r7_r8_ASR_13"},
1321                            {{al, r13, r2, r10, ASR, 8},
1322                             false,
1323                             al,
1324                             "al r13 r2 r10 ASR 8",
1325                             "al_r13_r2_r10_ASR_8"},
1326                            {{al, r5, r13, r7, LSR, 2},
1327                             false,
1328                             al,
1329                             "al r5 r13 r7 LSR 2",
1330                             "al_r5_r13_r7_LSR_2"},
1331                            {{al, r0, r3, r2, LSR, 17},
1332                             false,
1333                             al,
1334                             "al r0 r3 r2 LSR 17",
1335                             "al_r0_r3_r2_LSR_17"},
1336                            {{al, r1, r8, r9, LSR, 3},
1337                             false,
1338                             al,
1339                             "al r1 r8 r9 LSR 3",
1340                             "al_r1_r8_r9_LSR_3"},
1341                            {{al, r11, r3, r1, LSR, 29},
1342                             false,
1343                             al,
1344                             "al r11 r3 r1 LSR 29",
1345                             "al_r11_r3_r1_LSR_29"},
1346                            {{al, r2, r2, r11, LSR, 17},
1347                             false,
1348                             al,
1349                             "al r2 r2 r11 LSR 17",
1350                             "al_r2_r2_r11_LSR_17"},
1351                            {{al, r7, r14, r11, LSR, 22},
1352                             false,
1353                             al,
1354                             "al r7 r14 r11 LSR 22",
1355                             "al_r7_r14_r11_LSR_22"},
1356                            {{al, r8, r7, r14, LSR, 17},
1357                             false,
1358                             al,
1359                             "al r8 r7 r14 LSR 17",
1360                             "al_r8_r7_r14_LSR_17"},
1361                            {{al, r14, r2, r7, ASR, 32},
1362                             false,
1363                             al,
1364                             "al r14 r2 r7 ASR 32",
1365                             "al_r14_r2_r7_ASR_32"},
1366                            {{al, r0, r6, r9, ASR, 13},
1367                             false,
1368                             al,
1369                             "al r0 r6 r9 ASR 13",
1370                             "al_r0_r6_r9_ASR_13"},
1371                            {{al, r3, r5, r4, ASR, 24},
1372                             false,
1373                             al,
1374                             "al r3 r5 r4 ASR 24",
1375                             "al_r3_r5_r4_ASR_24"},
1376                            {{al, r10, r10, r6, ASR, 1},
1377                             false,
1378                             al,
1379                             "al r10 r10 r6 ASR 1",
1380                             "al_r10_r10_r6_ASR_1"},
1381                            {{al, r8, r9, r4, ASR, 5},
1382                             false,
1383                             al,
1384                             "al r8 r9 r4 ASR 5",
1385                             "al_r8_r9_r4_ASR_5"},
1386                            {{al, r3, r0, r6, LSR, 25},
1387                             false,
1388                             al,
1389                             "al r3 r0 r6 LSR 25",
1390                             "al_r3_r0_r6_LSR_25"},
1391                            {{al, r12, r7, r12, ASR, 11},
1392                             false,
1393                             al,
1394                             "al r12 r7 r12 ASR 11",
1395                             "al_r12_r7_r12_ASR_11"},
1396                            {{al, r10, r9, r7, ASR, 2},
1397                             false,
1398                             al,
1399                             "al r10 r9 r7 ASR 2",
1400                             "al_r10_r9_r7_ASR_2"},
1401                            {{al, r13, r13, r5, ASR, 2},
1402                             false,
1403                             al,
1404                             "al r13 r13 r5 ASR 2",
1405                             "al_r13_r13_r5_ASR_2"},
1406                            {{al, r11, r3, r2, ASR, 5},
1407                             false,
1408                             al,
1409                             "al r11 r3 r2 ASR 5",
1410                             "al_r11_r3_r2_ASR_5"},
1411                            {{al, r0, r8, r8, ASR, 10},
1412                             false,
1413                             al,
1414                             "al r0 r8 r8 ASR 10",
1415                             "al_r0_r8_r8_ASR_10"},
1416                            {{al, r10, r12, r12, ASR, 19},
1417                             false,
1418                             al,
1419                             "al r10 r12 r12 ASR 19",
1420                             "al_r10_r12_r12_ASR_19"},
1421                            {{al, r2, r6, r0, LSR, 10},
1422                             false,
1423                             al,
1424                             "al r2 r6 r0 LSR 10",
1425                             "al_r2_r6_r0_LSR_10"},
1426                            {{al, r11, r8, r8, ASR, 15},
1427                             false,
1428                             al,
1429                             "al r11 r8 r8 ASR 15",
1430                             "al_r11_r8_r8_ASR_15"},
1431                            {{al, r14, r14, r1, LSR, 14},
1432                             false,
1433                             al,
1434                             "al r14 r14 r1 LSR 14",
1435                             "al_r14_r14_r1_LSR_14"},
1436                            {{al, r9, r8, r12, ASR, 21},
1437                             false,
1438                             al,
1439                             "al r9 r8 r12 ASR 21",
1440                             "al_r9_r8_r12_ASR_21"},
1441                            {{al, r14, r14, r12, ASR, 9},
1442                             false,
1443                             al,
1444                             "al r14 r14 r12 ASR 9",
1445                             "al_r14_r14_r12_ASR_9"},
1446                            {{al, r0, r0, r3, ASR, 22},
1447                             false,
1448                             al,
1449                             "al r0 r0 r3 ASR 22",
1450                             "al_r0_r0_r3_ASR_22"},
1451                            {{al, r9, r7, r13, LSR, 16},
1452                             false,
1453                             al,
1454                             "al r9 r7 r13 LSR 16",
1455                             "al_r9_r7_r13_LSR_16"},
1456                            {{al, r8, r1, r5, LSR, 28},
1457                             false,
1458                             al,
1459                             "al r8 r1 r5 LSR 28",
1460                             "al_r8_r1_r5_LSR_28"},
1461                            {{al, r0, r2, r11, LSR, 21},
1462                             false,
1463                             al,
1464                             "al r0 r2 r11 LSR 21",
1465                             "al_r0_r2_r11_LSR_21"},
1466                            {{al, r5, r12, r8, LSR, 25},
1467                             false,
1468                             al,
1469                             "al r5 r12 r8 LSR 25",
1470                             "al_r5_r12_r8_LSR_25"},
1471                            {{al, r9, r5, r6, ASR, 5},
1472                             false,
1473                             al,
1474                             "al r9 r5 r6 ASR 5",
1475                             "al_r9_r5_r6_ASR_5"},
1476                            {{al, r0, r0, r7, ASR, 13},
1477                             false,
1478                             al,
1479                             "al r0 r0 r7 ASR 13",
1480                             "al_r0_r0_r7_ASR_13"},
1481                            {{al, r2, r10, r7, ASR, 10},
1482                             false,
1483                             al,
1484                             "al r2 r10 r7 ASR 10",
1485                             "al_r2_r10_r7_ASR_10"},
1486                            {{al, r13, r8, r14, ASR, 32},
1487                             false,
1488                             al,
1489                             "al r13 r8 r14 ASR 32",
1490                             "al_r13_r8_r14_ASR_32"},
1491                            {{al, r3, r2, r9, ASR, 30},
1492                             false,
1493                             al,
1494                             "al r3 r2 r9 ASR 30",
1495                             "al_r3_r2_r9_ASR_30"},
1496                            {{al, r11, r0, r14, ASR, 6},
1497                             false,
1498                             al,
1499                             "al r11 r0 r14 ASR 6",
1500                             "al_r11_r0_r14_ASR_6"},
1501                            {{al, r13, r10, r2, ASR, 18},
1502                             false,
1503                             al,
1504                             "al r13 r10 r2 ASR 18",
1505                             "al_r13_r10_r2_ASR_18"},
1506                            {{al, r8, r13, r1, ASR, 18},
1507                             false,
1508                             al,
1509                             "al r8 r13 r1 ASR 18",
1510                             "al_r8_r13_r1_ASR_18"},
1511                            {{al, r10, r4, r3, LSR, 19},
1512                             false,
1513                             al,
1514                             "al r10 r4 r3 LSR 19",
1515                             "al_r10_r4_r3_LSR_19"},
1516                            {{al, r2, r2, r9, ASR, 15},
1517                             false,
1518                             al,
1519                             "al r2 r2 r9 ASR 15",
1520                             "al_r2_r2_r9_ASR_15"},
1521                            {{al, r6, r4, r8, LSR, 28},
1522                             false,
1523                             al,
1524                             "al r6 r4 r8 LSR 28",
1525                             "al_r6_r4_r8_LSR_28"},
1526                            {{al, r14, r9, r6, LSR, 27},
1527                             false,
1528                             al,
1529                             "al r14 r9 r6 LSR 27",
1530                             "al_r14_r9_r6_LSR_27"},
1531                            {{al, r3, r14, r8, LSR, 18},
1532                             false,
1533                             al,
1534                             "al r3 r14 r8 LSR 18",
1535                             "al_r3_r14_r8_LSR_18"},
1536                            {{al, r4, r1, r14, LSR, 2},
1537                             false,
1538                             al,
1539                             "al r4 r1 r14 LSR 2",
1540                             "al_r4_r1_r14_LSR_2"},
1541                            {{al, r13, r9, r6, ASR, 16},
1542                             false,
1543                             al,
1544                             "al r13 r9 r6 ASR 16",
1545                             "al_r13_r9_r6_ASR_16"},
1546                            {{al, r4, r1, r9, ASR, 29},
1547                             false,
1548                             al,
1549                             "al r4 r1 r9 ASR 29",
1550                             "al_r4_r1_r9_ASR_29"},
1551                            {{al, r4, r3, r2, LSR, 23},
1552                             false,
1553                             al,
1554                             "al r4 r3 r2 LSR 23",
1555                             "al_r4_r3_r2_LSR_23"},
1556                            {{al, r11, r8, r0, LSR, 19},
1557                             false,
1558                             al,
1559                             "al r11 r8 r0 LSR 19",
1560                             "al_r11_r8_r0_LSR_19"},
1561                            {{al, r6, r10, r4, ASR, 29},
1562                             false,
1563                             al,
1564                             "al r6 r10 r4 ASR 29",
1565                             "al_r6_r10_r4_ASR_29"},
1566                            {{al, r8, r2, r5, ASR, 25},
1567                             false,
1568                             al,
1569                             "al r8 r2 r5 ASR 25",
1570                             "al_r8_r2_r5_ASR_25"},
1571                            {{al, r3, r10, r14, LSR, 25},
1572                             false,
1573                             al,
1574                             "al r3 r10 r14 LSR 25",
1575                             "al_r3_r10_r14_LSR_25"},
1576                            {{al, r4, r9, r0, LSR, 32},
1577                             false,
1578                             al,
1579                             "al r4 r9 r0 LSR 32",
1580                             "al_r4_r9_r0_LSR_32"},
1581                            {{al, r14, r10, r1, ASR, 8},
1582                             false,
1583                             al,
1584                             "al r14 r10 r1 ASR 8",
1585                             "al_r14_r10_r1_ASR_8"},
1586                            {{al, r10, r10, r1, LSR, 4},
1587                             false,
1588                             al,
1589                             "al r10 r10 r1 LSR 4",
1590                             "al_r10_r10_r1_LSR_4"},
1591                            {{al, r10, r2, r9, ASR, 23},
1592                             false,
1593                             al,
1594                             "al r10 r2 r9 ASR 23",
1595                             "al_r10_r2_r9_ASR_23"},
1596                            {{al, r12, r2, r7, LSR, 30},
1597                             false,
1598                             al,
1599                             "al r12 r2 r7 LSR 30",
1600                             "al_r12_r2_r7_LSR_30"},
1601                            {{al, r13, r4, r9, ASR, 20},
1602                             false,
1603                             al,
1604                             "al r13 r4 r9 ASR 20",
1605                             "al_r13_r4_r9_ASR_20"},
1606                            {{al, r12, r13, r2, LSR, 29},
1607                             false,
1608                             al,
1609                             "al r12 r13 r2 LSR 29",
1610                             "al_r12_r13_r2_LSR_29"},
1611                            {{al, r14, r8, r13, ASR, 12},
1612                             false,
1613                             al,
1614                             "al r14 r8 r13 ASR 12",
1615                             "al_r14_r8_r13_ASR_12"},
1616                            {{al, r11, r14, r11, ASR, 18},
1617                             false,
1618                             al,
1619                             "al r11 r14 r11 ASR 18",
1620                             "al_r11_r14_r11_ASR_18"},
1621                            {{al, r11, r10, r1, LSR, 3},
1622                             false,
1623                             al,
1624                             "al r11 r10 r1 LSR 3",
1625                             "al_r11_r10_r1_LSR_3"},
1626                            {{al, r6, r2, r0, LSR, 27},
1627                             false,
1628                             al,
1629                             "al r6 r2 r0 LSR 27",
1630                             "al_r6_r2_r0_LSR_27"},
1631                            {{al, r13, r6, r12, ASR, 6},
1632                             false,
1633                             al,
1634                             "al r13 r6 r12 ASR 6",
1635                             "al_r13_r6_r12_ASR_6"},
1636                            {{al, r9, r2, r3, ASR, 21},
1637                             false,
1638                             al,
1639                             "al r9 r2 r3 ASR 21",
1640                             "al_r9_r2_r3_ASR_21"},
1641                            {{al, r2, r9, r4, LSR, 16},
1642                             false,
1643                             al,
1644                             "al r2 r9 r4 LSR 16",
1645                             "al_r2_r9_r4_LSR_16"},
1646                            {{al, r10, r13, r10, ASR, 23},
1647                             false,
1648                             al,
1649                             "al r10 r13 r10 ASR 23",
1650                             "al_r10_r13_r10_ASR_23"},
1651                            {{al, r8, r13, r10, LSR, 20},
1652                             false,
1653                             al,
1654                             "al r8 r13 r10 LSR 20",
1655                             "al_r8_r13_r10_LSR_20"},
1656                            {{al, r0, r7, r7, ASR, 17},
1657                             false,
1658                             al,
1659                             "al r0 r7 r7 ASR 17",
1660                             "al_r0_r7_r7_ASR_17"},
1661                            {{al, r2, r5, r9, ASR, 24},
1662                             false,
1663                             al,
1664                             "al r2 r5 r9 ASR 24",
1665                             "al_r2_r5_r9_ASR_24"},
1666                            {{al, r1, r9, r7, ASR, 16},
1667                             false,
1668                             al,
1669                             "al r1 r9 r7 ASR 16",
1670                             "al_r1_r9_r7_ASR_16"},
1671                            {{al, r4, r1, r7, LSR, 26},
1672                             false,
1673                             al,
1674                             "al r4 r1 r7 LSR 26",
1675                             "al_r4_r1_r7_LSR_26"},
1676                            {{al, r6, r4, r10, LSR, 26},
1677                             false,
1678                             al,
1679                             "al r6 r4 r10 LSR 26",
1680                             "al_r6_r4_r10_LSR_26"},
1681                            {{al, r9, r5, r7, ASR, 1},
1682                             false,
1683                             al,
1684                             "al r9 r5 r7 ASR 1",
1685                             "al_r9_r5_r7_ASR_1"},
1686                            {{al, r5, r3, r5, LSR, 8},
1687                             false,
1688                             al,
1689                             "al r5 r3 r5 LSR 8",
1690                             "al_r5_r3_r5_LSR_8"},
1691                            {{al, r7, r6, r8, LSR, 28},
1692                             false,
1693                             al,
1694                             "al r7 r6 r8 LSR 28",
1695                             "al_r7_r6_r8_LSR_28"},
1696                            {{al, r3, r5, r12, ASR, 23},
1697                             false,
1698                             al,
1699                             "al r3 r5 r12 ASR 23",
1700                             "al_r3_r5_r12_ASR_23"},
1701                            {{al, r3, r14, r9, LSR, 28},
1702                             false,
1703                             al,
1704                             "al r3 r14 r9 LSR 28",
1705                             "al_r3_r14_r9_LSR_28"},
1706                            {{al, r14, r5, r3, LSR, 21},
1707                             false,
1708                             al,
1709                             "al r14 r5 r3 LSR 21",
1710                             "al_r14_r5_r3_LSR_21"},
1711                            {{al, r11, r0, r13, LSR, 23},
1712                             false,
1713                             al,
1714                             "al r11 r0 r13 LSR 23",
1715                             "al_r11_r0_r13_LSR_23"},
1716                            {{al, r13, r13, r7, LSR, 15},
1717                             false,
1718                             al,
1719                             "al r13 r13 r7 LSR 15",
1720                             "al_r13_r13_r7_LSR_15"},
1721                            {{al, r6, r10, r8, LSR, 24},
1722                             false,
1723                             al,
1724                             "al r6 r10 r8 LSR 24",
1725                             "al_r6_r10_r8_LSR_24"},
1726                            {{al, r8, r11, r11, ASR, 28},
1727                             false,
1728                             al,
1729                             "al r8 r11 r11 ASR 28",
1730                             "al_r8_r11_r11_ASR_28"},
1731                            {{al, r9, r1, r1, LSR, 26},
1732                             false,
1733                             al,
1734                             "al r9 r1 r1 LSR 26",
1735                             "al_r9_r1_r1_LSR_26"},
1736                            {{al, r2, r4, r14, LSR, 2},
1737                             false,
1738                             al,
1739                             "al r2 r4 r14 LSR 2",
1740                             "al_r2_r4_r14_LSR_2"},
1741                            {{al, r4, r7, r2, ASR, 19},
1742                             false,
1743                             al,
1744                             "al r4 r7 r2 ASR 19",
1745                             "al_r4_r7_r2_ASR_19"},
1746                            {{al, r9, r1, r7, ASR, 23},
1747                             false,
1748                             al,
1749                             "al r9 r1 r7 ASR 23",
1750                             "al_r9_r1_r7_ASR_23"},
1751                            {{al, r4, r7, r11, ASR, 7},
1752                             false,
1753                             al,
1754                             "al r4 r7 r11 ASR 7",
1755                             "al_r4_r7_r11_ASR_7"},
1756                            {{al, r7, r9, r5, ASR, 32},
1757                             false,
1758                             al,
1759                             "al r7 r9 r5 ASR 32",
1760                             "al_r7_r9_r5_ASR_32"},
1761                            {{al, r14, r6, r6, ASR, 11},
1762                             false,
1763                             al,
1764                             "al r14 r6 r6 ASR 11",
1765                             "al_r14_r6_r6_ASR_11"},
1766                            {{al, r14, r5, r14, ASR, 32},
1767                             false,
1768                             al,
1769                             "al r14 r5 r14 ASR 32",
1770                             "al_r14_r5_r14_ASR_32"},
1771                            {{al, r9, r2, r13, LSR, 15},
1772                             false,
1773                             al,
1774                             "al r9 r2 r13 LSR 15",
1775                             "al_r9_r2_r13_LSR_15"},
1776                            {{al, r13, r8, r3, LSR, 15},
1777                             false,
1778                             al,
1779                             "al r13 r8 r3 LSR 15",
1780                             "al_r13_r8_r3_LSR_15"},
1781                            {{al, r14, r0, r2, ASR, 10},
1782                             false,
1783                             al,
1784                             "al r14 r0 r2 ASR 10",
1785                             "al_r14_r0_r2_ASR_10"},
1786                            {{al, r9, r6, r5, LSR, 3},
1787                             false,
1788                             al,
1789                             "al r9 r6 r5 LSR 3",
1790                             "al_r9_r6_r5_LSR_3"},
1791                            {{al, r11, r10, r12, LSR, 13},
1792                             false,
1793                             al,
1794                             "al r11 r10 r12 LSR 13",
1795                             "al_r11_r10_r12_LSR_13"},
1796                            {{al, r7, r11, r9, LSR, 11},
1797                             false,
1798                             al,
1799                             "al r7 r11 r9 LSR 11",
1800                             "al_r7_r11_r9_LSR_11"},
1801                            {{al, r3, r9, r9, ASR, 10},
1802                             false,
1803                             al,
1804                             "al r3 r9 r9 ASR 10",
1805                             "al_r3_r9_r9_ASR_10"},
1806                            {{al, r12, r14, r3, LSR, 25},
1807                             false,
1808                             al,
1809                             "al r12 r14 r3 LSR 25",
1810                             "al_r12_r14_r3_LSR_25"},
1811                            {{al, r13, r1, r11, ASR, 7},
1812                             false,
1813                             al,
1814                             "al r13 r1 r11 ASR 7",
1815                             "al_r13_r1_r11_ASR_7"},
1816                            {{al, r12, r9, r5, ASR, 2},
1817                             false,
1818                             al,
1819                             "al r12 r9 r5 ASR 2",
1820                             "al_r12_r9_r5_ASR_2"},
1821                            {{al, r6, r13, r7, ASR, 12},
1822                             false,
1823                             al,
1824                             "al r6 r13 r7 ASR 12",
1825                             "al_r6_r13_r7_ASR_12"},
1826                            {{al, r5, r1, r5, LSR, 16},
1827                             false,
1828                             al,
1829                             "al r5 r1 r5 LSR 16",
1830                             "al_r5_r1_r5_LSR_16"},
1831                            {{al, r0, r11, r13, LSR, 22},
1832                             false,
1833                             al,
1834                             "al r0 r11 r13 LSR 22",
1835                             "al_r0_r11_r13_LSR_22"},
1836                            {{al, r7, r8, r1, ASR, 25},
1837                             false,
1838                             al,
1839                             "al r7 r8 r1 ASR 25",
1840                             "al_r7_r8_r1_ASR_25"},
1841                            {{al, r2, r13, r9, LSR, 11},
1842                             false,
1843                             al,
1844                             "al r2 r13 r9 LSR 11",
1845                             "al_r2_r13_r9_LSR_11"},
1846                            {{al, r4, r9, r11, ASR, 17},
1847                             false,
1848                             al,
1849                             "al r4 r9 r11 ASR 17",
1850                             "al_r4_r9_r11_ASR_17"},
1851                            {{al, r6, r0, r4, ASR, 13},
1852                             false,
1853                             al,
1854                             "al r6 r0 r4 ASR 13",
1855                             "al_r6_r0_r4_ASR_13"},
1856                            {{al, r9, r0, r14, LSR, 23},
1857                             false,
1858                             al,
1859                             "al r9 r0 r14 LSR 23",
1860                             "al_r9_r0_r14_LSR_23"},
1861                            {{al, r14, r11, r5, ASR, 17},
1862                             false,
1863                             al,
1864                             "al r14 r11 r5 ASR 17",
1865                             "al_r14_r11_r5_ASR_17"},
1866                            {{al, r6, r14, r13, ASR, 4},
1867                             false,
1868                             al,
1869                             "al r6 r14 r13 ASR 4",
1870                             "al_r6_r14_r13_ASR_4"},
1871                            {{al, r14, r12, r7, ASR, 31},
1872                             false,
1873                             al,
1874                             "al r14 r12 r7 ASR 31",
1875                             "al_r14_r12_r7_ASR_31"},
1876                            {{al, r11, r10, r12, ASR, 1},
1877                             false,
1878                             al,
1879                             "al r11 r10 r12 ASR 1",
1880                             "al_r11_r10_r12_ASR_1"},
1881                            {{al, r14, r11, r12, ASR, 25},
1882                             false,
1883                             al,
1884                             "al r14 r11 r12 ASR 25",
1885                             "al_r14_r11_r12_ASR_25"},
1886                            {{al, r2, r13, r1, ASR, 1},
1887                             false,
1888                             al,
1889                             "al r2 r13 r1 ASR 1",
1890                             "al_r2_r13_r1_ASR_1"},
1891                            {{al, r9, r2, r3, LSR, 29},
1892                             false,
1893                             al,
1894                             "al r9 r2 r3 LSR 29",
1895                             "al_r9_r2_r3_LSR_29"},
1896                            {{al, r1, r7, r6, ASR, 20},
1897                             false,
1898                             al,
1899                             "al r1 r7 r6 ASR 20",
1900                             "al_r1_r7_r6_ASR_20"},
1901                            {{al, r9, r13, r3, LSR, 2},
1902                             false,
1903                             al,
1904                             "al r9 r13 r3 LSR 2",
1905                             "al_r9_r13_r3_LSR_2"},
1906                            {{al, r8, r12, r5, ASR, 24},
1907                             false,
1908                             al,
1909                             "al r8 r12 r5 ASR 24",
1910                             "al_r8_r12_r5_ASR_24"},
1911                            {{al, r12, r5, r14, LSR, 1},
1912                             false,
1913                             al,
1914                             "al r12 r5 r14 LSR 1",
1915                             "al_r12_r5_r14_LSR_1"},
1916                            {{al, r13, r4, r9, ASR, 30},
1917                             false,
1918                             al,
1919                             "al r13 r4 r9 ASR 30",
1920                             "al_r13_r4_r9_ASR_30"},
1921                            {{al, r12, r2, r11, ASR, 28},
1922                             false,
1923                             al,
1924                             "al r12 r2 r11 ASR 28",
1925                             "al_r12_r2_r11_ASR_28"},
1926                            {{al, r8, r2, r11, LSR, 26},
1927                             false,
1928                             al,
1929                             "al r8 r2 r11 LSR 26",
1930                             "al_r8_r2_r11_LSR_26"},
1931                            {{al, r0, r0, r2, ASR, 21},
1932                             false,
1933                             al,
1934                             "al r0 r0 r2 ASR 21",
1935                             "al_r0_r0_r2_ASR_21"},
1936                            {{al, r7, r10, r14, LSR, 22},
1937                             false,
1938                             al,
1939                             "al r7 r10 r14 LSR 22",
1940                             "al_r7_r10_r14_LSR_22"},
1941                            {{al, r3, r1, r4, ASR, 18},
1942                             false,
1943                             al,
1944                             "al r3 r1 r4 ASR 18",
1945                             "al_r3_r1_r4_ASR_18"},
1946                            {{al, r8, r14, r3, ASR, 32},
1947                             false,
1948                             al,
1949                             "al r8 r14 r3 ASR 32",
1950                             "al_r8_r14_r3_ASR_32"},
1951                            {{al, r4, r9, r8, ASR, 4},
1952                             false,
1953                             al,
1954                             "al r4 r9 r8 ASR 4",
1955                             "al_r4_r9_r8_ASR_4"},
1956                            {{al, r7, r2, r4, ASR, 14},
1957                             false,
1958                             al,
1959                             "al r7 r2 r4 ASR 14",
1960                             "al_r7_r2_r4_ASR_14"},
1961                            {{al, r12, r1, r9, ASR, 9},
1962                             false,
1963                             al,
1964                             "al r12 r1 r9 ASR 9",
1965                             "al_r12_r1_r9_ASR_9"},
1966                            {{al, r3, r5, r0, ASR, 11},
1967                             false,
1968                             al,
1969                             "al r3 r5 r0 ASR 11",
1970                             "al_r3_r5_r0_ASR_11"},
1971                            {{al, r14, r9, r0, LSR, 10},
1972                             false,
1973                             al,
1974                             "al r14 r9 r0 LSR 10",
1975                             "al_r14_r9_r0_LSR_10"},
1976                            {{al, r14, r13, r6, ASR, 27},
1977                             false,
1978                             al,
1979                             "al r14 r13 r6 ASR 27",
1980                             "al_r14_r13_r6_ASR_27"},
1981                            {{al, r13, r8, r1, LSR, 27},
1982                             false,
1983                             al,
1984                             "al r13 r8 r1 LSR 27",
1985                             "al_r13_r8_r1_LSR_27"},
1986                            {{al, r7, r0, r7, LSR, 31},
1987                             false,
1988                             al,
1989                             "al r7 r0 r7 LSR 31",
1990                             "al_r7_r0_r7_LSR_31"},
1991                            {{al, r5, r8, r7, ASR, 27},
1992                             false,
1993                             al,
1994                             "al r5 r8 r7 ASR 27",
1995                             "al_r5_r8_r7_ASR_27"},
1996                            {{al, r12, r3, r10, ASR, 24},
1997                             false,
1998                             al,
1999                             "al r12 r3 r10 ASR 24",
2000                             "al_r12_r3_r10_ASR_24"},
2001                            {{al, r14, r14, r5, LSR, 20},
2002                             false,
2003                             al,
2004                             "al r14 r14 r5 LSR 20",
2005                             "al_r14_r14_r5_LSR_20"},
2006                            {{al, r0, r12, r7, LSR, 32},
2007                             false,
2008                             al,
2009                             "al r0 r12 r7 LSR 32",
2010                             "al_r0_r12_r7_LSR_32"},
2011                            {{al, r2, r3, r6, ASR, 17},
2012                             false,
2013                             al,
2014                             "al r2 r3 r6 ASR 17",
2015                             "al_r2_r3_r6_ASR_17"},
2016                            {{al, r11, r8, r13, ASR, 27},
2017                             false,
2018                             al,
2019                             "al r11 r8 r13 ASR 27",
2020                             "al_r11_r8_r13_ASR_27"},
2021                            {{al, r13, r12, r4, LSR, 24},
2022                             false,
2023                             al,
2024                             "al r13 r12 r4 LSR 24",
2025                             "al_r13_r12_r4_LSR_24"},
2026                            {{al, r3, r3, r0, ASR, 26},
2027                             false,
2028                             al,
2029                             "al r3 r3 r0 ASR 26",
2030                             "al_r3_r3_r0_ASR_26"},
2031                            {{al, r10, r0, r5, ASR, 26},
2032                             false,
2033                             al,
2034                             "al r10 r0 r5 ASR 26",
2035                             "al_r10_r0_r5_ASR_26"},
2036                            {{al, r5, r9, r7, LSR, 6},
2037                             false,
2038                             al,
2039                             "al r5 r9 r7 LSR 6",
2040                             "al_r5_r9_r7_LSR_6"},
2041                            {{al, r12, r4, r9, ASR, 8},
2042                             false,
2043                             al,
2044                             "al r12 r4 r9 ASR 8",
2045                             "al_r12_r4_r9_ASR_8"},
2046                            {{al, r4, r0, r13, LSR, 16},
2047                             false,
2048                             al,
2049                             "al r4 r0 r13 LSR 16",
2050                             "al_r4_r0_r13_LSR_16"},
2051                            {{al, r11, r2, r2, LSR, 6},
2052                             false,
2053                             al,
2054                             "al r11 r2 r2 LSR 6",
2055                             "al_r11_r2_r2_LSR_6"},
2056                            {{al, r12, r4, r3, ASR, 11},
2057                             false,
2058                             al,
2059                             "al r12 r4 r3 ASR 11",
2060                             "al_r12_r4_r3_ASR_11"},
2061                            {{al, r0, r10, r12, ASR, 22},
2062                             false,
2063                             al,
2064                             "al r0 r10 r12 ASR 22",
2065                             "al_r0_r10_r12_ASR_22"},
2066                            {{al, r12, r2, r12, LSR, 16},
2067                             false,
2068                             al,
2069                             "al r12 r2 r12 LSR 16",
2070                             "al_r12_r2_r12_LSR_16"},
2071                            {{al, r2, r2, r8, ASR, 14},
2072                             false,
2073                             al,
2074                             "al r2 r2 r8 ASR 14",
2075                             "al_r2_r2_r8_ASR_14"},
2076                            {{al, r9, r1, r3, LSR, 2},
2077                             false,
2078                             al,
2079                             "al r9 r1 r3 LSR 2",
2080                             "al_r9_r1_r3_LSR_2"},
2081                            {{al, r7, r0, r6, ASR, 15},
2082                             false,
2083                             al,
2084                             "al r7 r0 r6 ASR 15",
2085                             "al_r7_r0_r6_ASR_15"},
2086                            {{al, r11, r2, r12, LSR, 17},
2087                             false,
2088                             al,
2089                             "al r11 r2 r12 LSR 17",
2090                             "al_r11_r2_r12_LSR_17"},
2091                            {{al, r3, r7, r7, ASR, 19},
2092                             false,
2093                             al,
2094                             "al r3 r7 r7 ASR 19",
2095                             "al_r3_r7_r7_ASR_19"},
2096                            {{al, r9, r13, r1, LSR, 29},
2097                             false,
2098                             al,
2099                             "al r9 r13 r1 LSR 29",
2100                             "al_r9_r13_r1_LSR_29"},
2101                            {{al, r1, r0, r2, LSR, 2},
2102                             false,
2103                             al,
2104                             "al r1 r0 r2 LSR 2",
2105                             "al_r1_r0_r2_LSR_2"},
2106                            {{al, r14, r10, r2, ASR, 12},
2107                             false,
2108                             al,
2109                             "al r14 r10 r2 ASR 12",
2110                             "al_r14_r10_r2_ASR_12"},
2111                            {{al, r7, r14, r11, ASR, 27},
2112                             false,
2113                             al,
2114                             "al r7 r14 r11 ASR 27",
2115                             "al_r7_r14_r11_ASR_27"},
2116                            {{al, r9, r8, r13, ASR, 17},
2117                             false,
2118                             al,
2119                             "al r9 r8 r13 ASR 17",
2120                             "al_r9_r8_r13_ASR_17"},
2121                            {{al, r6, r14, r8, LSR, 11},
2122                             false,
2123                             al,
2124                             "al r6 r14 r8 LSR 11",
2125                             "al_r6_r14_r8_LSR_11"},
2126                            {{al, r5, r3, r9, ASR, 31},
2127                             false,
2128                             al,
2129                             "al r5 r3 r9 ASR 31",
2130                             "al_r5_r3_r9_ASR_31"},
2131                            {{al, r5, r4, r1, ASR, 29},
2132                             false,
2133                             al,
2134                             "al r5 r4 r1 ASR 29",
2135                             "al_r5_r4_r1_ASR_29"},
2136                            {{al, r6, r5, r10, ASR, 25},
2137                             false,
2138                             al,
2139                             "al r6 r5 r10 ASR 25",
2140                             "al_r6_r5_r10_ASR_25"},
2141                            {{al, r1, r8, r14, ASR, 32},
2142                             false,
2143                             al,
2144                             "al r1 r8 r14 ASR 32",
2145                             "al_r1_r8_r14_ASR_32"},
2146                            {{al, r0, r3, r5, ASR, 4},
2147                             false,
2148                             al,
2149                             "al r0 r3 r5 ASR 4",
2150                             "al_r0_r3_r5_ASR_4"},
2151                            {{al, r8, r6, r1, ASR, 5},
2152                             false,
2153                             al,
2154                             "al r8 r6 r1 ASR 5",
2155                             "al_r8_r6_r1_ASR_5"},
2156                            {{al, r14, r9, r14, ASR, 25},
2157                             false,
2158                             al,
2159                             "al r14 r9 r14 ASR 25",
2160                             "al_r14_r9_r14_ASR_25"},
2161                            {{al, r2, r10, r0, ASR, 18},
2162                             false,
2163                             al,
2164                             "al r2 r10 r0 ASR 18",
2165                             "al_r2_r10_r0_ASR_18"},
2166                            {{al, r12, r14, r0, LSR, 23},
2167                             false,
2168                             al,
2169                             "al r12 r14 r0 LSR 23",
2170                             "al_r12_r14_r0_LSR_23"},
2171                            {{al, r5, r13, r14, LSR, 25},
2172                             false,
2173                             al,
2174                             "al r5 r13 r14 LSR 25",
2175                             "al_r5_r13_r14_LSR_25"},
2176                            {{al, r13, r11, r10, ASR, 18},
2177                             false,
2178                             al,
2179                             "al r13 r11 r10 ASR 18",
2180                             "al_r13_r11_r10_ASR_18"},
2181                            {{al, r13, r9, r4, LSR, 22},
2182                             false,
2183                             al,
2184                             "al r13 r9 r4 LSR 22",
2185                             "al_r13_r9_r4_LSR_22"},
2186                            {{al, r10, r12, r5, LSR, 12},
2187                             false,
2188                             al,
2189                             "al r10 r12 r5 LSR 12",
2190                             "al_r10_r12_r5_LSR_12"},
2191                            {{al, r0, r1, r2, ASR, 28},
2192                             false,
2193                             al,
2194                             "al r0 r1 r2 ASR 28",
2195                             "al_r0_r1_r2_ASR_28"},
2196                            {{al, r13, r5, r5, LSR, 4},
2197                             false,
2198                             al,
2199                             "al r13 r5 r5 LSR 4",
2200                             "al_r13_r5_r5_LSR_4"},
2201                            {{al, r1, r3, r10, LSR, 18},
2202                             false,
2203                             al,
2204                             "al r1 r3 r10 LSR 18",
2205                             "al_r1_r3_r10_LSR_18"},
2206                            {{al, r2, r6, r4, LSR, 4},
2207                             false,
2208                             al,
2209                             "al r2 r6 r4 LSR 4",
2210                             "al_r2_r6_r4_LSR_4"},
2211                            {{al, r0, r3, r10, LSR, 4},
2212                             false,
2213                             al,
2214                             "al r0 r3 r10 LSR 4",
2215                             "al_r0_r3_r10_LSR_4"},
2216                            {{al, r14, r2, r8, LSR, 30},
2217                             false,
2218                             al,
2219                             "al r14 r2 r8 LSR 30",
2220                             "al_r14_r2_r8_LSR_30"},
2221                            {{al, r10, r12, r10, ASR, 18},
2222                             false,
2223                             al,
2224                             "al r10 r12 r10 ASR 18",
2225                             "al_r10_r12_r10_ASR_18"},
2226                            {{al, r13, r4, r2, LSR, 31},
2227                             false,
2228                             al,
2229                             "al r13 r4 r2 LSR 31",
2230                             "al_r13_r4_r2_LSR_31"},
2231                            {{al, r10, r11, r14, LSR, 5},
2232                             false,
2233                             al,
2234                             "al r10 r11 r14 LSR 5",
2235                             "al_r10_r11_r14_LSR_5"},
2236                            {{al, r3, r1, r6, ASR, 8},
2237                             false,
2238                             al,
2239                             "al r3 r1 r6 ASR 8",
2240                             "al_r3_r1_r6_ASR_8"},
2241                            {{al, r7, r14, r2, ASR, 10},
2242                             false,
2243                             al,
2244                             "al r7 r14 r2 ASR 10",
2245                             "al_r7_r14_r2_ASR_10"},
2246                            {{al, r8, r10, r8, ASR, 8},
2247                             false,
2248                             al,
2249                             "al r8 r10 r8 ASR 8",
2250                             "al_r8_r10_r8_ASR_8"},
2251                            {{al, r7, r10, r4, ASR, 21},
2252                             false,
2253                             al,
2254                             "al r7 r10 r4 ASR 21",
2255                             "al_r7_r10_r4_ASR_21"},
2256                            {{al, r6, r3, r3, ASR, 6},
2257                             false,
2258                             al,
2259                             "al r6 r3 r3 ASR 6",
2260                             "al_r6_r3_r3_ASR_6"},
2261                            {{al, r1, r8, r6, ASR, 20},
2262                             false,
2263                             al,
2264                             "al r1 r8 r6 ASR 20",
2265                             "al_r1_r8_r6_ASR_20"},
2266                            {{al, r14, r6, r0, LSR, 12},
2267                             false,
2268                             al,
2269                             "al r14 r6 r0 LSR 12",
2270                             "al_r14_r6_r0_LSR_12"},
2271                            {{al, r8, r1, r14, LSR, 19},
2272                             false,
2273                             al,
2274                             "al r8 r1 r14 LSR 19",
2275                             "al_r8_r1_r14_LSR_19"},
2276                            {{al, r6, r7, r8, LSR, 22},
2277                             false,
2278                             al,
2279                             "al r6 r7 r8 LSR 22",
2280                             "al_r6_r7_r8_LSR_22"},
2281                            {{al, r9, r0, r11, LSR, 8},
2282                             false,
2283                             al,
2284                             "al r9 r0 r11 LSR 8",
2285                             "al_r9_r0_r11_LSR_8"},
2286                            {{al, r10, r3, r2, LSR, 6},
2287                             false,
2288                             al,
2289                             "al r10 r3 r2 LSR 6",
2290                             "al_r10_r3_r2_LSR_6"},
2291                            {{al, r2, r14, r0, ASR, 12},
2292                             false,
2293                             al,
2294                             "al r2 r14 r0 ASR 12",
2295                             "al_r2_r14_r0_ASR_12"},
2296                            {{al, r6, r3, r5, LSR, 22},
2297                             false,
2298                             al,
2299                             "al r6 r3 r5 LSR 22",
2300                             "al_r6_r3_r5_LSR_22"},
2301                            {{al, r2, r13, r9, LSR, 12},
2302                             false,
2303                             al,
2304                             "al r2 r13 r9 LSR 12",
2305                             "al_r2_r13_r9_LSR_12"},
2306                            {{al, r14, r5, r2, LSR, 5},
2307                             false,
2308                             al,
2309                             "al r14 r5 r2 LSR 5",
2310                             "al_r14_r5_r2_LSR_5"},
2311                            {{al, r4, r10, r12, LSR, 32},
2312                             false,
2313                             al,
2314                             "al r4 r10 r12 LSR 32",
2315                             "al_r4_r10_r12_LSR_32"},
2316                            {{al, r1, r12, r2, ASR, 1},
2317                             false,
2318                             al,
2319                             "al r1 r12 r2 ASR 1",
2320                             "al_r1_r12_r2_ASR_1"},
2321                            {{al, r7, r11, r3, ASR, 27},
2322                             false,
2323                             al,
2324                             "al r7 r11 r3 ASR 27",
2325                             "al_r7_r11_r3_ASR_27"},
2326                            {{al, r3, r2, r2, ASR, 29},
2327                             false,
2328                             al,
2329                             "al r3 r2 r2 ASR 29",
2330                             "al_r3_r2_r2_ASR_29"},
2331                            {{al, r12, r2, r10, ASR, 13},
2332                             false,
2333                             al,
2334                             "al r12 r2 r10 ASR 13",
2335                             "al_r12_r2_r10_ASR_13"},
2336                            {{al, r3, r2, r3, ASR, 19},
2337                             false,
2338                             al,
2339                             "al r3 r2 r3 ASR 19",
2340                             "al_r3_r2_r3_ASR_19"},
2341                            {{al, r3, r12, r8, ASR, 14},
2342                             false,
2343                             al,
2344                             "al r3 r12 r8 ASR 14",
2345                             "al_r3_r12_r8_ASR_14"},
2346                            {{al, r14, r13, r9, LSR, 28},
2347                             false,
2348                             al,
2349                             "al r14 r13 r9 LSR 28",
2350                             "al_r14_r13_r9_LSR_28"},
2351                            {{al, r6, r12, r7, ASR, 32},
2352                             false,
2353                             al,
2354                             "al r6 r12 r7 ASR 32",
2355                             "al_r6_r12_r7_ASR_32"},
2356                            {{al, r11, r11, r12, ASR, 9},
2357                             false,
2358                             al,
2359                             "al r11 r11 r12 ASR 9",
2360                             "al_r11_r11_r12_ASR_9"},
2361                            {{al, r9, r11, r4, ASR, 21},
2362                             false,
2363                             al,
2364                             "al r9 r11 r4 ASR 21",
2365                             "al_r9_r11_r4_ASR_21"},
2366                            {{al, r6, r9, r3, LSR, 30},
2367                             false,
2368                             al,
2369                             "al r6 r9 r3 LSR 30",
2370                             "al_r6_r9_r3_LSR_30"},
2371                            {{al, r6, r0, r8, ASR, 22},
2372                             false,
2373                             al,
2374                             "al r6 r0 r8 ASR 22",
2375                             "al_r6_r0_r8_ASR_22"},
2376                            {{al, r5, r9, r11, ASR, 27},
2377                             false,
2378                             al,
2379                             "al r5 r9 r11 ASR 27",
2380                             "al_r5_r9_r11_ASR_27"},
2381                            {{al, r4, r10, r6, LSR, 2},
2382                             false,
2383                             al,
2384                             "al r4 r10 r6 LSR 2",
2385                             "al_r4_r10_r6_LSR_2"},
2386                            {{al, r10, r14, r11, ASR, 20},
2387                             false,
2388                             al,
2389                             "al r10 r14 r11 ASR 20",
2390                             "al_r10_r14_r11_ASR_20"},
2391                            {{al, r8, r13, r11, LSR, 13},
2392                             false,
2393                             al,
2394                             "al r8 r13 r11 LSR 13",
2395                             "al_r8_r13_r11_LSR_13"},
2396                            {{al, r7, r12, r13, LSR, 11},
2397                             false,
2398                             al,
2399                             "al r7 r12 r13 LSR 11",
2400                             "al_r7_r12_r13_LSR_11"},
2401                            {{al, r14, r6, r14, ASR, 21},
2402                             false,
2403                             al,
2404                             "al r14 r6 r14 ASR 21",
2405                             "al_r14_r6_r14_ASR_21"},
2406                            {{al, r2, r2, r7, LSR, 25},
2407                             false,
2408                             al,
2409                             "al r2 r2 r7 LSR 25",
2410                             "al_r2_r2_r7_LSR_25"},
2411                            {{al, r0, r11, r5, LSR, 5},
2412                             false,
2413                             al,
2414                             "al r0 r11 r5 LSR 5",
2415                             "al_r0_r11_r5_LSR_5"},
2416                            {{al, r1, r5, r14, LSR, 19},
2417                             false,
2418                             al,
2419                             "al r1 r5 r14 LSR 19",
2420                             "al_r1_r5_r14_LSR_19"},
2421                            {{al, r4, r14, r13, LSR, 27},
2422                             false,
2423                             al,
2424                             "al r4 r14 r13 LSR 27",
2425                             "al_r4_r14_r13_LSR_27"},
2426                            {{al, r13, r2, r3, ASR, 24},
2427                             false,
2428                             al,
2429                             "al r13 r2 r3 ASR 24",
2430                             "al_r13_r2_r3_ASR_24"},
2431                            {{al, r11, r1, r9, ASR, 12},
2432                             false,
2433                             al,
2434                             "al r11 r1 r9 ASR 12",
2435                             "al_r11_r1_r9_ASR_12"},
2436                            {{al, r2, r7, r13, LSR, 10},
2437                             false,
2438                             al,
2439                             "al r2 r7 r13 LSR 10",
2440                             "al_r2_r7_r13_LSR_10"},
2441                            {{al, r4, r13, r0, ASR, 3},
2442                             false,
2443                             al,
2444                             "al r4 r13 r0 ASR 3",
2445                             "al_r4_r13_r0_ASR_3"},
2446                            {{al, r7, r1, r3, ASR, 23},
2447                             false,
2448                             al,
2449                             "al r7 r1 r3 ASR 23",
2450                             "al_r7_r1_r3_ASR_23"},
2451                            {{al, r10, r13, r3, ASR, 20},
2452                             false,
2453                             al,
2454                             "al r10 r13 r3 ASR 20",
2455                             "al_r10_r13_r3_ASR_20"},
2456                            {{al, r7, r13, r9, LSR, 8},
2457                             false,
2458                             al,
2459                             "al r7 r13 r9 LSR 8",
2460                             "al_r7_r13_r9_LSR_8"},
2461                            {{al, r14, r14, r3, LSR, 21},
2462                             false,
2463                             al,
2464                             "al r14 r14 r3 LSR 21",
2465                             "al_r14_r14_r3_LSR_21"},
2466                            {{al, r4, r14, r2, ASR, 32},
2467                             false,
2468                             al,
2469                             "al r4 r14 r2 ASR 32",
2470                             "al_r4_r14_r2_ASR_32"},
2471                            {{al, r1, r4, r3, LSR, 10},
2472                             false,
2473                             al,
2474                             "al r1 r4 r3 LSR 10",
2475                             "al_r1_r4_r3_LSR_10"},
2476                            {{al, r11, r10, r9, LSR, 16},
2477                             false,
2478                             al,
2479                             "al r11 r10 r9 LSR 16",
2480                             "al_r11_r10_r9_LSR_16"},
2481                            {{al, r9, r8, r4, LSR, 5},
2482                             false,
2483                             al,
2484                             "al r9 r8 r4 LSR 5",
2485                             "al_r9_r8_r4_LSR_5"},
2486                            {{al, r11, r8, r11, ASR, 7},
2487                             false,
2488                             al,
2489                             "al r11 r8 r11 ASR 7",
2490                             "al_r11_r8_r11_ASR_7"},
2491                            {{al, r3, r7, r2, ASR, 20},
2492                             false,
2493                             al,
2494                             "al r3 r7 r2 ASR 20",
2495                             "al_r3_r7_r2_ASR_20"},
2496                            {{al, r9, r10, r0, ASR, 1},
2497                             false,
2498                             al,
2499                             "al r9 r10 r0 ASR 1",
2500                             "al_r9_r10_r0_ASR_1"},
2501                            {{al, r0, r12, r10, ASR, 21},
2502                             false,
2503                             al,
2504                             "al r0 r12 r10 ASR 21",
2505                             "al_r0_r12_r10_ASR_21"},
2506                            {{al, r11, r4, r2, ASR, 32},
2507                             false,
2508                             al,
2509                             "al r11 r4 r2 ASR 32",
2510                             "al_r11_r4_r2_ASR_32"},
2511                            {{al, r5, r0, r2, LSR, 15},
2512                             false,
2513                             al,
2514                             "al r5 r0 r2 LSR 15",
2515                             "al_r5_r0_r2_LSR_15"},
2516                            {{al, r8, r10, r7, ASR, 14},
2517                             false,
2518                             al,
2519                             "al r8 r10 r7 ASR 14",
2520                             "al_r8_r10_r7_ASR_14"},
2521                            {{al, r14, r5, r3, LSR, 18},
2522                             false,
2523                             al,
2524                             "al r14 r5 r3 LSR 18",
2525                             "al_r14_r5_r3_LSR_18"},
2526                            {{al, r2, r8, r6, ASR, 6},
2527                             false,
2528                             al,
2529                             "al r2 r8 r6 ASR 6",
2530                             "al_r2_r8_r6_ASR_6"},
2531                            {{al, r3, r0, r4, LSR, 23},
2532                             false,
2533                             al,
2534                             "al r3 r0 r4 LSR 23",
2535                             "al_r3_r0_r4_LSR_23"},
2536                            {{al, r3, r7, r0, LSR, 13},
2537                             false,
2538                             al,
2539                             "al r3 r7 r0 LSR 13",
2540                             "al_r3_r7_r0_LSR_13"},
2541                            {{al, r3, r4, r10, ASR, 28},
2542                             false,
2543                             al,
2544                             "al r3 r4 r10 ASR 28",
2545                             "al_r3_r4_r10_ASR_28"},
2546                            {{al, r3, r4, r1, ASR, 6},
2547                             false,
2548                             al,
2549                             "al r3 r4 r1 ASR 6",
2550                             "al_r3_r4_r1_ASR_6"},
2551                            {{al, r0, r3, r8, ASR, 18},
2552                             false,
2553                             al,
2554                             "al r0 r3 r8 ASR 18",
2555                             "al_r0_r3_r8_ASR_18"},
2556                            {{al, r5, r6, r13, LSR, 2},
2557                             false,
2558                             al,
2559                             "al r5 r6 r13 LSR 2",
2560                             "al_r5_r6_r13_LSR_2"},
2561                            {{al, r10, r11, r14, LSR, 2},
2562                             false,
2563                             al,
2564                             "al r10 r11 r14 LSR 2",
2565                             "al_r10_r11_r14_LSR_2"},
2566                            {{al, r10, r6, r6, ASR, 17},
2567                             false,
2568                             al,
2569                             "al r10 r6 r6 ASR 17",
2570                             "al_r10_r6_r6_ASR_17"},
2571                            {{al, r5, r2, r3, ASR, 3},
2572                             false,
2573                             al,
2574                             "al r5 r2 r3 ASR 3",
2575                             "al_r5_r2_r3_ASR_3"},
2576                            {{al, r14, r14, r1, LSR, 19},
2577                             false,
2578                             al,
2579                             "al r14 r14 r1 LSR 19",
2580                             "al_r14_r14_r1_LSR_19"},
2581                            {{al, r8, r4, r7, LSR, 6},
2582                             false,
2583                             al,
2584                             "al r8 r4 r7 LSR 6",
2585                             "al_r8_r4_r7_LSR_6"},
2586                            {{al, r12, r0, r8, LSR, 29},
2587                             false,
2588                             al,
2589                             "al r12 r0 r8 LSR 29",
2590                             "al_r12_r0_r8_LSR_29"},
2591                            {{al, r9, r0, r1, ASR, 29},
2592                             false,
2593                             al,
2594                             "al r9 r0 r1 ASR 29",
2595                             "al_r9_r0_r1_ASR_29"},
2596                            {{al, r7, r13, r9, ASR, 10},
2597                             false,
2598                             al,
2599                             "al r7 r13 r9 ASR 10",
2600                             "al_r7_r13_r9_ASR_10"},
2601                            {{al, r9, r10, r1, ASR, 26},
2602                             false,
2603                             al,
2604                             "al r9 r10 r1 ASR 26",
2605                             "al_r9_r10_r1_ASR_26"},
2606                            {{al, r1, r11, r10, ASR, 30},
2607                             false,
2608                             al,
2609                             "al r1 r11 r10 ASR 30",
2610                             "al_r1_r11_r10_ASR_30"},
2611                            {{al, r3, r14, r6, LSR, 11},
2612                             false,
2613                             al,
2614                             "al r3 r14 r6 LSR 11",
2615                             "al_r3_r14_r6_LSR_11"}};
2616 
2617 // These headers each contain an array of `TestResult` with the reference output
2618 // values. The reference arrays are names `kReference{mnemonic}`.
2619 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-adc.h"
2620 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-adcs.h"
2621 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-add.h"
2622 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-adds.h"
2623 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-and.h"
2624 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-ands.h"
2625 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-bic.h"
2626 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-bics.h"
2627 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-eor.h"
2628 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-eors.h"
2629 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-orn.h"
2630 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-orns.h"
2631 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-orr.h"
2632 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-orrs.h"
2633 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-rsb.h"
2634 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-rsbs.h"
2635 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-sbc.h"
2636 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-sbcs.h"
2637 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-sub.h"
2638 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32-subs.h"
2639 
2640 
2641 // The maximum number of errors to report in detail for each test.
2642 const unsigned kErrorReportLimit = 8;
2643 
2644 typedef void (MacroAssembler::*Fn)(Condition cond,
2645                                    Register rd,
2646                                    Register rn,
2647                                    const Operand& op);
2648 
TestHelper(Fn instruction,const char * mnemonic,const TestResult reference[])2649 void TestHelper(Fn instruction,
2650                 const char* mnemonic,
2651                 const TestResult reference[]) {
2652   unsigned total_error_count = 0;
2653   MacroAssembler masm(BUF_SIZE);
2654 
2655   masm.UseT32();
2656 
2657   for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
2658     // Values to pass to the macro-assembler.
2659     Condition cond = kTests[i].operands.cond;
2660     Register rd = kTests[i].operands.rd;
2661     Register rn = kTests[i].operands.rn;
2662     Register rm = kTests[i].operands.rm;
2663     ShiftType shift = kTests[i].operands.shift;
2664     uint32_t amount = kTests[i].operands.amount;
2665     Operand op(rm, shift, amount);
2666 
2667     int32_t start = masm.GetCursorOffset();
2668     {
2669       // We never generate more that 4 bytes, as IT instructions are only
2670       // allowed for narrow encodings.
2671       ExactAssemblyScope scope(&masm, 4, ExactAssemblyScope::kMaximumSize);
2672       if (kTests[i].in_it_block) {
2673         masm.it(kTests[i].it_condition);
2674       }
2675       (masm.*instruction)(cond, rd, rn, op);
2676     }
2677     int32_t end = masm.GetCursorOffset();
2678 
2679     const byte* result_ptr =
2680         masm.GetBuffer()->GetOffsetAddress<const byte*>(start);
2681     VIXL_ASSERT(start < end);
2682     uint32_t result_size = end - start;
2683 
2684     if (Test::generate_test_trace()) {
2685       // Print the result bytes.
2686       printf("const byte kInstruction_%s_%s[] = {\n",
2687              mnemonic,
2688              kTests[i].identifier);
2689       for (uint32_t j = 0; j < result_size; j++) {
2690         if (j == 0) {
2691           printf("  0x%02" PRIx8, result_ptr[j]);
2692         } else {
2693           printf(", 0x%02" PRIx8, result_ptr[j]);
2694         }
2695       }
2696       // This comment is meant to be used by external tools to validate
2697       // the encoding. We can parse the comment to figure out what
2698       // instruction this corresponds to.
2699       if (kTests[i].in_it_block) {
2700         printf(" // It %s; %s %s\n};\n",
2701                kTests[i].it_condition.GetName(),
2702                mnemonic,
2703                kTests[i].operands_description);
2704       } else {
2705         printf(" // %s %s\n};\n", mnemonic, kTests[i].operands_description);
2706       }
2707     } else {
2708       // Check we've emitted the exact same encoding as present in the
2709       // trace file. Only print up to `kErrorReportLimit` errors.
2710       if (((result_size != reference[i].size) ||
2711            (memcmp(result_ptr, reference[i].encoding, reference[i].size) !=
2712             0)) &&
2713           (++total_error_count <= kErrorReportLimit)) {
2714         printf("Error when testing \"%s\" with operands \"%s\":\n",
2715                mnemonic,
2716                kTests[i].operands_description);
2717         printf("  Expected: ");
2718         for (uint32_t j = 0; j < reference[i].size; j++) {
2719           if (j == 0) {
2720             printf("0x%02" PRIx8, reference[i].encoding[j]);
2721           } else {
2722             printf(", 0x%02" PRIx8, reference[i].encoding[j]);
2723           }
2724         }
2725         printf("\n");
2726         printf("  Found:    ");
2727         for (uint32_t j = 0; j < result_size; j++) {
2728           if (j == 0) {
2729             printf("0x%02" PRIx8, result_ptr[j]);
2730           } else {
2731             printf(", 0x%02" PRIx8, result_ptr[j]);
2732           }
2733         }
2734         printf("\n");
2735       }
2736     }
2737   }
2738 
2739   masm.FinalizeCode();
2740 
2741   if (Test::generate_test_trace()) {
2742     // Finalize the trace file by writing the final `TestResult` array
2743     // which links all generated instruction encodings.
2744     printf("const TestResult kReference%s[] = {\n", mnemonic);
2745     for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
2746       printf("  {\n");
2747       printf("    ARRAY_SIZE(kInstruction_%s_%s),\n",
2748              mnemonic,
2749              kTests[i].identifier);
2750       printf("    kInstruction_%s_%s,\n", mnemonic, kTests[i].identifier);
2751       printf("  },\n");
2752     }
2753     printf("};\n");
2754   } else {
2755     if (total_error_count > kErrorReportLimit) {
2756       printf("%u other errors follow.\n",
2757              total_error_count - kErrorReportLimit);
2758     }
2759     // Crash if the test failed.
2760     VIXL_CHECK(total_error_count == 0);
2761   }
2762 }
2763 
2764 // Instantiate tests for each instruction in the list.
2765 #define TEST(mnemonic)                                                      \
2766   void Test_##mnemonic() {                                                  \
2767     TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
2768   }                                                                         \
2769   Test test_##mnemonic(                                                     \
2770       "AARCH32_ASSEMBLER_COND_RD_RN_OPERAND_RM_SHIFT_AMOUNT_1TO32_"         \
2771       "T32_" #mnemonic,                                                     \
2772       &Test_##mnemonic);
2773 FOREACH_INSTRUCTION(TEST)
2774 #undef TEST
2775 
2776 }  // namespace
2777 #endif
2778 
2779 }  // namespace aarch32
2780 }  // namespace vixl
2781