| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 50 0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 260
51 0xfa 0xff 0xa6 0x1c # CHECK: bltuc $5, $6, -20
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| D | valid-mips32r6.txt | 52 0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 260
53 0x1c 0xa6 0xff 0xfa # CHECK: bltuc $5, $6, -20
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| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 43 0x40 0x00 0xa6 0x1c # CHECK: bltuc $5, $6, 260
44 0xfa 0xff 0xa6 0x1c # CHECK: bltuc $5, $6, -20
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| D | valid-mips64r6.txt | 69 0x1c 0xa6 0x00 0x40 # CHECK: bltuc $5, $6, 260
70 0x1c 0xa6 0xff 0xfa # CHECK: bltuc $5, $6, -20
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| /external/v8/src/mips/ |
| D | assembler-mips.h | 652 void bltuc(Register rs, Register rt, int16_t offset);
653 inline void bltuc(Register rs, Register rt, Label* L) { in bltuc() function
654 bltuc(rs, rt, shifted_branch_offset(L)); in bltuc()
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| D | macro-assembler-mips.cc | 2905 bltuc(scratch, rs, offset); in BranchShortHelperR6()
2953 bltuc(rs, scratch, offset); in BranchShortHelperR6()
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| D | assembler-mips.cc | 1372 void Assembler::bltuc(Register rs, Register rt, int16_t offset) { in bltuc() function in v8::internal::Assembler
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 656 void bltuc(Register rs, Register rt, int16_t offset);
657 inline void bltuc(Register rs, Register rt, Label* L) { in bltuc() function
658 bltuc(rs, rt, shifted_branch_offset(L)); in bltuc()
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| D | macro-assembler-mips64.cc | 3078 bltuc(scratch, rs, offset); in BranchShortHelperR6()
3126 bltuc(rs, scratch, offset); in BranchShortHelperR6()
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| D | assembler-mips64.cc | 1359 void Assembler::bltuc(Register rs, Register rt, int16_t offset) { in bltuc() function in v8::internal::Assembler
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 27 bltuc $3,$4, 16 # CHECK: bltuc $3, $4, 16 # encoding: [0xe0,0x83,0x00,0x08]
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| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 46 0xe0 0x83 0x00 0x08 # CHECK: bltuc $3, $4, 16
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 63 class BLTUC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bltuc", 0b111000>,
286 class BLTUC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bltuc", brtarget_mm,
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| D | Mips32r6InstrInfo.td | 401 class BLTUC_DESC : CMP_BC_DESC_BASE<"bltuc", brtarget, GPR32Opnd>;
|