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Searched refs:bltzc (Results 1 – 12 of 12) sorted by relevance

/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt33 0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 260
34 0xfa 0xff 0xa5 0x5c # CHECK: bltzc $5, -20
Dvalid-mips32r6.txt162 0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
163 0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt47 0x40 0x00 0xa5 0x5c # CHECK: bltzc $5, 260
48 0xfa 0xff 0xa5 0x5c # CHECK: bltzc $5, -20
Dvalid-mips64r6.txt181 0x5c 0xa5 0x00 0x40 # CHECK: bltzc $5, 260
182 0x5c 0xa5 0xff 0xfa # CHECK: bltzc $5, -20
/external/llvm/test/CodeGen/Mips/compactbranches/
Dcompact-branches.ll127 ; CHECK: bltzc
/external/v8/src/mips/
Dassembler-mips.h648 void bltzc(Register rt, int16_t offset);
649 inline void bltzc(Register rt, Label* L) { in bltzc() function
650 bltzc(rt, shifted_branch_offset(L)); in bltzc()
Dmacro-assembler-mips.cc2789 bltzc(scratch, offset); in BranchShortHelperR6()
2845 bltzc(rs, offset); in BranchShortHelperR6()
Dassembler-mips.cc1365 void Assembler::bltzc(Register rt, int16_t offset) { in bltzc() function in v8::internal::Assembler
/external/v8/src/mips64/
Dassembler-mips64.h652 void bltzc(Register rt, int16_t offset);
653 inline void bltzc(Register rt, Label* L) { in bltzc() function
654 bltzc(rt, shifted_branch_offset(L)); in bltzc()
Dmacro-assembler-mips64.cc2962 bltzc(scratch, offset); in BranchShortHelperR6()
3018 bltzc(rs, offset); in BranchShortHelperR6()
Dassembler-mips64.cc1352 void Assembler::bltzc(Register rt, int16_t offset) { in bltzc() function in v8::internal::Assembler
/external/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td403 class BLTZC_DESC : CMP_CBR_RT_Z_DESC_BASE<"bltzc", brtarget, GPR32Opnd>;