| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-xfail-mips32r6.txt | 6 0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 4
7 0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 4
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| D | valid-mips32r6-el.txt | 55 0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8
56 0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8
57 0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8
|
| D | valid-mips32r6.txt | 54 0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8
57 0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8
58 0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-xfail-mips64r6.txt | 6 0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 8
7 0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 8
|
| D | valid-mips64r6-el.txt | 57 0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8
58 0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8
59 0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8
|
| D | valid-mips64r6.txt | 71 0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8
74 0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8
75 0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 346 bovc $2, $4, 24 # CHECK: bovc $2, $4, 24 # encoding: [0x74,0x44,0x00,0x0c]
347 bovc $4, $2, 24 # CHECK: bovc $4, $2, 24 # encoding: [0x74,0x44,0x00,0x0c]
|
| /external/v8/src/mips/ |
| D | assembler-mips.h | 701 void bovc(Register rs, Register rt, int16_t offset);
702 inline void bovc(Register rs, Register rt, Label* L) { in bovc() function
703 bovc(rs, rt, shifted_branch_offset(L)); in bovc()
|
| D | macro-assembler-mips.cc | 1039 bovc(rs, rt, L); in Bovc()
1046 bovc(rs, rt, &skip); in Bnvc()
|
| D | assembler-mips.cc | 1412 void Assembler::bovc(Register rs, Register rt, int16_t offset) { in bovc() function in v8::internal::Assembler
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 705 void bovc(Register rs, Register rt, int16_t offset);
706 inline void bovc(Register rs, Register rt, Label* L) { in bovc() function
707 bovc(rs, rt, shifted_branch_offset(L)); in bovc()
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| D | macro-assembler-mips64.cc | 1185 bovc(rs, rt, L); in Bovc()
1192 bovc(rs, rt, &skip); in Bnvc()
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| D | assembler-mips64.cc | 1399 void Assembler::bovc(Register rs, Register rt, int16_t offset) { in bovc() function in v8::internal::Assembler
|
| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 322 0x74 0x44 0x00 0x0c # CHECK: bovc $2, $4, 24
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 203 class BOVC_MMR6_ENC : POP35_BOVC_FM_MMR6<"bovc">;
1319 class BOVC_MMR6_DESC : BOVC_BNVC_MMR6_DESC_BASE<"bovc", brtargetr6, GPR32Opnd>;
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| D | Mips32r6InstrInfo.td | 434 class BOVC_DESC : CMP_BC_DESC_BASE<"bovc", brtarget, GPR32Opnd>;
|