/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/ |
D | iabs.ll | 7 ;; bpl 8 ;; rsb r0, r0, #0 (with opitmization, bpl + rsb is if-converted into rsbmi) 17 ; CHECK: bpl
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/external/llvm/test/CodeGen/MIR/X86/ |
D | used-physical-register-info.mir | 56 # CHECK: calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx', 60 calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx', 80 # CHECK: calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
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/external/smali/util/src/main/java/org/jf/util/ |
D | Hex.java | 262 int outOffset, int bpl, int addressLength) { in dump() argument 302 if (col == bpl) { in dump()
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/external/llvm/test/MC/AArch64/ |
D | arm64-condbr-without-dots.s | 10 bpl lbl
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D | basic-a64-instructions.s | 1244 bpl lbl
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/external/swiftshader/third_party/subzero/src/ |
D | IceInstX8664.def | 80 X(Reg_bpl, 5, "bpl", Reg_rbp, 0,1,0,1,1, 1,0,0,0,1, 0, 0,0,0,1,0, \ 132 REGLIST3(RegX8664, ebp, bp, bpl)) \ 165 REGLIST3(RegX8664, rbp, bp, bpl)) \ 198 REGLIST3(RegX8664, rbp, ebp, bpl)) \
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/external/llvm/test/MC/Lanai/ |
D | conditional_inst.s | 33 bpl jump2
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D | v11.s | 75 bpl 0x123454 label 115 bpl.r 0x5678
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/external/llvm/test/CodeGen/X86/ |
D | asm-mismatched-types.ll | 33 ; CHECK: # REG: %bpl
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D | implicit-null-checks.mir | 169 …liveins: %eax, %ah, %al, %ax, %bh, %bl, %bp, %bpl, %bx, %eax, %ebp, %ebx, %rax, %rbp, %rbx, %r12, …
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D | clear_upper_vector_element_bits.ll | 550 ; AVX-NEXT: andb $15, %bpl 551 ; AVX-NEXT: movb %bpl, -{{[0-9]+}}(%rsp)
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D | masked_memop.ll | 3373 ; AVX1-NEXT: movb {{[0-9]+}}(%rsp), %bpl 3381 ; AVX1-NEXT: testb $1, %bpl 3742 ; AVX1-NEXT: movzbl %bpl, %eax 3804 ; AVX1-NEXT: movzbl %bpl, %ebp 3807 ; AVX1-NEXT: movzbl %bpl, %ebp 3810 ; AVX1-NEXT: movzbl %bpl, %ebp 3813 ; AVX1-NEXT: movzbl %bpl, %ebp 4029 ; AVX2-NEXT: movb {{[0-9]+}}(%rsp), %bpl 4037 ; AVX2-NEXT: testb $1, %bpl 4466 ; AVX2-NEXT: movzbl %bpl, %ebp [all …]
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/external/boringssl/ios-arm/crypto/fipsmodule/ |
D | ghash-armv4.S | 135 bpl Linner 289 bpl Loop
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D | bsaes-armv7.S | 1754 bpl Lxts_enc_loop 2248 bpl Lxts_dec_loop
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/external/boringssl/linux-arm/crypto/fipsmodule/ |
D | ghash-armv4.S | 132 bpl .Linner 284 bpl .Loop
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D | bsaes-armv7.S | 1743 bpl .Lxts_enc_loop 2235 bpl .Lxts_dec_loop
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
D | TestUtil.h | 113 LegacyRegAliases(r5, rbp, ebp, bp, bpl); 831 LegacyRegAccessors(r5, rbp, ebp, bp, bpl);
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/external/llvm/test/DebugInfo/MIR/X86/ |
D | live-debug-values.mir | 170 calleeSavedRegisters: [ '%bh', '%bl', '%bp', '%bpl', '%bx', '%ebp', '%ebx',
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/external/llvm/test/MC/Disassembler/Lanai/ |
D | v11.txt | 68 # CHECK: bpl 0x123454 100 # CHECK: bpl.r 0x5678
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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
D | fp.cmp.ll | 300 ; ARM32-O2: bpl 305 ; ARM32-O2: bpl
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/external/libvpx/libvpx/third_party/x86inc/ |
D | x86inc.asm | 295 DECLARE_REG_SIZE bp, bpl, null
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86RegisterInfo.td | 53 def BPL : Register<"bpl">;
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D | X86GenAsmWriter.inc | 5430 "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cr0\000cr1"
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D | X86GenAsmWriter1.inc | 6173 "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cr0\000cr1"
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 64 def BPL : X86Reg<"bpl", 5>;
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