Home
last modified time | relevance | path

Searched refs:cr7 (Results 1 – 25 of 32) sorted by relevance

12

/external/v8/src/ppc/
Dassembler-ppc.h291 const CRegister cr7 = {7}; variable
618 void bc_short(Condition cond, Label* L, CRegister cr = cr7,
663 void bclr(Condition cond, CRegister cr = cr7, LKBit lk = LeaveLK) {
707 CRegister cr = cr7) {
749 void b(Condition cond, Label* L, CRegister cr = cr7, LKBit lk = LeaveLK) {
767 void bne(Label* L, CRegister cr = cr7, LKBit lk = LeaveLK) {
770 void beq(Label* L, CRegister cr = cr7, LKBit lk = LeaveLK) {
773 void blt(Label* L, CRegister cr = cr7, LKBit lk = LeaveLK) {
776 void bge(Label* L, CRegister cr = cr7, LKBit lk = LeaveLK) {
779 void ble(Label* L, CRegister cr = cr7, LKBit lk = LeaveLK) {
[all …]
Dmacro-assembler-ppc.h128 CRegister cr = cr7);
141 void Ret(Condition cond, CRegister cr = cr7) { bclr(cond, cr); }
564 CRegister cr = cr7);
566 CRegister cr = cr7);
568 CRegister cr = cr7);
570 CRegister cr = cr7);
578 CRegister cr = cr7);
580 CRegister cr = cr7);
800 CRegister cr = cr7);
1035 void Assert(Condition cond, BailoutReason reason, CRegister cr = cr7);
[all …]
/external/v8/src/crankshaft/ppc/
Dlithium-codegen-ppc.h211 Deoptimizer::BailoutType bailout_type, CRegister cr = cr7);
213 DeoptimizeReason deopt_reason, CRegister cr = cr7);
244 void EmitBranch(InstrType instr, Condition condition, CRegister cr = cr7);
246 void EmitTrueBranch(InstrType instr, Condition condition, CRegister cr = cr7);
249 CRegister cr = cr7);
Dlithium-codegen-ppc.cc2090 const uint crZOrNaNBits = (1 << (31 - Assembler::encode_crbit(cr7, CR_EQ)) | in DoShiftI()
2091 1 << (31 - Assembler::encode_crbit(cr7, CR_FU))); in DoShiftI()
2107 __ fcmpu(reg, kDoubleRegZero, cr7); in DoShiftI()
2130 __ fcmpu(dbl_scratch, kDoubleRegZero, cr7); in DoShiftI()
2216 __ fcmpu(dbl_scratch, kDoubleRegZero, cr7); in DoShiftI()
/external/llvm/test/CodeGen/PowerPC/
Dcc.ll11 …ideeffect "sc", "={r0},={r3},{r0},~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" (i64 %a)
44 …sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" (i64 %a)
Daddisdtprelha-nonr3.mir63 …cr0, implicit-def dead %cr1, implicit-def dead %cr5, implicit-def dead %cr6, implicit-def dead %cr7
67 …cr0, implicit-def dead %cr1, implicit-def dead %cr5, implicit-def dead %cr6, implicit-def dead %cr7
/external/v8/src/regexp/s390/
Dregexp-macro-assembler-s390.h166 void BranchOrBacktrack(Condition condition, Label* to, CRegister cr = cr7);
170 inline void SafeCall(Label* to, Condition cond = al, CRegister cr = cr7);
/external/v8/src/regexp/ppc/
Dregexp-macro-assembler-ppc.h166 void BranchOrBacktrack(Condition condition, Label* to, CRegister cr = cr7);
170 inline void SafeCall(Label* to, Condition cond = al, CRegister cr = cr7);
/external/llvm/test/MC/PowerPC/
Dppc64-regs.s84 #CHECK: .cfi_offset cr7, 627
200 .cfi_offset cr7,627
Dppc64-encoding-ext.s30 beqlr cr7
139 btlr 4*cr7+lt
142 btlr 4*cr7+gt
145 btlr 4*cr7+eq
148 btlr 4*cr7+so
151 btlr 4*cr7+un
/external/v8/src/crankshaft/s390/
Dlithium-codegen-s390.h211 Deoptimizer::BailoutType bailout_type, CRegister cr = cr7);
213 DeoptimizeReason deopt_reason, CRegister cr = cr7);
/external/python/cpython2/Modules/_ctypes/libffi/src/powerpc/
Ddarwin.S185 mtcrf 0x03,r31 ; we need c6 & cr7 now.
225 mtcrf 0x03,r31 ; we need c6 & cr7 now.
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DREADME.txt59 cmplw cr7, r3, r4
313 1) cmpwi cr7, r3, 8
342 cmpw cr7, r3, r4
802 cmplw cr7, r2, r3
820 fcmpu cr7, f1, f2
830 fcmpu cr7,f1,f2
DPPCRegisterInfo.td246 def CR7 : CR<7, "cr7", [CR7LT, CR7GT, CR7EQ, CR7UN]>, DwarfRegNum<[75, 75]>;
/external/llvm/lib/Target/PowerPC/
DREADME.txt25 cmplw cr7, r3, r4
486 cmplw cr7, r2, r3
504 fcmpu cr7, f1, f2
514 fcmpu cr7,f1,f2
DPPCRegisterInfo.td201 def CR7 : CR<7, "cr7", [CR7LT, CR7GT, CR7EQ, CR7UN]>, DwarfRegNum<[75, 75]>;
/external/v8/src/s390/
Dmacro-assembler-s390.h182 CRegister cr = cr7);
1107 CRegister cr = cr7);
1317 void Assert(Condition cond, BailoutReason reason, CRegister cr = cr7);
1321 void Check(Condition cond, BailoutReason reason, CRegister cr = cr7);
1771 CRegister cr = cr7);
Dassembler-s390.h271 const CRegister cr7 = {7}; variable
1229 int32_t code = kDefaultStopCode, CRegister cr = cr7);
/external/v8/src/full-codegen/
Dfull-codegen.h221 CRegister cr = cr7);
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86RegisterInfo.td255 def CR7 : Register<"cr7">;
/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc1761 CRegister cr = cr7; in AssembleArchInstruction()
1788 CRegister cr = cr7; in AssembleArchInstruction()
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td291 def CR7 : X86Reg<"cr7", 7>;
/external/elfutils/tests/
Dtestfile44.expect.bz2
/external/v8/src/arm/
Dassembler-arm.cc2281 mcr(p15, 0, r0, cr7, cr10, 5); in dmb()
2293 mcr(p15, 0, r0, cr7, cr10, 4); in dsb()
2305 mcr(p15, 0, r0, cr7, cr5, 4); in isb()
Dassembler-arm.h454 const CRegister cr7 = { 7 }; variable

12