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Searched refs:ext1 (Results 1 – 25 of 52) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Ddp-3source.ll37 %ext1 = sext i32 %val1 to i64
39 %prod = mul i64 %ext1, %ext2
47 %ext1 = sext i32 %val1 to i64
49 %prod = mul i64 %ext1, %ext2
57 %ext1 = zext i32 %val1 to i64
59 %prod = mul i64 %ext1, %ext2
67 %ext1 = zext i32 %val1 to i64
69 %prod = mul i64 %ext1, %ext2
77 %ext1 = sext i64 %lhs to i128
79 %res = mul i128 %ext1, %ext2
[all …]
Darm64-vsub.ll163 %ext1 = sext <8 x i8> %high1 to <8 x i16>
169 %res = sub <8 x i16> %ext1, %ext2
178 %ext1 = sext <4 x i16> %high1 to <4 x i32>
184 %res = sub <4 x i32> %ext1, %ext2
193 %ext1 = sext <2 x i32> %high1 to <2 x i64>
199 %res = sub <2 x i64> %ext1, %ext2
241 %ext1 = zext <8 x i8> %high1 to <8 x i16>
247 %res = sub <8 x i16> %ext1, %ext2
256 %ext1 = zext <4 x i16> %high1 to <4 x i32>
262 %res = sub <4 x i32> %ext1, %ext2
[all …]
/external/nanopb-c/tests/extensions/
Ddecode_extensions.c24 pb_extension_t ext1; in main() local
34 alltypes.extensions = &ext1; in main()
36 ext1.type = &AllTypes_extensionfield1; in main()
37 ext1.dest = &extensionfield1; in main()
38 ext1.next = &ext2; in main()
52 TEST(ext1.found) in main()
Dencode_extensions.c19 pb_extension_t ext1; in main() local
24 alltypes.extensions = &ext1; in main()
26 ext1.type = &AllTypes_extensionfield1; in main()
27 ext1.dest = &extensionfield1; in main()
28 ext1.next = &ext2; in main()
/external/llvm/test/CodeGen/X86/
Dvec_extract-avx.ll25 %ext1 = extractelement <8 x float> %v, i32 1
29 %ins1 = insertelement <4 x float> %ins0, float %ext1, i32 1
51 %ext1 = extractelement <8 x float> %v, i32 5
55 %ins1 = insertelement <4 x float> %ins0, float %ext1, i32 1
79 %ext1 = extractelement <8 x i32> %v, i32 5
83 %ins1 = insertelement <4 x i32> %ins0, i32 %ext1, i32 1
105 %ext1 = extractelement <4 x double> %v, i32 3
107 %ins1 = insertelement <2 x double> %ins0, double %ext1, i32 1
Dclear_upper_vector_element_bits.ll29 %ext1 = zext i32 %trunc1 to i64
31 %v1 = insertelement <2 x i64> %v0, i64 %ext1, i32 1
66 %ext1 = zext i16 %trunc1 to i32
70 %v1 = insertelement <4 x i32> %v0, i32 %ext1, i32 1
138 %ext1 = zext i8 %trunc1 to i16
146 %v1 = insertelement <8 x i16> %v0, i16 %ext1, i32 1
275 %ext1 = zext i4 %trunc1 to i8
291 %v1 = insertelement <16 x i8> %v0, i8 %ext1, i32 1
/external/llvm/test/CodeGen/SystemZ/
Dvec-shift-07.ll150 %ext1 = sext i8 %elt1 to i64
152 %vec1 = insertelement <2 x i64> %vec0, i64 %ext1, i32 1
164 %ext1 = sext i16 %elt1 to i64
166 %vec1 = insertelement <2 x i64> %vec0, i64 %ext1, i32 1
178 %ext1 = sext i32 %elt1 to i64
180 %vec1 = insertelement <2 x i64> %vec0, i64 %ext1, i32 1
Dbranch-06.ll162 %ext1 = zext i8 %byte1 to i32
164 %cond = icmp ult i32 %ext1, %ext2
184 %ext1 = zext i16 %half1 to i32
186 %cond = icmp ult i32 %ext1, %ext2
Dasm-18.ll70 %ext1 = sext i8 %val1 to i32
75 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4)
94 %ext1 = sext i16 %val1 to i32
99 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4)
118 %ext1 = zext i8 %val1 to i32
123 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4)
142 %ext1 = zext i16 %val1 to i32
147 "h,r,h,r"(i32 %ext1, i32 %ext2, i32 %ext3, i32 %ext4)
207 %ext1 = zext i8 %val1 to i32
209 %val3 = call i8 asm sideeffect "stepa $0, $1", "=h,0,r"(i32 %ext1, i32 %ext2)
[all …]
Dint-add-03.ll158 %ext1 = sext i32 %frob1 to i64
169 %add1 = add i64 %add0, %ext1
Dint-sub-02.ll158 %ext1 = sext i32 %frob1 to i64
169 %sub1 = sub i64 %sub0, %ext1
Dfp-conv-02.ll100 %ext1 = fpext float %val1 to double
136 store volatile double %ext1, double *%ptr1
Dint-mul-03.ll158 %ext1 = sext i32 %frob1 to i64
169 %mul1 = mul i64 %mul0, %ext1
Dint-add-04.ll158 %ext1 = zext i32 %frob1 to i64
169 %add1 = add i64 %add0, %ext1
Dint-sub-03.ll158 %ext1 = zext i32 %frob1 to i64
169 %sub1 = sub i64 %sub0, %ext1
Dfp-conv-04.ll116 %ext1 = fpext double %val1 to fp128
152 store volatile fp128 %ext1, fp128 *%ptr1
Dfp-conv-03.ll116 %ext1 = fpext float %val1 to fp128
152 store volatile fp128 %ext1, fp128 *%ptr1
Dint-conv-11.ll78 %ext1 = zext i8 %trunc1 to i32
144 store volatile i32 %ext1, i32 *%ptr
251 %ext1 = zext i16 %trunc1 to i32
317 store volatile i32 %ext1, i32 *%ptr
Dfp-mul-02.ll149 %ext1 = fpext float %frob1 to double
150 %mul1 = fmul double %accext1, %ext1
/external/valgrind/helgrind/tests/
Dbar_bad.c38 pthread_t thr1, thr2, slp1, slp2, ext1; in main() local
94 pthread_create(&ext1, NULL, exit1, NULL); in main()
/external/protobuf/python/google/protobuf/internal/
Dtext_format_test.py625 ext1 = unittest_mset_pb2.TestMessageSetExtension1.message_set_extension
627 message.message_set.Extensions[ext1].i = 23
652 ext1 = unittest_mset_pb2.TestMessageSetExtension1.message_set_extension
654 message.message_set.Extensions[ext1].i = 23
671 ext1 = unittest_mset_pb2.TestMessageSetExtension1.message_set_extension
673 message.message_set.Extensions[ext1].i = 23
704 ext1 = unittest_mset_pb2.TestMessageSetExtension1.message_set_extension
706 self.assertEqual(23, message.message_set.Extensions[ext1].i)
727 ext1 = unittest_mset_pb2.TestMessageSetExtension1.message_set_extension
729 self.assertEqual(23, message.message_set.Extensions[ext1].i)
[all …]
Dmessage_factory_test.py125 ext1 = factory_msg1._extensions_by_name[
129 msg1.Extensions[ext1] = 'test1'
131 self.assertEqual('test1', msg1.Extensions[ext1])
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dfcmp.ll4 %ext1 = fpext float %x to double
6 %cmp = fcmp ogt double %ext1, %ext2
/external/protobuf/js/
Dtest3.proto47 optional string ext1 = 1; field
Dtest2.proto47 optional string ext1 = 1; field

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