1; Test additions between an i64 and a zero-extended i32. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5declare i64 @foo() 6 7; Check ALGFR. 8define i64 @f1(i64 %a, i32 %b) { 9; CHECK-LABEL: f1: 10; CHECK: algfr %r2, %r3 11; CHECK: br %r14 12 %bext = zext i32 %b to i64 13 %add = add i64 %a, %bext 14 ret i64 %add 15} 16 17; Check ALGF with no displacement. 18define i64 @f2(i64 %a, i32 *%src) { 19; CHECK-LABEL: f2: 20; CHECK: algf %r2, 0(%r3) 21; CHECK: br %r14 22 %b = load i32 , i32 *%src 23 %bext = zext i32 %b to i64 24 %add = add i64 %a, %bext 25 ret i64 %add 26} 27 28; Check the high end of the aligned ALGF range. 29define i64 @f3(i64 %a, i32 *%src) { 30; CHECK-LABEL: f3: 31; CHECK: algf %r2, 524284(%r3) 32; CHECK: br %r14 33 %ptr = getelementptr i32, i32 *%src, i64 131071 34 %b = load i32 , i32 *%ptr 35 %bext = zext i32 %b to i64 36 %add = add i64 %a, %bext 37 ret i64 %add 38} 39 40; Check the next word up, which needs separate address logic. 41; Other sequences besides this one would be OK. 42define i64 @f4(i64 %a, i32 *%src) { 43; CHECK-LABEL: f4: 44; CHECK: agfi %r3, 524288 45; CHECK: algf %r2, 0(%r3) 46; CHECK: br %r14 47 %ptr = getelementptr i32, i32 *%src, i64 131072 48 %b = load i32 , i32 *%ptr 49 %bext = zext i32 %b to i64 50 %add = add i64 %a, %bext 51 ret i64 %add 52} 53 54; Check the high end of the negative aligned ALGF range. 55define i64 @f5(i64 %a, i32 *%src) { 56; CHECK-LABEL: f5: 57; CHECK: algf %r2, -4(%r3) 58; CHECK: br %r14 59 %ptr = getelementptr i32, i32 *%src, i64 -1 60 %b = load i32 , i32 *%ptr 61 %bext = zext i32 %b to i64 62 %add = add i64 %a, %bext 63 ret i64 %add 64} 65 66; Check the low end of the ALGF range. 67define i64 @f6(i64 %a, i32 *%src) { 68; CHECK-LABEL: f6: 69; CHECK: algf %r2, -524288(%r3) 70; CHECK: br %r14 71 %ptr = getelementptr i32, i32 *%src, i64 -131072 72 %b = load i32 , i32 *%ptr 73 %bext = zext i32 %b to i64 74 %add = add i64 %a, %bext 75 ret i64 %add 76} 77 78; Check the next word down, which needs separate address logic. 79; Other sequences besides this one would be OK. 80define i64 @f7(i64 %a, i32 *%src) { 81; CHECK-LABEL: f7: 82; CHECK: agfi %r3, -524292 83; CHECK: algf %r2, 0(%r3) 84; CHECK: br %r14 85 %ptr = getelementptr i32, i32 *%src, i64 -131073 86 %b = load i32 , i32 *%ptr 87 %bext = zext i32 %b to i64 88 %add = add i64 %a, %bext 89 ret i64 %add 90} 91 92; Check that ALGF allows an index. 93define i64 @f8(i64 %a, i64 %src, i64 %index) { 94; CHECK-LABEL: f8: 95; CHECK: algf %r2, 524284({{%r4,%r3|%r3,%r4}}) 96; CHECK: br %r14 97 %add1 = add i64 %src, %index 98 %add2 = add i64 %add1, 524284 99 %ptr = inttoptr i64 %add2 to i32 * 100 %b = load i32 , i32 *%ptr 101 %bext = zext i32 %b to i64 102 %add = add i64 %a, %bext 103 ret i64 %add 104} 105 106; Check that additions of spilled values can use ALGF rather than ALGFR. 107define i64 @f9(i32 *%ptr0) { 108; CHECK-LABEL: f9: 109; CHECK: brasl %r14, foo@PLT 110; CHECK: algf %r2, 16{{[04]}}(%r15) 111; CHECK: br %r14 112 %ptr1 = getelementptr i32, i32 *%ptr0, i64 2 113 %ptr2 = getelementptr i32, i32 *%ptr0, i64 4 114 %ptr3 = getelementptr i32, i32 *%ptr0, i64 6 115 %ptr4 = getelementptr i32, i32 *%ptr0, i64 8 116 %ptr5 = getelementptr i32, i32 *%ptr0, i64 10 117 %ptr6 = getelementptr i32, i32 *%ptr0, i64 12 118 %ptr7 = getelementptr i32, i32 *%ptr0, i64 14 119 %ptr8 = getelementptr i32, i32 *%ptr0, i64 16 120 %ptr9 = getelementptr i32, i32 *%ptr0, i64 18 121 122 %val0 = load i32 , i32 *%ptr0 123 %val1 = load i32 , i32 *%ptr1 124 %val2 = load i32 , i32 *%ptr2 125 %val3 = load i32 , i32 *%ptr3 126 %val4 = load i32 , i32 *%ptr4 127 %val5 = load i32 , i32 *%ptr5 128 %val6 = load i32 , i32 *%ptr6 129 %val7 = load i32 , i32 *%ptr7 130 %val8 = load i32 , i32 *%ptr8 131 %val9 = load i32 , i32 *%ptr9 132 133 %frob0 = add i32 %val0, 100 134 %frob1 = add i32 %val1, 100 135 %frob2 = add i32 %val2, 100 136 %frob3 = add i32 %val3, 100 137 %frob4 = add i32 %val4, 100 138 %frob5 = add i32 %val5, 100 139 %frob6 = add i32 %val6, 100 140 %frob7 = add i32 %val7, 100 141 %frob8 = add i32 %val8, 100 142 %frob9 = add i32 %val9, 100 143 144 store i32 %frob0, i32 *%ptr0 145 store i32 %frob1, i32 *%ptr1 146 store i32 %frob2, i32 *%ptr2 147 store i32 %frob3, i32 *%ptr3 148 store i32 %frob4, i32 *%ptr4 149 store i32 %frob5, i32 *%ptr5 150 store i32 %frob6, i32 *%ptr6 151 store i32 %frob7, i32 *%ptr7 152 store i32 %frob8, i32 *%ptr8 153 store i32 %frob9, i32 *%ptr9 154 155 %ret = call i64 @foo() 156 157 %ext0 = zext i32 %frob0 to i64 158 %ext1 = zext i32 %frob1 to i64 159 %ext2 = zext i32 %frob2 to i64 160 %ext3 = zext i32 %frob3 to i64 161 %ext4 = zext i32 %frob4 to i64 162 %ext5 = zext i32 %frob5 to i64 163 %ext6 = zext i32 %frob6 to i64 164 %ext7 = zext i32 %frob7 to i64 165 %ext8 = zext i32 %frob8 to i64 166 %ext9 = zext i32 %frob9 to i64 167 168 %add0 = add i64 %ret, %ext0 169 %add1 = add i64 %add0, %ext1 170 %add2 = add i64 %add1, %ext2 171 %add3 = add i64 %add2, %ext3 172 %add4 = add i64 %add3, %ext4 173 %add5 = add i64 %add4, %ext5 174 %add6 = add i64 %add5, %ext6 175 %add7 = add i64 %add6, %ext7 176 %add8 = add i64 %add7, %ext8 177 %add9 = add i64 %add8, %ext9 178 179 ret i64 %add9 180} 181