| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-by-elem-mul.s | 26 fmulx h6, h2, v8.h[5]
27 fmulx s6, s2, v8.s[0]
28 fmulx s7, s3, v13.s[1]
29 fmulx s9, s7, v9.s[2]
30 fmulx s13, s21, v10.s[3]
31 fmulx d15, d9, v7.d[0]
32 fmulx d13, d12, v11.d[1]
|
| D | fullfp16-diagnostics.s | 34 fmulx v0.4h, v1.4h, v16.h[3]
35 fmulx v2.8h, v3.8h, v17.h[6]
74 fmulx h0, h1, v16.h[3]
75 fmulx h2, h3, v17.h[6]
|
| D | neon-scalar-mul.s | 29 fmulx h20, h22, h15
30 fmulx s20, s22, s15
31 fmulx d23, d11, d1
|
| D | neon-2velem.s | 201 fmulx v0.4h, v1.4h, v2.h[2]
202 fmulx v0.8h, v1.8h, v2.h[2]
203 fmulx v0.2s, v1.2s, v2.s[2]
204 fmulx v0.2s, v1.2s, v22.s[2]
205 fmulx v0.4s, v1.4s, v2.s[2]
206 fmulx v0.4s, v1.4s, v22.s[2]
207 fmulx v0.2d, v1.2d, v2.d[1]
208 fmulx v0.2d, v1.2d, v22.d[1]
|
| D | neon-mul-div-instructions.s | 79 fmulx v21.2s, v5.2s, v13.2s
80 fmulx v1.4s, v25.4s, v3.4s
81 fmulx v31.2d, v22.2d, v2.2d
|
| D | fullfp16-neon-neg.s | 66 fmulx v0.4h, v1.4h, v2.h[2]
68 fmulx v0.8h, v1.8h, v2.h[2]
224 fmulx h6, h2, v8.h[5]
280 fmulx h20, h22, h15
|
| D | arm64-advsimd.s | 327 fmulx.2s v0, v0, v0
329 fmulx d2, d3, d1 define
330 fmulx s2, s3, s1
397 ; CHECK: fmulx.2s v0, v0, v0 ; encoding: [0x00,0xdc,0x20,0x0e]
400 ; CHECK: fmulx d2, d3, d1 ; encoding: [0x62,0xdc,0x61,0x5e]
401 ; CHECK: fmulx s2, s3, s1 ; encoding: [0x62,0xdc,0x21,0x5e]
462 fmulx.4h v0, v0, v0
487 ; CHECK: fmulx.4h v0, v0, v0 ; encoding: [0x00,0x1c,0x40,0x0e]
512 fmulx.8h v0, v0, v0
537 ; CHECK: fmulx.8h v0, v0, v0 ; encoding: [0x00,0x1c,0x40,0x4e]
[all …]
|
| D | neon-diagnostics.s | 1280 fmulx v21.2s, v5.2s, v13.2d
1281 fmulx v1.4h, v25.4h, v3.4h
3453 fmulx v0.4h, v1.4h, v2.h[4]
3454 fmulx v0.2s, v1.2s, v2.s[4]
3455 fmulx v0.2s, v1.2s, v22.s[4]
3456 fmulx v0.4s, v1.4s, v2.s[4]
3457 fmulx v0.4s, v1.4s, v22.s[4]
3458 fmulx v0.2d, v1.2d, v2.d[2]
3459 fmulx v0.2d, v1.2d, v22.d[2]
3875 fmulx s20, h22, s15
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-scalar-by-elem-mul.ll | 64 declare float @llvm.aarch64.neon.fmulx.f32(float, float)
68 ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
70 %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %a, float %tmp1)
76 ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
78 %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %a, float %tmp1)
84 ; CHECK: fmulx {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
86 %tmp2 = call float @llvm.aarch64.neon.fmulx.f32(float %tmp1, float %a)
90 declare double @llvm.aarch64.neon.fmulx.f64(double, double)
94 ; CHECK: fmulx {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+.d\[0]|d[0-9]+}}
96 %tmp2 = call double @llvm.aarch64.neon.fmulx.f64(double %a, double %tmp1)
[all …]
|
| D | arm64-vmul.ll | 225 ;CHECK: fmulx.2s
228 %tmp3 = call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
234 ;CHECK: fmulx.4s
237 %tmp3 = call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
243 ;CHECK: fmulx.2d
246 %tmp3 = call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
250 declare <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float>, <2 x float>) nounwind readnone
251 declare <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float>, <4 x float>) nounwind readnone
252 declare <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double>, <2 x double>) nounwind readnone
716 ;CHECK: fmulx.2s
[all …]
|
| D | arm64-neon-mul-div.ll | 770 declare <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float>, <2 x float>)
771 declare <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float>, <4 x float>)
772 declare <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double>, <2 x double>)
777 ; CHECK: fmulx v0.2s, v0.2s, v1.2s
778 %val = call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %lhs, <2 x float> %rhs)
785 ; CHECK: fmulx v0.4s, v0.4s, v1.4s
786 %val = call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %lhs, <4 x float> %rhs)
793 ; CHECK: fmulx v0.2d, v0.2d, v1.2d
794 … %val = call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %lhs, <2 x double> %rhs)
|
| D | arm64-neon-2velem.ll | 3 declare <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double>, <2 x double>)
5 declare <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float>, <4 x float>)
7 declare <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float>, <2 x float>)
1499 …%vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuf…
1509 …%vmulx2.i = tail call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %a, <4 x float> %shuf…
1519 …%vmulx2.i = tail call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %a, <2 x double> %s…
1529 …%vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuf…
1539 …%vmulx2.i = tail call <4 x float> @llvm.aarch64.neon.fmulx.v4f32(<4 x float> %a, <4 x float> %shuf…
1549 …%vmulx2.i = tail call <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double> %a, <2 x double> %s…
2855 …%vmulx2.i = tail call <2 x float> @llvm.aarch64.neon.fmulx.v2f32(<2 x float> %a, <2 x float> %shuf…
[all …]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 669 # CHECK: fmulx v1.2s, v22.2s, v2.2s
670 # CHECK: fmulx v21.4s, v15.4s, v3.4s
671 # CHECK: fmulx v11.2d, v5.2d, v23.2d
1491 # CHECK: fmulx s20, s22, s15
1492 # CHECK: fmulx d23, d11, d1
2297 # CHECK: fmulx s3, s5, v7.s[0]
2298 # CHECK: fmulx s3, s5, v7.s[3]
2299 # CHECK: fmulx s3, s5, v15.s[3]
2300 # CHECK: fmulx d0, d4, v8.d[0]
2301 # CHECK: fmulx d0, d4, v8.d[1]
|
| D | arm64-advsimd.txt | 312 # CHECK: fmulx.2s v0, v0, v0
1603 # CHECK: fmulx.s s0, s0, v0[3]
1604 # CHECK: fmulx.d d0, d0, v0[1]
1696 # CHECK: fmulx.2s v0, v0, v0[0]
1697 # CHECK: fmulx.4s v0, v0, v0[1]
1698 # CHECK: fmulx.2d v0, v0, v0[1]
2313 # CHECK: fmulx s2, s3, s1
2315 # CHECK: fmulx d2, d3, d1
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 543 __ fmulx(d4, d17, d1); in GenerateTestSequenceFP() local
544 __ fmulx(s14, s25, s4); in GenerateTestSequenceFP() local
2677 __ fmulx(d28, d9, v3.D(), 1); in GenerateTestSequenceNEONFP() local
2678 __ fmulx(s25, s21, v15.S(), 1); in GenerateTestSequenceNEONFP() local
2679 __ fmulx(v31.V2D(), v28.V2D(), v8.V2D()); in GenerateTestSequenceNEONFP() local
2680 __ fmulx(v3.V2D(), v21.V2D(), v6.D(), 0); in GenerateTestSequenceNEONFP() local
2681 __ fmulx(v9.V2S(), v1.V2S(), v0.V2S()); in GenerateTestSequenceNEONFP() local
2682 __ fmulx(v16.V2S(), v27.V2S(), v6.S(), 0); in GenerateTestSequenceNEONFP() local
2683 __ fmulx(v2.V4S(), v4.V4S(), v5.V4S()); in GenerateTestSequenceNEONFP() local
2684 __ fmulx(v18.V4S(), v7.V4S(), v4.S(), 0); in GenerateTestSequenceNEONFP() local
|
| D | test-simulator-aarch64.cc | 4100 DEFINE_TEST_NEON_3SAME_FP(fmulx, Basic)
4165 DEFINE_TEST_NEON_3SAME_FP_SCALAR(fmulx, Basic)
4445 DEFINE_TEST_NEON_FP_BYELEMENT(fmulx, Basic, Basic, Basic)
4457 DEFINE_TEST_NEON_FP_BYELEMENT_SCALAR(fmulx, Basic, Basic, Basic)
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 466 0x~~~~~~~~~~~~~~~~ 5e61de24 fmulx d4, d17, d1
467 0x~~~~~~~~~~~~~~~~ 5e24df2e fmulx s14, s25, s4
2325 0x~~~~~~~~~~~~~~~~ 7fc3993c fmulx d28, d9, v3.d[2]
2326 0x~~~~~~~~~~~~~~~~ 7faf92b9 fmulx s25, s21, v15.s[1]
2327 0x~~~~~~~~~~~~~~~~ 4e68df9f fmulx v31.2d, v28.2d, v8.2d
2328 0x~~~~~~~~~~~~~~~~ 6fc692a3 fmulx v3.2d, v21.2d, v6.d[0]
2329 0x~~~~~~~~~~~~~~~~ 0e20dc29 fmulx v9.2s, v1.2s, v0.2s
2330 0x~~~~~~~~~~~~~~~~ 2f869370 fmulx v16.2s, v27.2s, v6.s[0]
2331 0x~~~~~~~~~~~~~~~~ 4e25dc82 fmulx v2.4s, v4.4s, v5.4s
2332 0x~~~~~~~~~~~~~~~~ 6f8490f2 fmulx v18.4s, v7.4s, v4.s[0]
|
| D | log-disasm-colour | 466 0x~~~~~~~~~~~~~~~~ 5e61de24 fmulx d4, d17, d1
467 0x~~~~~~~~~~~~~~~~ 5e24df2e fmulx s14, s25, s4
2325 0x~~~~~~~~~~~~~~~~ 7fc3993c fmulx d28, d9, v3.d[2]
2326 0x~~~~~~~~~~~~~~~~ 7faf92b9 fmulx s25, s21, v15.s[1]
2327 0x~~~~~~~~~~~~~~~~ 4e68df9f fmulx v31.2d, v28.2d, v8.2d
2328 0x~~~~~~~~~~~~~~~~ 6fc692a3 fmulx v3.2d, v21.2d, v6.d[0]
2329 0x~~~~~~~~~~~~~~~~ 0e20dc29 fmulx v9.2s, v1.2s, v0.2s
2330 0x~~~~~~~~~~~~~~~~ 2f869370 fmulx v16.2s, v27.2s, v6.s[0]
2331 0x~~~~~~~~~~~~~~~~ 4e25dc82 fmulx v2.4s, v4.4s, v5.4s
2332 0x~~~~~~~~~~~~~~~~ 6f8490f2 fmulx v18.4s, v7.4s, v4.s[0]
|
| D | log-all | 1067 0x~~~~~~~~~~~~~~~~ 5e61de24 fmulx d4, d17, d1
1069 0x~~~~~~~~~~~~~~~~ 5e24df2e fmulx s14, s25, s4
5953 0x~~~~~~~~~~~~~~~~ 7fc3993c fmulx d28, d9, v3.d[2]
5955 0x~~~~~~~~~~~~~~~~ 7faf92b9 fmulx s25, s21, v15.s[1]
5957 0x~~~~~~~~~~~~~~~~ 4e68df9f fmulx v31.2d, v28.2d, v8.2d
5959 0x~~~~~~~~~~~~~~~~ 6fc692a3 fmulx v3.2d, v21.2d, v6.d[0]
5961 0x~~~~~~~~~~~~~~~~ 0e20dc29 fmulx v9.2s, v1.2s, v0.2s
5963 0x~~~~~~~~~~~~~~~~ 2f869370 fmulx v16.2s, v27.2s, v6.s[0]
5965 0x~~~~~~~~~~~~~~~~ 4e25dc82 fmulx v2.4s, v4.4s, v5.4s
5967 0x~~~~~~~~~~~~~~~~ 6f8490f2 fmulx v18.4s, v7.4s, v4.s[0]
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 3320 fmulx(vf, rd, rn, rm); in VisitNEON3Same()
3859 Op = &Simulator::fmulx; in VisitNEONByIndexedElement()
4612 fmulx(vf, rd, rn, rm); in VisitNEONScalar3Same()
4767 Op = &Simulator::fmulx; in VisitNEONScalarByIndexedElement()
|
| D | assembler-aarch64.h | 2463 void fmulx(const VRegister& vd, const VRegister& vn, const VRegister& vm);
2490 void fmulx(const VRegister& vd,
|
| D | simulator-aarch64.h | 2003 LogicVRegister fmulx(VectorFormat vform,
2709 V(fmulx, FPMulx, true) \
|
| D | logic-aarch64.cc | 4411 LogicVRegister Simulator::fmulx(VectorFormat vform, in fmulx() function in vixl::aarch64::Simulator
4420 fmulx<float>(vform, dst, src1, index_reg); in fmulx()
4425 fmulx<double>(vform, dst, src1, index_reg); in fmulx()
|
| D | macro-assembler-aarch64.h | 2152 V(fmulx, Fmulx) \
2366 V(fmulx, Fmulx) \
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 26604 fmulx d2, d11, v29.d[0] 3e3dde3c658765b3b58a5ad0ef974f8a 8b8683df768bf0f5b05b0ea749bc778f 6b745…
26605 fmulx d2, d11, v29.d[1] c98362f719b366b4200c7f16d790dfcf 67fa6ac327e9aa358865657492a79797 9254b…
26606 fmulx s2, s11, v29.s[0] d5723845e469ca15d2f0f3c04d3b0133 5b45c938261e8df27d3e71e3ded34f1d e6b93…
26607 fmulx s2, s11, v29.s[3] 669ec3998cfcb7084e499ac2936d586c 6bfc04b1377ebf5f13fc17e7711443d5 6d362…
26608 fmulx v2.2d, v11.2d, v29.d[0] 9ab17fa31f5e64b1cdb13974903c1672 29611011b9edb14c5f4c5a9ef4a9cf53 …
26609 fmulx v2.2d, v11.2d, v29.d[1] 1ecc3ac47977bdd260ea993c6486ae8b 3ae6e0f3edb1bd641115f5e788e973a8 …
26610 fmulx v2.4s, v11.4s, v29.s[0] 510d13564df5ca42e396020adc013bee def53c4ede01a3b222e9b1db82f7b06f …
26611 fmulx v2.4s, v11.4s, v29.s[3] c6b6fd3af9befbd16e647afaa2ef1931 5b9bd0f9dee9733e104de1303e054573 …
26613 fmulx v2.2s, v11.2s, v29.s[0] b36cff69b0bc51395e556bdb02e8d569 14483a5ab44897f7ee2a705335793790 …
26614 fmulx v2.2s, v11.2s, v29.s[3] ebfb2e1117ce62da901532ce11730405 f8edf0fac50254b489792cbcf08e8aee …
[all …]
|