Searched refs:hasNEON (Results 1 – 20 of 20) sorted by relevance
82 if (ST->hasNEON()) in getNumberOfRegisters()94 if (ST->hasNEON()) in getRegisterBitWidth()
88 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND || in getCastInstrCost()179 if (SrcTy.isVector() && ST->hasNEON()) { in getCastInstrCost()209 if (SrcTy.isFloatingPoint() && ST->hasNEON()) { in getCastInstrCost()240 if (SrcTy.isInteger() && ST->hasNEON()) { in getCastInstrCost()298 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { in getCmpSelInstrCost()462 if (ST->hasNEON()) in getArithmeticInstrCost()
428 bool hasNEON() const { return HasNEON; } in hasNEON() function434 return hasNEON() && UseNEONForSinglePrecisionFP; in useNEONForSinglePrecisionFP()
464 if (Subtarget->hasNEON()) { in ARMTargetLowering()1013 if (Subtarget->hasNEON()) { in ARMTargetLowering()1264 if (Subtarget->hasNEON()) { in getRegClassFor()4251 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN()4608 assert(ST->hasNEON()); in LowerCTTZ()4786 assert(ST->hasNEON() && "Custom ctpop lowering requires NEON."); in LowerCTPOP()4806 assert(ST->hasNEON() && "unexpected vector shift"); in LowerShift()5209 if (!ST->hasNEON() || (!IsDouble && !ST->useNEONForSinglePrecisionFP())) in LowerConstantFP()7927 Subtarget->hasNEON()) { in EmitStructByval()8725 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()[all …]
679 if (!(STI.isCortexA15() && STI.hasNEON())) in runOnMachineFunction()
688 if (STI.hasNEON()) { in emitAttributes()
4187 if (Subtarget.hasNEON()) { in getExecutionDomain()4292 assert(Subtarget.hasNEON() && "VORRd requires NEON"); in setExecutionDomain()
1435 if (!static_cast<const ARMSubtarget &>(MF.getSubtarget()).hasNEON()) in checkNumAlignedDPRCS2Regs()
234 def HasNEON : Predicate<"Subtarget->hasNEON()">,
202 bool hasNEON() const { return HasNEON; } in hasNEON() function204 return hasNEON() && UseNEONForSinglePrecisionFP; } in useNEONForSinglePrecisionFP()
127 if (Subtarget.hasNEON()) in addPreSched2()
444 if (Subtarget->hasNEON()) { in ARMTargetLowering()738 if (Subtarget->hasV6T2Ops() || Subtarget->hasNEON()) in ARMTargetLowering()740 if (Subtarget->hasNEON()) in ARMTargetLowering()956 if (Subtarget->hasNEON()) { in getRegClassFor()3093 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN()3366 assert(ST->hasNEON() && "unexpected vector shift"); in LowerShift()6443 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()6719 if (BVN && Subtarget->hasNEON() && in PerformORCombine()6742 if (Subtarget->hasNEON() && N1.getOpcode() == ISD::AND && VT.isVector() && in PerformORCombine()7432 if (!Subtarget->hasNEON() || !Op.getValueType().isVector() || in PerformVCVTCombine()[all …]
711 if (Subtarget->hasNEON() && emitFPU) { in emitAttributes()737 if (Subtarget->hasNEON()) { in emitAttributes()
187 def HasNEON : Predicate<"Subtarget->hasNEON()">,
82 if (ST->hasNEON()) in getNumberOfRegisters()91 if (ST->hasNEON()) in getRegisterBitWidth()
1874 assert(Subtarget.hasNEON() && in copyPhysRegTuple()2035 if(Subtarget.hasNEON()) { in copyPhysReg()2056 if(Subtarget.hasNEON()) { in copyPhysReg()2073 if(Subtarget.hasNEON()) { in copyPhysReg()2090 if(Subtarget.hasNEON()) { in copyPhysReg()2111 if(Subtarget.hasNEON()) { in copyPhysReg()2226 assert(Subtarget.hasNEON() && in storeRegToStackSlot()2234 assert(Subtarget.hasNEON() && in storeRegToStackSlot()2242 assert(Subtarget.hasNEON() && in storeRegToStackSlot()2247 assert(Subtarget.hasNEON() && in storeRegToStackSlot()[all …]
176 bool hasNEON() const { return HasNEON; } in hasNEON() function
81 if (Subtarget->hasNEON()) { in AArch64TargetLowering()520 if (Subtarget->hasNEON()) { in AArch64TargetLowering()3823 if (!Subtarget->hasNEON()) in LowerCTPOP()4564 if (!ST.hasNEON()) in getEstimate()7110 if (!Subtarget->hasNEON() || (VecSize != 64 && VecSize != 128)) in lowerInterleavedLoad()7196 if (!Subtarget->hasNEON() || (SubVecSize != 64 && SubVecSize != 128)) in lowerInterleavedStore()7432 if (!Subtarget->hasNEON() || !VT.isVector()) in foldVectorXorShiftIntoCmp()7662 if (Subtarget->hasNEON() && ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse() && in performIntToFpCombine()7688 if (!Subtarget->hasNEON()) in performFpToIntCombine()7759 if (!Subtarget->hasNEON()) in performFDivCombine()[all …]
2860 (!Subtarget->hasNEON() || !Subtarget->isLittleEndian())) in fastLowerArguments()
23 def HasNEON : Predicate<"Subtarget->hasNEON()">,