/external/mesa3d/src/compiler/glsl/ |
D | ir_builder.h | 46 class operand { 48 operand(ir_rvalue *val) in operand() function 53 operand(ir_variable *var) in operand() function 123 ir_assignment *assign(deref lhs, operand rhs); 124 ir_assignment *assign(deref lhs, operand rhs, int writemask); 125 ir_assignment *assign(deref lhs, operand rhs, operand condition); 126 ir_assignment *assign(deref lhs, operand rhs, operand condition, int writemask); 128 ir_return *ret(operand retval); 130 ir_expression *expr(ir_expression_operation op, operand a); 131 ir_expression *expr(ir_expression_operation op, operand a, operand b); [all …]
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D | ir_builder.cpp | 49 assign(deref lhs, operand rhs, operand condition, int writemask) in assign() 62 assign(deref lhs, operand rhs) in assign() 68 assign(deref lhs, operand rhs, int writemask) in assign() 74 assign(deref lhs, operand rhs, operand condition) in assign() 80 ret(operand retval) in ret() 87 swizzle(operand a, int swizzle, int components) in swizzle() 100 swizzle_for_size(operand a, unsigned components) in swizzle_for_size() 115 swizzle_xxxx(operand a) in swizzle_xxxx() 121 swizzle_yyyy(operand a) in swizzle_yyyy() 127 swizzle_zzzz(operand a) in swizzle_zzzz() [all …]
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/external/llvm/test/MC/SystemZ/ |
D | insn-bad-z196.s | 5 #CHECK: error: invalid operand 7 #CHECK: error: invalid operand 9 #CHECK: error: invalid operand 16 #CHECK: error: invalid operand 18 #CHECK: error: invalid operand 20 #CHECK: error: invalid operand 27 #CHECK: error: invalid operand 29 #CHECK: error: invalid operand 35 #CHECK: error: invalid operand 37 #CHECK: error: invalid operand [all …]
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D | insn-bad-z13.s | 5 #CHECK: error: invalid operand 7 #CHECK: error: invalid operand 9 #CHECK: error: invalid operand 11 #CHECK: error: invalid operand 22 #CHECK: error: invalid operand 24 #CHECK: error: invalid operand 26 #CHECK: error: invalid operand 28 #CHECK: error: invalid operand 36 #CHECK: error: invalid operand 38 #CHECK: error: invalid operand [all …]
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D | insn-bad.s | 5 #CHECK: error: invalid operand 7 #CHECK: error: invalid operand 13 #CHECK: error: invalid operand 15 #CHECK: error: invalid operand 21 #CHECK: error: invalid operand 23 #CHECK: error: invalid operand 29 #CHECK: error: invalid operand 31 #CHECK: error: invalid operand 37 #CHECK: error: invalid operand 39 #CHECK: error: invalid operand [all …]
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D | regs-bad.s | 6 #CHECK: error: invalid operand for instruction 8 #CHECK: error: invalid operand for instruction 10 #CHECK: error: invalid operand for instruction 12 #CHECK: error: invalid operand for instruction 14 #CHECK: error: invalid operand for instruction 16 #CHECK: error: invalid operand for instruction 28 #CHECK: error: invalid operand for instruction 30 #CHECK: error: invalid operand for instruction 32 #CHECK: error: invalid operand for instruction 34 #CHECK: error: invalid operand for instruction [all …]
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/external/vixl/src/aarch32/ |
D | operands-aarch32.cc | 50 std::ostream& operator<<(std::ostream& os, const Operand& operand) { in operator <<() argument 51 if (operand.IsImmediate()) { in operator <<() 52 return os << "#" << operand.GetImmediate(); in operator <<() 54 if (operand.IsImmediateShiftedRegister()) { in operator <<() 55 if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) && in operator <<() 56 (operand.GetShiftAmount() == 0)) { in operator <<() 57 return os << operand.GetBaseRegister(); in operator <<() 59 if (operand.GetShift().IsRRX()) { in operator <<() 60 return os << operand.GetBaseRegister() << ", rrx"; in operator <<() 62 return os << operand.GetBaseRegister() << ", " << operand.GetShift() << " #" in operator <<() [all …]
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D | assembler-aarch32.h | 235 const Operand& operand); 238 const Operand& operand); 240 const Operand& operand); 244 const Operand& operand); 255 const Operand& operand); 260 const Operand& operand); 272 const Operand& operand); 285 const MemOperand& operand); 289 const MemOperand& operand); 302 const MemOperand& operand); [all …]
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D | macro-assembler-aarch32.h | 688 bool AliasesAvailableScratchRegister(const Operand& operand) { in AliasesAvailableScratchRegister() argument 689 if (operand.IsImmediate()) return false; in AliasesAvailableScratchRegister() 690 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || in AliasesAvailableScratchRegister() 691 (operand.IsRegisterShiftedRegister() && in AliasesAvailableScratchRegister() 692 AliasesAvailableScratchRegister(operand.GetShiftRegister())); in AliasesAvailableScratchRegister() 695 bool AliasesAvailableScratchRegister(const NeonOperand& operand) { in AliasesAvailableScratchRegister() argument 696 if (operand.IsImmediate()) return false; in AliasesAvailableScratchRegister() 697 return AliasesAvailableScratchRegister(operand.GetRegister()); in AliasesAvailableScratchRegister() 725 bool AliasesAvailableScratchRegister(const MemOperand& operand) { in AliasesAvailableScratchRegister() argument 726 return AliasesAvailableScratchRegister(operand.GetBaseRegister()) || in AliasesAvailableScratchRegister() [all …]
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D | disasm-aarch32.h | 142 PrintMemOperand(LocationType location_type, const MemOperand& operand) in PrintMemOperand() argument 143 : location_type_(location_type), operand_(operand) {} in PrintMemOperand() 154 const AlignedMemOperand& operand) in PrintAlignedMemOperand() argument 155 : location_type_(location_type), operand_(operand) {} in PrintAlignedMemOperand() 300 virtual DisassemblerStream& operator<<(const Operand& operand) { 301 if (operand.IsImmediate()) { 303 return *this << "#0x" << std::hex << operand.GetImmediate() 306 return *this << "#" << operand.GetImmediate(); 308 if (operand.IsImmediateShiftedRegister()) { 309 if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) && [all …]
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D | assembler-aarch32.cc | 1802 const Operand& operand) { in adc() argument 1805 if (operand.IsImmediate()) { in adc() 1806 uint32_t imm = operand.GetImmediate(); in adc() 1830 if (operand.IsImmediateShiftedRegister()) { in adc() 1831 Register rm = operand.GetBaseRegister(); in adc() 1832 if (operand.IsPlainRegister()) { in adc() 1843 Shift shift = operand.GetShift(); in adc() 1844 uint32_t amount = operand.GetShiftAmount(); in adc() 1851 rm.GetCode() | (operand.GetTypeEncodingValue() << 4) | in adc() 1862 (operand.GetTypeEncodingValue() << 5) | (amount_ << 7)); in adc() [all …]
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/external/llvm/test/MC/Mips/ |
D | micromips-invalid.s | 6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction 7 addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range 8 addu16 $6, $14, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 9 subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 10 andi16 $16, $10, 0x1f # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 11 andi16 $16, $2, 17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range 12 and16 $16, $8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 13 not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 14 or16 $16, $10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 15 xor16 $15, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction [all …]
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/external/llvm/test/MC/Mips/micromips32r6/ |
D | invalid.s | 6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction 7 addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 8 …addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran… 11 …addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran… 14 beqzc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 17 bnezc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 36 ei $32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 37 swe $33, 8($4) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction 38 … # FIXME: This ought to point at the $34 but memory is treated as one operand. 41 lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction [all …]
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/external/v8/src/wasm/ |
D | function-body-decoder.cc | 258 LocalIndexOperand operand(decoder, pc); in AnalyzeLoopAssignment() local 260 operand.index < static_cast<uint32_t>(assigned->length())) { in AnalyzeLoopAssignment() 262 assigned->Add(operand.index); in AnalyzeLoopAssignment() 264 length = 1 + operand.length; in AnalyzeLoopAssignment() 280 inline bool Validate(const byte* pc, LocalIndexOperand& operand) { in Validate() argument 281 if (operand.index < total_locals()) { in Validate() 283 operand.type = local_types_->at(operand.index); in Validate() 285 operand.type = kWasmStmt; in Validate() 289 error(pc, pc + 1, "invalid local index: %u", operand.index); in Validate() 293 inline bool Validate(const byte* pc, GlobalIndexOperand& operand) { in Validate() argument [all …]
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D | wasm-text.cc | 107 BlockTypeOperand operand(&i, i.pc()); in PrintWasmText() local 109 for (unsigned i = 0; i < operand.arity; i++) { in PrintWasmText() 110 os << " " << WasmOpcodes::TypeName(operand.read_entry(i)); in PrintWasmText() 117 BreakDepthOperand operand(&i, i.pc()); in PrintWasmText() local 118 os << WasmOpcodes::OpcodeName(opcode) << ' ' << operand.depth; in PrintWasmText() 129 BranchTableOperand operand(&i, i.pc()); in PrintWasmText() local 130 BranchTableIterator iterator(&i, operand); in PrintWasmText() 136 CallIndirectOperand operand(&i, i.pc()); in PrintWasmText() local 137 DCHECK_EQ(0, operand.table_index); in PrintWasmText() 138 os << "call_indirect " << operand.index; in PrintWasmText() [all …]
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/external/llvm/test/MC/Mips/micromips64r6/ |
D | invalid.s | 6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction 7 addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 8 …addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran… 11 …addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran… 14 beqzc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 17 bnezc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 57 lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 58 …lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran… 59 …lbu16 $3, -2($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran… 60 lbu16 $16, 8($9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction [all …]
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/external/llvm/test/MC/ARM/ |
D | invalid-neon-v8.s | 4 @ CHECK: error: invalid operand for instruction 6 @ CHECK: error: invalid operand for instruction 13 @ CHECK: error: invalid operand for instruction 15 @ CHECK: error: invalid operand for instruction 20 @ CHECK: error: invalid operand for instruction 22 @ CHECK: error: invalid operand for instruction 24 @ CHECK: error: invalid operand for instruction 29 @ CHECK: error: invalid operand for instruction 31 @ CHECK: error: invalid operand for instruction 33 @ CHECK: error: invalid operand for instruction [all …]
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D | vorr-vbic-illegal-cases.s | 11 @ CHECK: error: invalid operand for instruction 13 @ CHECK: error: invalid operand for instruction 15 @ CHECK: error: invalid operand for instruction 17 @ CHECK: error: invalid operand for instruction 19 @ CHECK: error: invalid operand for instruction 21 @ CHECK: error: invalid operand for instruction 31 @ CHECK: error: invalid operand for instruction 33 @ CHECK: error: invalid operand for instruction 35 @ CHECK: error: invalid operand for instruction 37 @ CHECK: error: invalid operand for instruction [all …]
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/external/vixl/tools/test_generator/ |
D | generator.py | 69 relevant_operands = filter(lambda operand: operand.type_name == type_name, 71 for operand in relevant_operands: 74 for variant in set(operand.variants) & set(variant_to_exclude): 75 operand.variants.remove(variant) 81 return [operand.name for operand in self.unwrap()] 210 [operand[1] for operand in operands], 363 return "".join([operand.Declare() for operand in self.operands]) 437 """.format(operands=",".join(operand), 438 operands_description=" ".join(operand), 439 identifier=test_case.name + "_" + "_".join(operand), [all …]
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/external/elfutils/libdw/ |
D | cfi.c | 134 Dwarf_Word operand = opcode & CFI_PRIMARY_MAX; in execute_cfi() local 140 operand = *program++; in execute_cfi() 143 loc += operand * cie->code_alignment_factor; in execute_cfi() 148 operand = read_2ubyte_unaligned_inc (cache, program); in execute_cfi() 152 operand = read_4ubyte_unaligned_inc (cache, program); in execute_cfi() 156 operand = read_8ubyte_unaligned_inc (cache, program); in execute_cfi() 171 get_uleb128 (operand, program, end); in execute_cfi() 176 fs->cfa_val_reg = operand; in execute_cfi() 190 get_uleb128 (operand, program, end); in execute_cfi() 210 get_uleb128 (operand, program, end); in execute_cfi() [all …]
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/external/webrtc/webrtc/modules/audio_processing/beamformer/ |
D | matrix.h | 140 Matrix& Transpose(const Matrix& operand) { in Transpose() argument 141 RTC_CHECK_EQ(operand.num_rows_, num_columns_); in Transpose() 142 RTC_CHECK_EQ(operand.num_columns_, num_rows_); in Transpose() 144 return Transpose(operand.elements()); in Transpose() 157 Matrix& Scale(const Matrix& operand, const S& scalar) { in Scale() argument 158 CopyFrom(operand); in Scale() 162 Matrix& Add(const Matrix& operand) { in Add() argument 163 RTC_CHECK_EQ(num_rows_, operand.num_rows_); in Add() 164 RTC_CHECK_EQ(num_columns_, operand.num_columns_); in Add() 167 data_[i] += operand.data_[i]; in Add() [all …]
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-errors.s | 9 # CHECK: error: invalid operand for instruction 19 # CHECK: error: invalid operand for instruction 23 # CHECK: error: invalid operand for instruction 29 # CHECK: error: invalid operand for instruction 33 # CHECK: error: invalid operand for instruction 39 # CHECK: error: invalid operand for instruction 43 # CHECK: error: invalid operand for instruction 49 # CHECK: error: invalid operand for instruction 52 # CHECK: error: invalid operand for instruction 65 # CHECK: error: invalid operand for instruction [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeSchedule3.td | 17 // source operands or one register source operand and one immediate operand. 26 , 1 // first operand read after one cycle 27 , 1 ]>, // second operand read after one cycle 30 // register source operands or one register source operand and one immediate 31 // operand. The instruction takes one cycle to execute in each of the 40 , 1 // first operand read after one cycle 41 , 1 ]>, // second operand read after one cycle 53 , 1 // first operand read after one cycle 54 , 1 ]>, // second operand read after one cycle 57 // source operands or one register source operand and one immediate operand. [all …]
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/external/llvm/lib/Target/Hexagon/Disassembler/ |
D | HexagonDisassembler.cpp | 1362 int64_t operand; in addSubinstOperands() local 1380 operand = ((inst & 0x1f0) >> 4) << 3; in addSubinstOperands() 1381 HexagonMCInstrInfo::addConstant(*MI, operand, getContext()); in addSubinstOperands() 1385 operand = getRegFromSubinstEncoding(inst & 0xf); in addSubinstOperands() 1386 Op = MCOperand::createReg(operand); in addSubinstOperands() 1388 operand = getRegFromSubinstEncoding((inst & 0xf0) >> 4); in addSubinstOperands() 1389 Op = MCOperand::createReg(operand); in addSubinstOperands() 1391 operand = (inst & 0xf00) >> 6; in addSubinstOperands() 1392 HexagonMCInstrInfo::addConstant(*MI, operand, getContext()); in addSubinstOperands() 1396 operand = getRegFromSubinstEncoding(inst & 0xf); in addSubinstOperands() [all …]
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.cc | 692 const Operand& operand) { in And() argument 694 LogicalMacro(rd, rn, operand, AND); in And() 700 const Operand& operand) { in Ands() argument 702 LogicalMacro(rd, rn, operand, ANDS); in Ands() 706 void MacroAssembler::Tst(const Register& rn, const Operand& operand) { in Tst() argument 708 Ands(AppropriateZeroRegFor(rn), rn, operand); in Tst() 714 const Operand& operand) { in Bic() argument 716 LogicalMacro(rd, rn, operand, BIC); in Bic() 722 const Operand& operand) { in Bics() argument 724 LogicalMacro(rd, rn, operand, BICS); in Bics() [all …]
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