1@ RUN: not llvm-mc -triple armv8 -mattr=-fp-armv8 -show-encoding < %s 2>&1 | FileCheck %s 2 3vmaxnm.f32 s4, d5, q1 4@ CHECK: error: invalid operand for instruction 5vmaxnm.f64.f64 s4, d5, q1 6@ CHECK: error: invalid operand for instruction 7vmaxnmge.f64.f64 s4, d5, q1 8@ CHECK: error: instruction 'vmaxnm' is not predicable, but condition code specified 9 10vcvta.s32.f32 s1, s2 11@ CHECK: error: instruction requires: FPARMv8 12vcvtp.u32.f32 s1, d2 13@ CHECK: error: invalid operand for instruction 14vcvtp.f32.u32 d1, q2 15@ CHECK: error: invalid operand for instruction 16vcvtplo.f32.u32 s1, s2 17@ CHECK: error: instruction 'vcvtp' is not predicable, but condition code specified 18 19vrinta.f64.f64 s3, d12 20@ CHECK: error: invalid operand for instruction 21vrintn.f32 d3, q12 22@ CHECK: error: invalid operand for instruction 23vrintz.f32 d3, q12 24@ CHECK: error: invalid operand for instruction 25vrintmge.f32.f32 d3, d4 26@ CHECK: error: instruction 'vrintm' is not predicable, but condition code specified 27 28aesd.8 q0, s1 29@ CHECK: error: invalid operand for instruction 30aese.8 s0, q1 31@ CHECK: error: invalid operand for instruction 32aesimc.8 s0, q1 33@ CHECK: error: invalid operand for instruction 34aesmc.8 q0, d1 35@ CHECK: error: invalid operand for instruction 36aesdge.8 q0, q1 37@ CHECK: error: instruction 'aesd' is not predicable, but condition code specified 38 39sha1h.32 d0, q1 40@ CHECK: error: invalid operand for instruction 41sha1su1.32 q0, s1 42@ CHECK: error: invalid operand for instruction 43sha256su0.32 s0, q1 44@ CHECK: error: invalid operand for instruction 45sha1heq.32 q0, q1 46@ CHECK: error: instruction 'sha1h' is not predicable, but condition code specified 47 48sha1c.32 s0, d1, q2 49@ CHECK: error: invalid operand for instruction 50sha1m.32 q0, s1, q2 51@ CHECK: error: invalid operand for instruction 52sha1p.32 s0, q1, q2 53@ CHECK: error: invalid operand for instruction 54sha1su0.32 d0, q1, q2 55@ CHECK: error: invalid operand for instruction 56sha256h.32 q0, s1, q2 57@ CHECK: error: invalid operand for instruction 58sha256h2.32 q0, q1, s2 59@ CHECK: error: invalid operand for instruction 60sha256su1.32 s0, d1, q2 61@ CHECK: error: invalid operand for instruction 62sha256su1lt.32 q0, d1, q2 63@ CHECK: error: instruction 'sha256su1' is not predicable, but condition code specified 64 65vmull.p64 q0, s1, s3 66@ CHECK: error: invalid operand for instruction 67vmull.p64 s1, d2, d3 68@ CHECK: error: invalid operand for instruction 69vmullge.p64 q0, d16, d17 70@ CHECK: error: instruction 'vmull' is not predicable, but condition code specified 71