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Searched refs:orrs (Results 1 – 25 of 44) sorted by relevance

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/external/llvm/test/MC/ARM/
Dthumb_rewrites.s92 orrs r0, r0, r1
93 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
95 orrs r0, r1, r0
96 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
Dthumb2-narrow-dp.ll743 // CHECK: orrs.w r7, r2, r1 @ encoding: [0x52,0xea,0x01,0x07]
744 // CHECK: orrs r2, r1 @ encoding: [0x0a,0x43]
745 // CHECK: orrs r3, r1 @ encoding: [0x0b,0x43]
746 // CHECK: orrs.w r4, r4, r1 @ encoding: [0x54,0xea,0x01,0x04]
747 // CHECK: orrs.w r5, r1, r5 @ encoding: [0x51,0xea,0x05,0x05]
749 // CHECK: orrs r7, r1 @ encoding: [0x0f,0x43]
750 // CHECK: orrs r7, r1 @ encoding: [0x0f,0x43]
751 // CHECK: orrs.w r8, r1, r8 @ encoding: [0x51,0xea,0x08,0x08]
752 // CHECK: orrs.w r8, r8, r1 @ encoding: [0x58,0xea,0x01,0x08]
753 // CHECK: orrs.w r1, r8, r1 @ encoding: [0x58,0xea,0x01,0x01]
[all …]
Dbasic-thumb-instructions.s450 orrs r3, r4
452 @ CHECK-ERRORS: orrs r3, r4 @ encoding: [0x23,0x43]
/external/compiler-rt/lib/builtins/arm/
Dcomparesf2.S55 orrs r12, r2, r3, lsr #1
116 orrs r12, r2, r3, lsr #1
/external/llvm/test/CodeGen/ARM/
Dfast-isel-binary.ll52 ; THUMB: orrs r0, r1
64 ; THUMB: orrs r0, r1
76 ; THUMB: orrs r0, r1
D2011-04-15-RegisterCmpPeephole.ll23 ; CHECK: orrs
Dmovcc-double.ll41 ; CHECK: orrs
Dselect_xform.ll298 ; T2: orrs r0, {{r[0-9]+}}
313 ; T2: orrs r0, {{r[0-9]+}}
Datomic-64bit.ll180 ; CHECK: orrs {{r[0-9]+}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
194 ; CHECK-THUMB-LE: orrs.w {{.*}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
Dshifter_operand.ll72 ; CHECk-THUMB: orrs r0, r1
Datomic-ops-v8.ll1145 ; CHECK-ARM-LE: orrs{{(\.w)?}} {{r[0-9]+}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
1146 ; CHECK-THUMB-LE: orrs{{(\.w)?}} {{(r[0-9]+, )?}}[[MISMATCH_HI]], [[MISMATCH_LO]]
1149 ; CHECK-ARM-BE: orrs{{(\.w)?}} {{r[0-9]+}}, [[MISMATCH_HI]], [[MISMATCH_LO]]
1150 ; CHECK-THUMB-BE: orrs{{(\.w)?}} {{(r[0-9]+, )?}}[[MISMATCH_LO]], [[MISMATCH_HI]]
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll127 ; ARMv7A: orrs r0, r1
134 ; ARMv7M: orrs r0, r1
Dthumb2-orr.ll5 ; CHECK: orrs r0, r1
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll127 ; ARMv7A: orrs r0, r1
134 ; ARMv7M: orrs r0, r1
Dthumb2-orr.ll5 ; CHECK: orrs r0, r1
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
D2011-04-15-RegisterCmpPeephole.ll23 ; CHECK: orrs
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-thumb-instructions.s399 orrs r3, r4
401 @ CHECK-ERRORS: orrs r3, r4 @ encoding: [0x23,0x43]
Dbasic-thumb2-instructions.s1302 orrs r4, r5, r6, lsr #5
1304 orrs r4, r5, r6, asr #5
1310 @ CHECK: orrs.w r4, r5, r6, lsr #5 @ encoding: [0x55,0xea,0x56,0x14]
1312 @ CHECK: orrs.w r4, r5, r6, asr #5 @ encoding: [0x55,0xea,0x66,0x14]
/external/llvm/test/MC/Disassembler/ARM/
Dthumb1.txt321 # CHECK: orrs r3, r4
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dthumb1.txt312 # CHECK: orrs r3, r4
/external/libvpx/libvpx/vpx_dsp/arm/
Dloopfilter_16_neon.asm449 orrs r5, r5, r6 ; Check for 0
502 orrs r5, r5, r6 ; Check for 0
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
D64bit.pnacl.ll450 ; ARM32: orrs {{r.*}}, {{r.*}}
474 ; ARM32-NOT: orrs
495 ; ARM32: orrs {{r.*}}, {{r.*}}
514 ; ARM32: orrs {{r.*}}, {{r.*}}
533 ; ARM32: orrs {{r.*}}, {{r.*}}
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.cc1194 orrs(cond, rd, rn, ~imm); in Delegate()
1223 orrs(cond, rd, rn, scratch); in Delegate()
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-operand-const-a32.cc63 M(orrs) \
Dtest-assembler-cond-rd-rn-operand-const-t32.cc65 M(orrs) \

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