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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DCellSDKIntrinsics.td41 RRForm<0b00100011110, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
42 "mpy $rT, $rA, $rB", IntegerMulDiv,
44 (v8i16 VECREG:$rB)))]>;
47 RRForm<0b00110011110, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
48 "mpyu $rT, $rA, $rB", IntegerMulDiv,
50 (v8i16 VECREG:$rB)))] >;
65 RRRForm<0b0011, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB, VECREG:$rC),
66 "mpya $rT, $rA, $rB, $rC", IntegerMulDiv,
68 (v8i16 VECREG:$rB),
72 RRForm<0b10100011110, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
[all …]
DSPUMathInstr.td17 def : Pat<(mul (v16i8 VECREG:$rA), (v16i8 VECREG:$rB)),
20 (SELBv4i32 (MPYv8i16 VECREG:$rA, VECREG:$rB),
22 (ROTMAHIv8i16 VECREG:$rB, 8)), 8),
27 (ROTMAIv4i32_i32 VECREG:$rB, 16)),
29 (ROTMAIv4i32_i32 VECREG:$rB, 8)), 8),
36 def : Pat<(mul (v8i16 VECREG:$rA), (v8i16 VECREG:$rB)),
37 (SELBv8i16 (MPYv8i16 VECREG:$rA, VECREG:$rB),
38 (SHLIv4i32 (MPYHHv8i16 VECREG:$rA, VECREG:$rB), 16),
46 Pat<(mul (v4i32 VECREG:$rA), (v4i32 VECREG:$rB)),
48 (v4i32 (Av4i32 (v4i32 (MPYHv4i32 VECREG:$rA, VECREG:$rB)),
[all …]
DSPU64InstrInfo.td33 SELBInst<(outs R64C:$rT), (ins R64C:$rA, R64C:$rB, VECREG:$rC),
45 Pat<(select (i32 (cond R64C:$rA, R64C:$rB)), R64C:$rTrue, R64C:$rFalse),
50 Pat<(cond R64C:$rA, R64C:$rB),
58 (COPY_TO_REGCLASS R64C:$rB, VECREG))), 0xb)>;
62 CodeFrag<(CEQIv4i32 (GBv4i32 (CEQv4i32 VECREG:$rA, VECREG:$rB)), 0xf)>;
82 def : Pat<(seteq R64C:$rA, R64C:$rB), I64EQr64.Fragment>;
83 def : Pat<(seteq (v2i64 VECREG:$rA), (v2i64 VECREG:$rB)), I64EQv2i64.Fragment>;
95 (COPY_TO_REGCLASS R64C:$rB, VECREG))>;
99 (COPY_TO_REGCLASS R64C:$rB, VECREG))>;
107 CodeFrag<(CLGTv4i32 VECREG:$rA, VECREG:$rB)>;
[all …]
DSPUInstrInfo.td558 RRForm<0b00010011000, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
559 "ah\t$rT, $rA, $rB", IntegerOp,
560 [(set (v8i16 VECREG:$rT), (int_spu_si_ah VECREG:$rA, VECREG:$rB))]>;
562 def : Pat<(add (v8i16 VECREG:$rA), (v8i16 VECREG:$rB)),
563 (AHv8i16 VECREG:$rA, VECREG:$rB)>;
566 RRForm<0b00010011000, (outs R16C:$rT), (ins R16C:$rA, R16C:$rB),
567 "ah\t$rT, $rA, $rB", IntegerOp,
568 [(set R16C:$rT, (add R16C:$rA, R16C:$rB))]>;
585 "a\t$rT, $rA, $rB", IntegerOp,
589 AInst<(outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
[all …]
DSPU128InstrInfo.td40 def : Pat<(shl GPRC:$rA, R32C:$rB),
41 (SHLQBYBIr128 (SHLQBIr128 GPRC:$rA, R32C:$rB), R32C:$rB)>;
DSPUInstrFormats.td274 RRForm<opcode, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
275 !strconcat(opc, " $rT, $rA, $rB"), itin,
277 (v8i16 VECREG:$rB)))] >;
282 RRForm<opcode, (outs VECREG:$rT), (ins VECREG:$rA, VECREG:$rB),
283 !strconcat(opc, " $rT, $rA, $rB"), itin,
285 (v4i32 VECREG:$rB)))] >;
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/
Dselect_bits.ll11 ; (or (and rC, rB), (and (not rC), rA))
12 define <2 x i64> @selectbits_v2i64_01(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
13 %C = and <2 x i64> %rC, %rB
20 ; (or (and rB, rC), (and (not rC), rA))
21 define <2 x i64> @selectbits_v2i64_02(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
22 %C = and <2 x i64> %rB, %rC
29 ; (or (and (not rC), rA), (and rB, rC))
30 define <2 x i64> @selectbits_v2i64_03(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
33 %C = and <2 x i64> %rB, %rC
38 ; (or (and (not rC), rA), (and rC, rB))
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstr64Bit.td264 def OR4To8 : XForm_6<31, 444, (outs G8RC:$rA), (ins GPRC:$rS, GPRC:$rB),
265 "or $rA, $rS, $rB", IntGeneral,
267 def OR8To4 : XForm_6<31, 444, (outs GPRC:$rA), (ins G8RC:$rS, G8RC:$rB),
268 "or $rA, $rS, $rB", IntGeneral,
279 def NAND8: XForm_6<31, 476, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB),
280 "nand $rA, $rS, $rB", IntGeneral,
281 [(set G8RC:$rA, (not (and G8RC:$rS, G8RC:$rB)))]>;
282 def AND8 : XForm_6<31, 28, (outs G8RC:$rA), (ins G8RC:$rS, G8RC:$rB),
283 "and $rA, $rS, $rB", IntGeneral,
284 [(set G8RC:$rA, (and G8RC:$rS, G8RC:$rB))]>;
[all …]
DPPCInstrInfo.td819 def STWUX : XForm_8<31, 183, (outs), (ins GPRC:$rS, GPRC:$rA, GPRC:$rB),
820 "stwux $rS, $rA, $rB", LdStGeneral,
922 def NAND : XForm_6<31, 476, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
923 "nand $rA, $rS, $rB", IntGeneral,
924 [(set GPRC:$rA, (not (and GPRC:$rS, GPRC:$rB)))]>;
925 def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
926 "and $rA, $rS, $rB", IntGeneral,
927 [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>;
928 def ANDC : XForm_6<31, 60, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB),
929 "andc $rA, $rS, $rB", IntGeneral,
[all …]
DPPCInstrAltivec.td196 (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
197 "dst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
199 (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
200 "dstt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
202 (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
203 "dstst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
205 (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
206 "dststt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
209 (ins u5imm:$ZERO, u5imm:$STRM, G8RC:$rA, GPRC:$rB),
210 "dst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td430 defm NAND8: XForm_6r<31, 476, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
431 "nand", "$rA, $rS, $rB", IIC_IntSimple,
432 [(set i64:$rA, (not (and i64:$rS, i64:$rB)))]>;
433 defm AND8 : XForm_6r<31, 28, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
434 "and", "$rA, $rS, $rB", IIC_IntSimple,
435 [(set i64:$rA, (and i64:$rS, i64:$rB))]>;
437 defm ANDC8: XForm_6r<31, 60, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
438 "andc", "$rA, $rS, $rB", IIC_IntSimple,
439 [(set i64:$rA, (and i64:$rS, (not i64:$rB)))]>;
441 defm OR8 : XForm_6r<31, 444, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
[all …]
DPPCInstrInfo.td1628 def TW : XForm_1<31, 4, (outs), (ins u5imm:$to, gprc:$rA, gprc:$rB),
1629 "tw $to, $rA, $rB", IIC_IntTrapW, []>;
1632 def TD : XForm_1<31, 68, (outs), (ins u5imm:$to, g8rc:$rA, g8rc:$rB),
1633 "td $to, $rA, $rB", IIC_IntTrapD, []>;
2013 (ins u1imm:$L, g8rc:$rA, g8rc:$rB),
2014 "cmprb $BF, $L, $rA, $rB", IIC_IntCompare, []>,
2021 defm NAND : XForm_6r<31, 476, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
2022 "nand", "$rA, $rS, $rB", IIC_IntSimple,
2023 [(set i32:$rA, (not (and i32:$rS, i32:$rB)))]>;
2024 defm AND : XForm_6r<31, 28, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
[all …]
DPPCInstrAltivec.td357 def DST : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
358 "dst $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/,
359 [(int_ppc_altivec_dst i32:$rA, i32:$rB, imm:$STRM)]>,
362 def DSTT : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
363 "dstt $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/,
364 [(int_ppc_altivec_dstt i32:$rA, i32:$rB, imm:$STRM)]>,
367 def DSTST : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
368 "dstst $rA, $rB, $STRM", IIC_LdStLoad /*FIXME*/,
369 [(int_ppc_altivec_dstst i32:$rA, i32:$rB, imm:$STRM)]>,
372 def DSTSTT : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
[all …]
DREADME_P9.txt386 // Note: rA and rB are the unsigned integer value.
387 (set f128:$XT, (int_ppc_vsx_xsiexpdp i64:$rA, i64:$rB))
594 (int_ppc_copy_first i32:$rA, i32:$rB)
595 (int_ppc_copy i32:$rA, i32:$rB)
597 (int_ppc_paste i32:$rA, i32:$rB)
598 (int_ppc_paste_last i32:$rA, i32:$rB)
Dp9-instrs.txt298 [PO VT rA rB XO /] xsiexpdp
DPPCInstrVSX.td1267 def MTVSRDD: XX1Form<31, 435, (outs vsrc:$XT), (ins g8rc:$rA, g8rc:$rB),
1268 "mtvsrdd $XT, $rA, $rB", IIC_VecGeneral,
2023 def XSIEXPDP : XX1Form <60, 918, (outs vsrc:$XT), (ins g8rc:$rA, g8rc:$rB),
2024 "xsiexpdp $XT, $rA, $rB", IIC_VecFP, []>;
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_util.cpp181 for (Range *rB = iv.head; rB; rB = rB->next) in overlaps()
182 if (rB->bgn < rA->end && in overlaps()
183 rB->end > rA->bgn) in overlaps()
/external/valgrind/VEX/priv/
Dguest_ppc_toIR.c1751 static IRExpr* ea_rA_idxd ( UInt rA, UInt rB ) in ea_rA_idxd() argument
1755 vassert(rB < 32); in ea_rA_idxd()
1756 return binop(mkSzOp(ty, Iop_Add8), getIReg(rA), getIReg(rB)); in ea_rA_idxd()
1781 static IRExpr* ea_rAor0_idxd ( UInt rA, UInt rB ) in ea_rAor0_idxd() argument
1784 vassert(rB < 32); in ea_rAor0_idxd()
1785 return (rA == 0) ? getIReg(rB) : ea_rA_idxd( rA, rB ); in ea_rAor0_idxd()
4877 IRTemp rB = newTemp( ty ); in dis_int_mult_add() local
4888 assign( rB, getIReg( rB_addr ) ); in dis_int_mult_add()
4895 assign( result, binop( Iop_MullS64, mkexpr( rA ), mkexpr( rB ) ) ); in dis_int_mult_add()
4927 assign( result, binop( Iop_MullU64, mkexpr( rA ), mkexpr( rB ) ) ); in dis_int_mult_add()
[all …]
Dhost_mips_defs.c2209 UInt rA, rB, r_dst; in doAMode_RR() local
2213 rB = iregNo(am->Mam.RR.index, mode64); in doAMode_RR()
2234 p = mkFormR(p, 0, rA, rB, rA, 0, 45); in doAMode_RR()
2236 p = mkFormR(p, 0, rA, rB, rA, 0, 47); in doAMode_RR()
2241 p = mkFormR(p, 0, rA, rB, rA, 0, 33); in doAMode_RR()
2243 p = mkFormR(p, 0, rA, rB, rA, 0, 35); in doAMode_RR()
Dhost_ppc_isel.c5426 HReg rB; in iselVecExpr_wrk() local
5430 rB = iselWordExpr_R( env, e->Iex.Load.addr, IEndianess ); in iselVecExpr_wrk()
5434 PPCAMode_IR(0, rB)) ); in iselVecExpr_wrk()
5439 PPCAMode_IR(0, rB)) ); in iselVecExpr_wrk()
5443 PPCAMode_IR(0, rB)) ); in iselVecExpr_wrk()
5447 rB, PPCRH_Imm(True, toUShort(15))) ); in iselVecExpr_wrk()
Dhost_ppc_defs.c3537 UInt rA, rB; in doAMode_RR() local
3541 rB = iregEnc(am->Pam.RR.index, mode64); in doAMode_RR()
3543 p = mkFormX(p, opc1, rSD, rA, rB, opc2, 0, endness_host); in doAMode_RR()
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/
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/external/ImageMagick/PerlMagick/t/reference/write/read/
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/fr-FR/
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/external/webrtc/talk/media/testdata/
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