| /external/llvm/lib/CodeGen/ |
| D | ImplicitNullChecks.cpp | 236 if (!TRI.regsOverlap(Reg, MO.getReg())) in isSafeToHoist()
284 if (TRI.regsOverlap(Reg, MO.getReg())) in isSafeToHoist()
455 if (TRI->regsOverlap(MO.getReg(), BaseReg)) in analyzeBlockForNullChecks()
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| D | ProcessImplicitDefs.cpp | 108 !TRI->regsOverlap(Reg, UserReg)) in processImplicitDef()
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| D | CriticalAntiDepBreaker.cpp | 410 if (TRI->regsOverlap(NewReg, *it)) { in findSuitableFreeRegister()
603 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
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| D | MachineInstrBundle.cpp | 316 if (!TRI->regsOverlap(MOReg, Reg)) in analyzePhysReg()
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| D | RegAllocPBQP.cpp | 392 if (TRI.regsOverlap(PRegN, PRegM)) { in createInterferenceEdge()
556 if (TRI.regsOverlap(reg, CSR[i])) in isACalleeSavedRegister()
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| D | MachineInstr.cpp | 1356 Found = TRI->regsOverlap(MOReg, Reg); in findRegisterDefOperandIdx()
2014 if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg) in clearRegisterKills()
2118 [&](unsigned Use) { return TRI.regsOverlap(Use, Reg); })) in setPhysRegsDeadExcept()
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| D | MachineCSE.cpp | 193 if (!TRI->regsOverlap(MO.getReg(), Reg)) in isPhysDefTriviallyDead()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | StackSlotColoring.cpp | 535 } else if (TRI->regsOverlap(Reg, NewReg)) { in PropagateBackward()
537 } else if (TRI->regsOverlap(Reg, OldReg)) { in PropagateBackward()
593 } else if (TRI->regsOverlap(Reg, NewReg) || in PropagateForward()
594 TRI->regsOverlap(Reg, OldReg)) in PropagateForward()
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| D | VirtRegRewriter.cpp | 899 if (TRI->regsOverlap(PRRU, PhysReg)) { in GetRegForReload()
1012 if (TRI->regsOverlap(PhysReg, Reg)) in FoldsStackSlotModRef()
1432 if (PhysReg && TRI->regsOverlap(PhysReg, UnfoldPR)) in OptimizeByUnfold()
1439 if (TRI->regsOverlap(PhysReg, UnfoldPR)) in OptimizeByUnfold()
1445 if (!TRI->regsOverlap(PhysReg, UnfoldPR)) in OptimizeByUnfold()
1537 if (!NewDstMO.isKill() || TRI->regsOverlap(NewReg, SrcReg)) in CommuteToFoldReload()
2049 TRI->regsOverlap(MOk.getReg(), PhysReg)) { in ProcessUses()
2516 assert(TRI->regsOverlap(KillRegs[0], MI.getOperand(0).getReg())); in RewriteMBB()
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| D | RenderMachineFunction.cpp | 361 if (tri->regsOverlap(preg, trcPReg)) in initWorst()
392 if (tri->regsOverlap(trc1Reg, trc2Reg)) in initWorst()
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| D | MachineCSE.cpp | 168 if (!TRI->regsOverlap(MO.getReg(), Reg)) in isPhysDefTriviallyDead()
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| D | CriticalAntiDepBreaker.cpp | 588 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
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| D | RegAllocLinearScan.cpp | 869 if (tri_->regsOverlap(PhysReg, Candidate)) { in findIntervalsToSpill()
884 if (tri_->regsOverlap(PhysReg, Candidate)) { in findIntervalsToSpill()
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| D | MachineInstr.cpp | 958 Found = TRI->regsOverlap(MOReg, Reg); in findRegisterDefOperandIdx()
1702 if (TRI.regsOverlap(*I, Reg)) { in setPhysRegsDeadExcept()
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| D | RegAllocPBQP.cpp | 330 if (tri->regsOverlap(preg1, preg2)) { in addInterferenceCosts()
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| D | LiveIntervalAnalysis.cpp | 209 if (PhysReg && tri_->regsOverlap(PhysReg, reg)) in conflictsWithPhysReg()
240 if (tri_->regsOverlap(Reg, PhysReg)) in conflictsWithAliasRef()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64DeadRegisterDefinitionsPass.cpp | 73 if (TRI->regsOverlap(Reg, MO.getReg())) in implicitlyDefinesOverlappingReg()
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| D | AArch64PBQPRegAlloc.cpp | 197 if (livesOverlap && TRI->regsOverlap(pRd, pRa)) in addIntraChainConstraint()
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| D | AArch64AsmPrinter.cpp | 235 assert(RI->regsOverlap(RegToPrint, Reg)); in printAsmRegInClass()
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| /external/llvm/lib/Target/X86/ |
| D | X86CallFrameOptimization.cpp | 305 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister())) in classifyInstruction()
309 if (RegInfo.regsOverlap(Reg, U)) in classifyInstruction()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 331 bool regsOverlap(unsigned regA, unsigned regB) const { in regsOverlap() function
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 412 bool regsOverlap(unsigned regA, unsigned regB) const { in regsOverlap() function
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 136 if (TRI->regsOverlap(MOReg, Reg)) { in getRegReferences()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1651 (TRI->regsOverlap(EvenReg, BaseReg))) { in FixInvalidRegPairOp()
1652 assert(!TRI->regsOverlap(OddReg, BaseReg)); in FixInvalidRegPairOp()
1741 if (TRI->regsOverlap(Reg, E.MI->getOperand(0).getReg())) { in LoadStoreMultipleOpti()
2040 if (MO.isDef() && TRI->regsOverlap(Reg, Base)) in IsSafeAndProfitableToMove()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1134 (TRI->regsOverlap(EvenReg, BaseReg))) { in FixInvalidRegPairOp()
1135 assert(!TRI->regsOverlap(OddReg, BaseReg)); in FixInvalidRegPairOp()
1487 if (MO.isDef() && TRI->regsOverlap(Reg, Base)) in IsSafeAndProfitableToMove()
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