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Searched refs:seleqz (Results 1 – 25 of 25) sorted by relevance

/external/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-int.ll50 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
59 ; MMR6: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
85 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
94 ; MMR6: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
120 ; SEL: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
129 ; MMR6: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
165 ; SEL-32: seleqz $[[T3:[0-9]+]], $[[T2]], $[[T0]]
169 ; SEL-32: seleqz $[[T6:[0-9]+]], $[[T5]], $[[T0]]
187 ; SEL-64: seleqz $[[T1:[0-9]+]], $6, $[[T0]]
199 ; MM32R6: seleqz $[[T2:[0-9]+]], $[[T1]], $[[T0]]
[all …]
Dlshr.ll116 ; 32R6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T3]]
121 ; 32R6: seleqz $2, $[[T7]], $[[T5]]
142 ; MMR6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T5]]
146 ; MMR6: seleqz $2, $[[T7]], $[[T5]]
196 ; 64R6: seleqz $[[T8:[0-9]+]], $[[T5]], $[[T7]]
201 ; 64R6: seleqz $2, $[[T9]], $[[T7]]
Dashr.ll115 ; 32R6: seleqz $[[T2:[0-9]+]], $[[T0]], $[[T1]]
124 ; 32R6: seleqz $[[T11:[0-9]+]], $[[T10]], $[[T1]]
144 ; MMR6: seleqz $[[T2:[0-9]+]], $[[T0]], $[[T1]]
153 ; MMR6: seleqz $[[T11:[0-9]+]], $[[T10]], $[[T1]]
202 ; 64R6: seleqz $[[T4:[0-9]+]], $[[T0]], $[[T3]]
211 ; 64R6: seleqz $[[T12:[0-9]+]], $[[T11]], $[[T3]]
Dshl.ll132 ; 32R6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T2]]
137 ; 32R6: seleqz $3, $[[T7]], $[[T5]]
158 ; MMR6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T5]]
162 ; MMR6: seleqz $3, $[[T7]], $[[T5]]
212 ; 64R6: seleqz $[[T8:[0-9]+]], $[[T5]], $[[T7]]
217 ; 64R6: seleqz $3, $[[T9]], $[[T7]]
/external/llvm/test/CodeGen/Mips/
Dcmov.ll22 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $4
37 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $[[CC]]
62 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R1]], $4
77 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R1]], $[[CC]]
100 ; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
108 ; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
132 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
142 ; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
167 ; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $6, $[[R0]]
168 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $7, $[[R0]]
[all …]
Dzeroreg.ll19 ; 32R6: seleqz $2, $[[R0]], $4
25 ; 64R6: seleqz $2, $[[R0]], $4
69 ; 32R6-DAG: seleqz $2, $[[R0]], $[[CC]]
70 ; 32R6-DAG: seleqz $3, $[[R1]], $[[CC]]
76 ; 64R6: seleqz $2, $[[R0]], $4
Dselect.ll21 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
31 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
59 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $4
63 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $7, $4
77 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
108 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $[[T2]]
112 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $7, $[[T2]]
122 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
520 ; 32R6: seleqz $[[EQ:[0-9]+]], $5, $[[CCGPR]]
535 ; 64R6: seleqz $[[EQ:[0-9]+]], $5, $[[CCGPR]]
[all …]
Dcountleading.ll60 ; MIPS32-R6-DAG: seleqz $[[R5:[0-9]+]], $[[R2]], $5
87 ; MIPS32-R6-DAG: seleqz $[[R6:[0-9]+]], $[[R2]], $[[R4]]
Dmips64-f128.ll635 ; CMP_CC_FMT-DAG: seleqz $[[EQ1:[0-9]+]], $8, $[[CC]]
638 ; CMP_CC_FMT-DAG: seleqz $[[EQ2:[0-9]+]], $9, $[[CC]]
665 ; CMP_CC_FMT: seleqz $[[EQ1:[0-9]+]], $[[R1]], $[[CC]]
668 ; CMP_CC_FMT: seleqz $[[EQ2:[0-9]+]], $[[R0]], $[[CC]]
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s110 seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x83,0x11,0x40]
287 seleqz.s $f1, $f2, $f3 # CHECK: seleqz.s $f1, $f2, $f3 # encoding: [0x54,0x62,0x08,0x38]
288 seleqz.d $f2, $f4, $f8 # CHECK: seleqz.d $f2, $f4, $f8 # encoding: [0x55,0x04,0x12,0x38]
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt113 0x35 0x10 0x64 0x00 # CHECK: seleqz $2, $3, $4
124 0x14 0x10 0x04 0x46 # CHECK: seleqz.s $f0, $f2, $f4
125 0x14 0x10 0x24 0x46 # CHECK: seleqz.d $f0, $f2, $f4
Dvalid-mips32r6.txt9 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
86 0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
97 0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt168 0x35 0x10 0x64 0x00 # CHECK: seleqz $2, $3, $4
169 0x14 0x10 0x24 0x46 # CHECK: seleqz.d $f0, $f2, $f4
170 0x14 0x10 0x04 0x46 # CHECK: seleqz.s $f0, $f2, $f4
Dvalid-mips64r6.txt11 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
105 0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
116 0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s170 seleqz.s $f1, $f2, $f3 # CHECK: seleqz.s $f1, $f2, $f3 # encoding: [0x54,0x62,0x08,0x38]
171 seleqz.d $f2, $f4, $f8 # CHECK: seleqz.d $f2, $f4, $f8 # encoding: [0x55,0x04,0x12,0x38]
/external/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td568 class SELEQZ_DESC : SELEQNE_Z_DESC_BASE<"seleqz", GPR32Opnd>;
610 class SELEQZ_S_DESC : SELEQNEZ_DESC_BASE<"seleqz.s", FGR32Opnd>,
611 MipsR6Arch<"seleqz.s">;
612 class SELEQZ_D_DESC : SELEQNEZ_DESC_BASE<"seleqz.d", FGR64Opnd>,
613 MipsR6Arch<"seleqz.d">;
DMips64r6InstrInfo.td76 class SELEQZ64_DESC : SELEQNE_Z_DESC_BASE<"seleqz", GPR64Opnd>;
DMicroMips32r6InstrInfo.td194 class SELEQZ_S_MMR6_ENC : POOL32F_SEL_FM_MMR6<"seleqz.s", 0, 0b000111000>;
195 class SELEQZ_D_MMR6_ENC : POOL32F_SEL_FM_MMR6<"seleqz.d", 1, 0b000111000>;
595 class SELEQZ_MMR6_DESC : SELEQNE_Z_MMR6_DESC_BASE<"seleqz", GPR32Opnd>;
1048 class SELEQZ_S_MMR6_DESC : SELEQNEZ_DESC_BASE<"seleqz.s", FGR32Opnd>;
1049 class SELEQZ_D_MMR6_DESC : SELEQNEZ_DESC_BASE<"seleqz.d", FGR64Opnd>;
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt101 0x00 0x83 0x11 0x40 # CHECK: seleqz $2, $3, $4
269 0x54 0x62 0x08 0x38 # CHECK: seleqz.s $f1, $f2, $f3
270 0x55 0x04 0x12 0x38 # CHECK: seleqz.d $f2, $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt177 0x54 0x62 0x08 0x38 # CHECK: seleqz.s $f1, $f2, $f3
178 0x55 0x04 0x12 0x38 # CHECK: seleqz.d $f2, $f4, $f8
/external/llvm/test/MC/Mips/
Dtarget-soft-float.s165 seleqz.d $f2, $f2, $f2
167 seleqz.s $f2, $f2, $f2
/external/v8/src/mips/
Dassembler-mips.h830 void seleqz(Register rd, Register rs, Register rt);
831 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs,
Dassembler-mips.cc2146 void Assembler::seleqz(Register rd, Register rs, Register rt) { in seleqz() function in v8::internal::Assembler
2388 void Assembler::seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs, in seleqz() function in v8::internal::Assembler
2411 seleqz(D, fd, fs, ft); in seleqz_d()
2416 seleqz(S, fd, fs, ft); in seleqz_s()
/external/v8/src/mips64/
Dassembler-mips64.h877 void seleqz(Register rd, Register rs, Register rt);
878 void seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs,
Dassembler-mips64.cc2455 void Assembler::seleqz(Register rd, Register rs, Register rt) { in seleqz() function in v8::internal::Assembler
2710 void Assembler::seleqz(SecondaryField fmt, FPURegister fd, FPURegister fs, in seleqz() function in v8::internal::Assembler
2718 seleqz(D, fd, fs, ft); in seleqz_d()
2723 seleqz(S, fd, fs, ft); in seleqz_s()