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Searched refs:uimm7 (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrInfo.td2042 (SPUvec_shl (vectype VECREG:$rA), (i16 uimm7:$val)))]>;
2048 [(set R16C:$rT, (shl R16C:$rA, (i16 uimm7:$val)))]>;
2053 def : Pat<(SPUvec_shl (v8i16 VECREG:$rA), (i32 uimm7:$val)),
2054 (SHLHIv8i16 VECREG:$rA, (TO_IMM16 uimm7:$val))>;
2056 def : Pat<(shl R16C:$rA, (i32 uimm7:$val)),
2057 (SHLHIr16 R16C:$rA, (TO_IMM16 uimm7:$val))>;
2089 (SPUvec_shl (v4i32 VECREG:$rA), (i32 uimm7:$val)))]>;
2093 [(set R32C:$rT, (shl R32C:$rA, (i32 uimm7:$val)))]>;
2192 (SPUshlquad_l_bytes (vectype VECREG:$rA), (i32 uimm7:$val)))]>;
2204 (SPUshlquad_l_bytes GPRC:$rA, (i32 uimm7:$val)))]>;
[all …]
DCellSDKIntrinsics.td209 Pat<(int_spu_si_shli (v4i32 VECREG:$rA), uimm7:$val),
217 Pat<(int_spu_si_shlqbii VECREG:$rA, uimm7:$val),
225 Pat<(int_spu_si_shlqbyi VECREG:$rA, uimm7:$val),
DSPUOperands.td83 // uimm7 predicate - True if the immediate fits in an 7-bit unsigned
85 def uimm7: PatLeaf<(imm), [{
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td362 dag InOperandList = (ins uimm7:$mask);
385 dag InOperandList = (ins GPR32Opnd:$rt, uimm7:$mask);
DMipsInstrInfo.td854 // This is almost the same as a uimm7 but 0x7f is interpreted as -1.
/external/valgrind/VEX/priv/
Dguest_arm_toIR.c19736 UInt uimm7 = INSN0(6,0); in disInstr_THUMB_WRK() local
19737 putIRegT(13, binop(Iop_Add32, getIRegT(13), mkU32(uimm7 * 4)), in disInstr_THUMB_WRK()
19739 DIP("add sp, #%u\n", uimm7 * 4); in disInstr_THUMB_WRK()
19745 UInt uimm7 = INSN0(6,0); in disInstr_THUMB_WRK() local
19746 putIRegT(13, binop(Iop_Sub32, getIRegT(13), mkU32(uimm7 * 4)), in disInstr_THUMB_WRK()
19748 DIP("sub sp, #%u\n", uimm7 * 4); in disInstr_THUMB_WRK()